Commit Graph

14415 Commits

Author SHA1 Message Date
Xiang Xiao
2976accd9f arch: Remove the extra space before the function prototype
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Xiang Xiao
1fb8c13e5e Replace nxsem_timedwait_uninterruptible with nxsem_tickwait_uninterruptible
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Xiang Xiao
816ce73ab4 Replace nxsem_timedwait with nxsem_tickwait
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Petro Karashchenko
0fee5a2b84 nuttx: fix typos in comments
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-05-14 23:45:52 +08:00
Michal Lenc
6f6338cea0 imxrt/flexpwm: set number of modules based on configuration options
Number of channels are now set based on enabled modules (channels) in
configuration instead of the usage of static 4.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-05-13 12:55:45 -03:00
Michal Lenc
bdcf8b2b66 samv7/pwm: set number of channels based on configuration options
Number of channels are now set based on enabled channels in configuration
instead of the usage of static 4.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-05-13 12:55:45 -03:00
chao.an
701e56d4ae arm/cortex-[a|r]: add performance counter implement
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-13 12:55:31 -03:00
chao.an
4da48c84ff arm/cortex-[a|r]: add more functions of Performance Monitors Unit
Reference:
https://developer.arm.com/documentation/ddi0433/a/performance-monitoring-unit/performance-monitoring-register-descriptions

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-13 12:55:31 -03:00
chao.an
920e826a80 arm/cortex-r: rename PCMR_* to PMCR_*
It should be PMCR (Performance Monitors Control Register)

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-13 12:55:31 -03:00
chao.an
34b124bc14 arm/cortex-r: add _pmu_* perfix for performance monitor functions
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-13 12:55:31 -03:00
Petro Karashchenko
f095bf8f39 arch/arm/samv7/sam_afec: fix ADC pin for channel 9
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-05-13 11:17:37 -03:00
wangbowen6
f23ba7e761 arm/tlsr82: add hardware aes encrypt and decrypt support.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-13 20:24:46 +08:00
Xiang Xiao
1ba316b5c7 arch: Remove board/libboard$(LIBEXT) from the rerequest of export_startup
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-12 23:34:31 +03:00
wangbowen6
bc61e71b94 crypto: change type uint32_t to size_t in aes_cypher() arguments.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-12 22:28:54 +08:00
Ville Juven
47e85b68fe arch/addrenv: Change text write enable/disable to generic mprot
Implement a generic access rights modification procedure instead
of the procedures that only do one thing (enable/disable write)
to one section (text).
2022-05-12 22:28:31 +08:00
Matthew Trescott
f6f826c09a Fix broken tiva_gpioirqclear 2022-05-12 14:49:35 +08:00
chao.an
04f7beea83 arm/tlsr82: fix kconfig warning
arch/arm/src/tlsr82/Kconfig:272:warning: leading whitespace ignored

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-12 14:58:47 +09:00
wangbowen6
c39d3fa9e4 tlsr82/tc32: optimize the irq process
1. using armv6-m arm_irq();
2. simplify the interrupt number get process;
3. To improve the performance, move common exception code to ram_code.

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-12 02:07:52 +08:00
wangbowen6
6caa8f1075 arm_createstack: fix warning for tc32 compiler.
fix warning:
common/arm_createstack.c: In function 'up_create_stack':
common/arm_createstack.c:154:11: warning: format '%d' expects type 'int', but argument 3 has type 'size_t'

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-11 20:14:30 +03:00
wangbowen6
db1e6656dd arm/tc32/Make.defs: filter-out arm_udelay.c
tc32 architecture implement up_udelay by itself, so filter
out arm_udelay.c.

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-11 21:57:01 +08:00
wangbowen6
28684f24b7 arm/tlsr82: pwm driver optimize and add pulse count support.
1. add pulse count support for pwm0;
2. add more detailed config for pwm;
3. pwm configuration and start process optimize;
4. tlsr82/Kconfig format;

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-11 13:15:44 +03:00
Xiang Xiao
0cf2330e41 arch/arm: Fix target 'arm_vectortab.o' given more than once in the same rule 2022-05-11 17:39:33 +09:00
Masayuki Ishikawa
1277bcfd15 arch: tiva: Fix TIVA_WITH_QEMU in Kconfig
Summary:
- TIVA_WITH_QEMU is used to run the NuttX with QEMU
- The configuration should not depend on TIVA_ETHERNET
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-05-11 15:09:34 +08:00
Xiang Xiao
0c8d3489e6 arch/arm: Fix target 'arm_fpuconfig.o' given more than once in the same rule
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-10 16:42:43 +03:00
Xiang Xiao
8634e8de64 Replace all sem_xxx with nxsem_xxx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-10 15:08:36 +03:00
wangbowen6
73f7cc5855 tlsr82: first commit of telink tlsr82xx chip port.
tlsr82: first commit of telink tlsr82xx chip port.

 - tc32 archtecture context switch;
 - tc32 backtrace;
 - timer, uart, pwm, gpio, adc driver;
 - flash, watchdog driver;
 - uart txdma/rxdma;
 - spi console driver;
 - add board bringup and reset;

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-09 12:33:39 +08:00
Zou Hanya
ce2a7d6d19 stm32 usbfs: Fix stm32_usbfs and add CONFIG_STM32_USBFS 2022-05-09 10:34:40 +08:00
Zou Hanya
654960da4b stm32 usbfs: Add copy of stm32_usbdev 2022-05-09 10:34:40 +08:00
okayserh
2696aee11d Fixed the bug that prevented the code from working in uninitialized
state (wrong I2C write size). Some improvements of the code.
2022-05-09 10:34:29 +08:00
Xiang Xiao
1172ed306c arch/arm: Remove arm_etherstub.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-08 16:58:50 +03:00
Xiang Xiao
fd468130e6 arm/common: Skip compile arm_[m|u]delay.c if CONFIG_[ALARM|TIMER]_ARCH is true
since up_[m|u]delay provide in the common code in this case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-08 16:58:50 +03:00
okayserh
476770e9fd Added functionality for Audio support with the STM32F746 Discoboard
In particular additions to wm8994.h and filled functionality into
wm8994.c.

Resolved a few more remarks from review.
2022-05-07 11:52:51 -03:00
Xiang Xiao
e84e5f0e1d arch: Add gcov related config for arm/risc-v/xtensa
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-06 14:43:57 -03:00
Oki Minabe
3983efa47e armv7-a: smp: allocate page table for each cpu
Summary:
- In case of SMP and ADDRENV, allocate the page table for each cpu
- Each cpu holds separated addrenv and MMU setting

Impact:
- armv7-a

Testing:
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-05-06 18:30:20 +09:00
JacobCrabill
0a37bd8d4f stm32: SocketCAN: allow non-late netdev initialization 2022-05-06 08:54:58 +02:00
JacobCrabill
b6d9eab7c9 stm32h7: Add FDCAN3_BASE to memorymap.h
Note that pinmap.h, irq.h, fdcan.h still need to be updated with proper
register definitions for the FDCAN3 peripheral present in
STM32H7[2|3][3|5] MCUs
2022-05-06 08:54:58 +02:00
JacobCrabill
f406afdc42 arch/stm32h7: Add FDCAN SocketCAN driver
Adds an FDCAN driver for STM32H7 MCUs using the SocketCAN interface
2022-05-06 08:54:58 +02:00
Oki Minabe
4fa21c4719 armv7-a: Inner Shareable TLB maintenance operations
Summary:
- Use Inner Shareable for TLB maintenance operations
- Add config option as CONFIG_ARM_HAVE_MPCORE
- This PR is in preparation for smp with kernel build

Impact:
- armv7-a

Testing:
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-05-06 15:26:59 +09:00
chao.an
0c223998c7 arm/cortex-m/toolchain: try print runtime library only in clang
fix compile warning:

make: arm-nuttx-elf-gcc: Command not found

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-05 17:31:12 +02:00
Simon Filgis
6e8c32e778 MCAN_INT_ACKE must be on the list of MCAN_TXERR_INTS to be properly handeled 2022-05-04 01:38:25 +08:00
Anton Potapov
862b815f87 Restore lost flash define for stm32. 2022-05-03 23:07:15 +08:00
Xiang Xiao
972a260391 arch/arm: Remove FAR and CODE from chip folder(3)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:50:52 +03:00
Xiang Xiao
44ad6d0a23 arch/arm: Remove FAR and CODE from chip folder(2)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:50:52 +03:00
Xiang Xiao
03c31d332f arch/arm: Remove FAR and CODE from chip folder(1)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-03 16:50:52 +03:00
Ville Juven
248b738f25 arm_addrenv: Add stubs for modifying permissions
Adds stubs for up_addrenv_text_enable/disable_write. These don't have
to do anything as the ARM MMU allows setting access per mode. Currently
the settings for user .text area grants the kernel write access, but
revokes user write access.
2022-05-03 21:25:25 +09:00
Oki Minabe
0ba891c1b0 armv7-a: smp: fix stack coloration
Summary:
- The stack pointer is subtracted to alloc xcptcontext area
  in the __cpu?_start block
- Fix the stack coloration overrun to the previous cpu's xcpt area

Impact:
- armv7-a's smp configuration

Testing:
- smp and ostest on sabre-6quad:smp w/ qemu

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-05-03 19:12:04 +08:00
Xiang Xiao
f77a0ec7fa arch: Move -finstrument-functions from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 23:54:15 +03:00
Xiang Xiao
1fde7e17bb arch: Move -fstack-protector-all from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 23:54:15 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:36:41 +03:00
chao.an
5db447623d arm/cxd56xx/lc823450/rp2040: replace arch testset to board implement
This patch to resolve the regression which leads to the breakage of spresense:smp

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-01 06:38:25 +09:00