Commit Graph

1382 Commits

Author SHA1 Message Date
Alan Carvalho de Assis
1d88d5a370 ESP32S2: Add support to SPI Flash 2023-07-10 17:56:46 +08:00
Roy Feng
8f66b033db change free to kmm_free as it was allocated via kmm_alloc 2023-07-05 16:40:23 +08:00
Alan Carvalho de Assis
245db6742c esp32s2: Fix UART1 default pins
The default pins to UART1 should be 17 (TXD) and 18 (RXD).
2023-07-01 13:11:39 +08:00
Xiang Xiao
0eeca0f375 build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)
to unify the way to get include directories

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-23 00:11:25 +03:00
simbit18
f0a74eb492 Fix Kconfig style
Remove spaces from Kconfig files
2023-06-22 11:46:09 +09:00
simbit18
f930b4f6f5 Fix Kconfig style
Remove TABs from Kconfig files
Replace help => ---help---
Add comments
2023-06-20 12:54:50 -03:00
simbit18
3f4151525d Fix Kconfig style
Remove TABs from Kconfig files
Add comments
2023-06-19 20:05:57 +03:00
Dong Heng
8f25329260 xtensa/esp32s3: SPI support quad I/O mode 2023-06-16 16:07:05 -03:00
Tiago Medicci Serrano
368b6cb489 esp32s3/wifi: update Wi-Fi driver to the newest esp-hal-3rdparty 2023-06-16 11:14:36 +08:00
Dong Heng
d492823128 xtensa/esp32s3: Add USB OTG device driver 2023-06-14 18:04:27 -03:00
Lucas Saavedra Vaz
4bcf454ae5 arch/xtensa/esp32s2: Fix SPI DMA implementation 2023-06-15 03:29:30 +08:00
Dong Heng
b24f931aca xtensa/esp32s3: Support 32MB SPI flash 2023-06-12 21:05:33 +08:00
Xiang Xiao
da5e978341 mm: Correct the callsite of mm_mallinfo
forget to update in https://github.com/apache/nuttx/pull/9488

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Xiang Xiao
d920bfba10 mm: include malloc.h in mm/mm.h
to remove the forward declaration of mallinfo and mallinfo_task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Petro Karashchenko
2a38c38b03 style: fix style issues found during code review
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:54:52 +08:00
anjiahao
7732791cd6 mempool:Add mail_info support for multiple pools
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-06-08 23:56:40 +08:00
chenwen@espressif.com
617927f27c xtensa/esp32: Support multiple PHY init data bin
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-06-07 16:44:26 +08:00
Tiago Medicci Serrano
118a127771 esp32_start: use up_putc instead up_puts in showprogress define
During initialization it isn't possible to use up_puts once it's
protected against concurrent access through a mutex lock. Instead,
using up_putc makes it similar to ESP32S2 and ESP32S3 and perfectly
fits for showprogress usage.
2023-06-02 10:17:54 +08:00
Roy Feng
bcd776b2a7 Fix build issues for ESP32 SoftAP mode 2023-05-27 23:54:55 +09:00
Dong Heng
97d2d6376d xtensa/esp32s3: SPI slave driver 2023-05-27 14:11:36 +08:00
liaoao
6424b5322f procfs:add xtensa cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
Lucas Saavedra Vaz
5f1dca63ae arch/xtensa/esp32: Add missing SPI Flash ROM functions
Add missing ROM functions and clear source files
2023-05-27 03:16:20 +08:00
Dong Heng
4a279b4b9b xtensa/esp32s3: Support 32MB PSRAM 2023-05-25 13:46:11 +08:00
Tiago Medicci Serrano
63364a52ff esp32s3/spiflash: pause other CPU before SPI flash operations
Whenever a SPI flash operation is going to take place, it's
necessary to disable both the instruction and data cache. In order
to avoid the other CPU (if SMP is enabled) to retrieve data from
the SPI flash, it needs to be paused until the current SPI flash
operation finishes. All the code that "pauses" the other CPU (in
fact, the CPU spins until `up_cpu_resume` is called) needs to run
from the instruction RAM.
2023-05-24 00:37:46 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-23 15:48:35 +09:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
zhangyuan21
077c16fc71 arch/xtensa: only cmp fpu coprocessor for fpu test
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:30:38 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Tiago Medicci Serrano
496a77653a arch/xtensa/esp32_esp32s3: prevent arch's libc in the userspace
ESP32 and ESP32-S3 should use the ROM-defined versions of the libc
in flat build and, when building the protected mode, in the kernel.

The ROM-defined version of the libc functions can't be used in the
userspace, however, because it isn't allowed to access the memory
region in flash directly from the userspace. That being said,
`LIBC_PREVENT_STRING_KERNEL` should be selected to avoid building
any implementation of the libc, being the ROM-defined versions
linked instead.

NuttX's software implemented version of the libc will be built in
the userspace. Also, the assembly-defined version of some of the
libc functions (`XTENSA_xxx`) may also be selected to be used in
the userspace.
2023-05-17 13:58:48 +08:00
Alan Carvalho de Assis
694e6f550b esp32xx: Workaround to avoid printing serial trash character
During the serial reconfiguration from bootloader to the
NuttX a trash character "?" (Unicode replacement U+FFFD)
was printed in the screen.

This fix was discovered by Sylvio Alves from Espressif!
2023-05-12 06:30:35 +03:00
Tiago Medicci Serrano
3e07477c85 esp32/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Tiago Medicci Serrano
b680abd04b esp32s3/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32-S3's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Lucas Saavedra Vaz
a895cd4854 arch/xtensa/esp32s2: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32-S2.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
Lucas Saavedra Vaz
274a79fd34 arch/xtensa/esp32: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
simbit18
f5514a1113 arch/xtensa/src/esp32/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
2023-05-10 22:51:11 +08:00
Dong Heng
9ae2fa2b54 xtensa/esp32s3: Fix code style of esp32s3_psram_octal.c 2023-05-10 10:55:20 -03:00
Dong Heng
3161005c40 xtensa/esp32: Fix himem driver crash in SMP mode 2023-05-10 17:56:38 +08:00
simbit18
0fd32d8149 arch/xtensa/src/esp32s3/Kconfig: Fix indentation and help attribute
Replace help => ---help---
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
simbit18
999ac5d5bb arch/xtensa/src/esp32/kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
Xiang Xiao
325f395300 Replace all strncpy with strlcpy
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-08 09:57:01 +02:00
hujun5
0f243bde33 arch: fix the issue of asynchronous signal processing
in SMP, signal processing cannot be nested, we use xcp.sigdeliver to identify whether there is currently a signal being processed, but this state does not match the actual situation
One possible scenario is that signal processing has already been completed, but an interrupt occurs, resulting in xcp.sigdeliver not being correctly set to NULL,
At this point, a new signal arrives, which can only be placed in the queue and cannot be processed immediately
Our solution is that signal processing and signal complete status are set in the same critical section, which can ensure status synchronization

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-08 09:11:14 +02:00
Alan Carvalho de Assis
276d1c8f48 esp32s3: Add support to RTC 2023-05-06 11:43:01 +08:00
Dong Heng
bd122915f0 xtensa/esp32s3: Support octal lines mode SPIRAM 2023-05-05 18:38:12 +08:00
zhangyuan21
841b178782 assert: show stacks with the sp from regs
1. Get the value of sp from dump regs when an exception occurs,
   to avoid getting the value of fp from up_getsp and causing
   incomplete stack printing.
2. Determine which stack the value belongs to based on the value
   of SP to avoid false reports of stack overflow

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-05 13:40:04 +08:00
Lucas Saavedra Vaz
58f59fe9dc arch/xtensa/esp32s2: Fix SPIRAM compilation warnings
This commit aims to fix compilation warnings that happens when enabling SPIRAM for ESP32-S2
2023-05-04 18:41:54 -03:00
Lucas Saavedra Vaz
a5a3b919a0 audio: Add i2s_getmclkfrequency function
Rename i2s_mclkfrequency to i2s_setmclkfrequency and add i2s_getmclkfrequency for getting the current MCLK frequency from the I2S interface
2023-05-04 18:41:54 -03:00
Tiago Medicci Serrano
28361a295d esp32/wifi: add support to WPA3 on Station Mode
Add support to select WPA3-SAE while connecting to an AP. Please
note that STA mode sets a security threshold, i.e, it was able to
connect to a WPA3-SAE network prior to this change because it
connects to an equally or more secure network than the set
threshold. Considering this patch, the device is now able to
ignore WPA2-PSK APs when WPA3 is set.
2023-05-03 23:23:31 +08:00
Tiago Medicci Serrano
9ede7d4650 esp32s3/wifi: add support to WPA3 on Station Mode
Add support to select WPA3-SAE while connecting to an AP. Please
note that STA mode sets a security threshold, i.e, it was able to
connect to a WPA3-SAE network prior to this change because it
connects to an equally or more secure network than the set
threshold. Considering this patch, the device is now able to
ignore WPA2-PSK APs when WPA3 is set.
2023-05-03 23:23:31 +08:00
zhangyuan21
884be2bdb9 assert: Distinguish between assert and exception
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-03 14:49:32 +08:00
simbit18
79574c18d8 arch: Fix nxstyle errors
error: Long line found
2023-05-02 18:31:40 -06:00