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4041 Commits

Author SHA1 Message Date
Gregory Nutt
df319fe19d Port hub support to LPC31 from SAMA5; Updated Olimex-LPC-H3131 for hub support and refresh configurations 2015-04-26 12:18:08 -06:00
Gregory Nutt
31c835975d Another hub-related interface change: Need to pass speed to EP0 2015-04-26 09:53:43 -06:00
Gregory Nutt
08a4ae6b64 LPC17 OHCI: Fix an error in ED list removal 2015-04-25 14:52:01 -06:00
Gregory Nutt
6d41087491 Fixes some crashes when the hub is removed and/or reinserted 2015-04-25 12:16:22 -06:00
Gregory Nutt
76ff0fce86 Add missing logic to destroy a class when the device is no longer connected to the hub port 2015-04-25 11:17:37 -06:00
Gregory Nutt
926616121d USB OHCI: Need to preserve the speed bit when reconfiguring ep0 2015-04-25 07:48:20 -06:00
Gregory Nutt
67f5b089c7 Copy some control port framework from LPC17 to SAMA5 OHCI; Copy some speed handling from SAMA5 OHCI to LPC17 2015-04-25 06:46:44 -06:00
Gregory Nutt
9a72400bef LPC17 USB host: Direction bit being set wrong from allocated control endpoints 2015-04-24 19:46:00 -06:00
Gregory Nutt
9a6155952a HUB class must cancel any pending interrupt IN transfers before destroying the endpoint 2015-04-24 12:18:25 -06:00
Gregory Nutt
a7539956c0 If asynchronous tranfers are supported, then there must also be a mechanism to cancel the pending transfer 2015-04-24 11:23:52 -06:00
Gregory Nutt
27516e0119 USB hub: Fixes for some port status change handling 2015-04-24 09:57:59 -06:00
Gregory Nutt
dc6adde740 Merge remote-tracking branch 'origin/master' into usbhub 2015-04-23 14:06:18 -06:00
Gregory Nutt
d77a19f0a2 Two r's and only two r's in the word interrupt 2015-04-23 14:04:43 -06:00
Gregory Nutt
43c19037bb Fix USB hub bugs: Don't allocate port EP0 until needed, otherwise run out of endpoints; using wrong pointer to access child endpoint array in a few places 2015-04-23 09:42:58 -06:00
Gregory Nutt
299addc958 Fix USB host polling; fix a typo in LPC17 HCD 2015-04-23 07:13:31 -06:00
Gregory Nutt
ba661f2735 Merge in from Master 2015-04-23 06:34:49 -06:00
Gregory Nutt
569893491a USB hub: Add some hub-related configuration settings 2015-04-22 17:16:35 -06:00
Gregory Nutt
dd56308ce7 USB Hub: Initial implementation asynchronous pipe I/O in the LPC17 HCD needed for hub support 2015-04-22 15:03:25 -06:00
Gregory Nutt
dd6c69cc06 USB hub: Change to connection interface so that applications can deal with external hubs 2015-04-22 12:28:19 -06:00
Gregory Nutt
aaeb9843d6 STM32 RTC counter: Include enable/disable backup domain within critical section. Per recommendtion of Alexander Oryshchenko. 2015-04-21 18:08:31 -06:00
Gregory Nutt
5189dd7074 USB HCDs: Add hooks for the async method 2015-04-21 15:43:12 -06:00
Gregory Nutt
28647cf705 LPC17 USB HCD: Adapted to new interface 2015-04-21 13:11:32 -06:00
Gregory Nutt
d2350c9c86 USB host: Integrate logic to assign device function address 2015-04-21 12:17:49 -06:00
Gregory Nutt
326cbc0f05 SAMA5 EHCI: Fix some compile errors when debug is enabled 2015-04-21 09:28:42 -06:00
Gregory Nutt
a907a825c6 SAMA5 EHCI: Remove unused variable from structure 2015-04-21 09:18:31 -06:00
Gregory Nutt
5af46ed7e4 SAMA5 OHCI and EHCI: Now conform to new interfaces to support hubs 2015-04-21 08:59:30 -06:00
Gregory Nutt
47f2a0b09d STM32 F1 RT Counter: Another fix from Darcy Gong 2015-04-19 07:05:39 -06:00
Gregory Nutt
2d2f645e77 STM32 F1 RTC Counter: Now need to enable backup domain write access when setting the time. From Darcy Gong 2015-04-19 06:58:07 -06:00
Gregory Nutt
4c0b8fba52 Fix an error introduced into stm32_pwr_enablebkp(). That function must preserve the previous state of backup domain access on return. 2015-04-18 07:31:20 -06:00
Gregory Nutt
383f6c52dd STM32 - cosmetic changes to indentation 2015-04-16 16:35:06 -06:00
Gregory Nutt
5f7f2b6461 STM32 DMA2D: Use helper function when freeing layers. From Marco Krahl 2015-04-16 11:16:14 -06:00
Gregory Nutt
5d221fa356 Add support for the new DMA2D features to the STM32F429i-Disco LTDC configuration. From Marco Krahl. 2015-04-16 09:11:53 -06:00
Gregory Nutt
7a6a5b7bd0 Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer). 
The main features are:

1. DMA2D interface
   Supports the nuttx pixel formats:
   - FB_FMT_RGB8
   - FB_FMT_RGB24
   - FB_FMT_RGB16_565
   Dynamic layer allocation during runtime for the supported formats
   - The number of allocatable layer can be configured.
   Supported dma2d operation:
   - blit (Copy content from source to destination layer) also works with
     selectable area.
   - blend (Blend two layer and copy the result to a destination layer wich can
     be a third layer or one of the source layer) also works with selectable
     area.
   - fillarea (Fill a defined area of the whole layer with a specific color)

As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.

2. LTDC interface

   I have changed the api for the currently non implemented operations:
   - blit (Copy content from a dma2d layer to an ltdc layer) also works with
     selectable area.
   - blend (Blend two dma2d layer and copy the result to a destination ltdc
     layer) also  works with selectable area.

     Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
     is a layer referenced by the dma2d interface.

     One of the most important questions for me was, How can i flexible use an
     ltdc layer with the dma2d interface, e.g. as source layer for dma2d
     operations?
     Get the layer id of the related dma2d layer by a special flag when using
     getlid() function of the ltdc interface and use the layer id to reference
     the specific dma2d layer by the dma2d interface.

     The ltdc coupled dma2d layers are predefined and can't be dynamically
     allocated of freed. They use the same frame buffer memory and the same
     color lookup table.

   Changes:
   - layer internal format of the clut table
   - interrupt handling for register reload (vertical vblank) instead using
     waiting loop
   - small fixes and refactoring

From Marco Krahl.
 2015-04-16 09:11:52 -06:00
Gregory Nutt
c62fe184bf Calypso/Compal_e86 update from Craig Comstock 2015-04-16 09:11:47 -06:00
Gregory Nutt
8172e4cec1 More places where watchodg mispelled 2015-04-15 21:36:30 -06:00
Gregory Nutt
cbcfb44942 STM32 IWDG typo fix. from chenming582892 2015-04-15 20:13:56 -06:00
Gregory Nutt
2f1bc0be1e Update comments 2015-04-15 16:38:08 -06:00
Gregory Nutt
9b7c128758 Add option to enable stackcheck per architecture 2015-04-12 06:30:24 -06:00
Gregory Nutt
6b7a0cb3b8 Revert commit b80e8be652dfa52e97daa65aa3e550cf31cb2409 2015-04-12 06:26:50 -06:00
Gregory Nutt
9ece96b6d3 Remove all traces of CONFIG_ARMV7M_STACKCHECK 2015-04-11 10:01:44 -06:00
Gregory Nutt
0a675b8ca4 STM32 changes from David Sidrane 2015-04-11 07:19:20 -06:00
Gregory Nutt
2cdc5f99b9 STM32 CAN: More places where FR instead FIR used 2015-04-09 19:30:19 -06:00
Gregory Nutt
321ccb3ba3 Fix several typos in comments 2015-04-09 16:13:03 -06:00
Gregory Nutt
abea446dfa Missing i found by David Sidrane 2015-04-09 15:16:05 -06:00
Gregory Nutt
929ea217c7 Remove executable flag from more .c and .h files 2015-04-09 08:20:57 -06:00
Gregory Nutt
fe38ca23e5 Cosmetic 2015-04-09 07:59:31 -06:00
Gregory Nutt
a93913c0f4 SAMA5 Serial: Reading IMR and disabling interrupt must be atomic 2015-04-08 15:27:31 -06:00
Gregory Nutt
35312b31f9 SAM3/4 and SAMV7 UART: The IMR register is read-only. This means that sam_restoreints() does not actually re-enable UART interrupts. 2015-04-08 15:04:10 -06:00
Gregory Nutt
9e1a7113f7 SAMA5 Serial: Fix a couple of errors backporting termios and flowcontrol 2015-04-08 14:35:04 -06:00
Gregory Nutt
27bb133294 SAM3/4 and SAMV7 Serial: Serial interrupts left disabled. 
A side-effect of changing serial settings via TERMIOS (such as tcsetattr) is that serial interrupts were being left disabled.  This is not a problem if the serial configuration is changed when there are no open references to the serial device.  In that case, serial interrupts are disabled and will not be enabled enabled until the serial device is first opened.  But it is fatal if the serial device is already opened and if there is a task waiting to receive data.  In that case, the side-effect of disabling interrupts is fatal:  That task is then left hanging with interrupts disabled.
 2015-04-08 14:14:01 -06:00
Gregory Nutt
d88c9b05f2 SAMA5D Serial: Backup support for flowcontrol and termios from SAM3/4 -- UNVERIFIED 2015-04-08 14:13:08 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
dd3457173d Implements CONFIG_TIME_EXTENDED as we discussed relative to providing the last 3 members of the tm struct and support for filling them in and even using the wday in the STM32 RTC. From David Sidrane. 2015-04-08 06:56:43 -06:00
Gregory Nutt
c226d51c3c STM32: Another fix to RTC magic register from David Sidrane 2015-04-06 17:21:53 -06:00
Gregory Nutt
e0a49a81e4 Add conditional logic so that people who use F1 don't have to be bother with meaningless RTC MAGIC settings 2015-04-06 16:35:56 -06:00
Gregory Nutt
8461827dcd STM32 RTCC: Make back-up register and magic value used by RTCC configurable. From David Sidrane 2015-04-06 16:26:59 -06:00
Gregory Nutt
e1e0fc259c Typo fixes from David Sidrane 2015-04-06 15:27:37 -06:00
Gregory Nutt
da007c4f17 Minor changes to SAMV7 USB register definition file from review 2015-04-06 13:00:48 -06:00
Gregory Nutt
5dab61f434 SAMV7 USB device: Finish option to force full speed mdoe 2015-04-06 10:07:12 -06:00
Gregory Nutt
6f9f4bd9a3 Calypso: SPI built only if CONFIG_SPI 2015-04-05 13:26:25 -06:00
Gregory Nutt
faa11b6e64 Update comments and README 2015-04-05 07:22:46 -06:00
Gregory Nutt
63b5863f33 SAMV7: Fix SDRAM initialization instabiilties by changing the order of initialization 2015-04-04 19:58:31 -06:00
Gregory Nutt
accdce0a84 SAMV7: Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work! The data sheet says that there is no clock control for SDRAMC 2015-04-04 19:04:29 -06:00
Gregory Nutt
e44201ce5f SAMV7: Fix a errort in GPIO bit encoding. Correct naming of a variable 2015-04-04 16:54:53 -06:00
Gregory Nutt
1f8ee8a5ac SAMV7: Fix typo in some GPIO definitions 2015-04-04 14:04:58 -06:00
Gregory Nutt
9ac9bcc28e SAMV71-XULT ILI9488 LCD driver is code complete but untested 2015-04-03 16:36:58 -06:00
Gregory Nutt
841854956a SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver. The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488. 2015-04-03 10:28:32 -06:00
Gregory Nutt
69d2d77424 Move include/nuttx/timer.h, rtc.h and watchdog.h to include/nuttx/timers/. 2015-04-01 12:37:44 -06:00
Gregory Nutt
e5fd084af2 SAMV71-XULT: Add option to support connection of the maXTouch Xplained Pro on the 50-pin LCD connector 2015-03-31 09:01:38 -06:00
Gregory Nutt
0e9f358060 SAMV7 Ethernet: Fix a write-past-end-of-buffer and trash-the-heap problem 2015-03-29 16:45:05 -06:00
Gregory Nutt
f073092fad The STM32F4Discovery board doesn't come with a Low speed external oscillator so the default LSE source for the RTC doesn't work. 
In stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI. The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call that rightfully enables the lsi clock; but the next times, when the rtc is already setup, the rtc_resume() call does NOT start the lsi clock!

The right place to put LSE/LSI initialisation is inside stm32_stdclockconfig() in stm32fxxxxx_rcc.c.  Doing this I checked the possible uses of the LSI and the LSE sources: the LSI can be used for RTC and/or the IWDG, while the LSE only for the RTC (and to output the MCO1 pin)..

This change is not verifed for any other platforms.

From Leo Aloe3132
 2015-03-29 15:34:48 -06:00
Gregory Nutt
d3beea967d Cortex-M7: Add support for enabled the D-Cache in write only mode. 
SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
 2015-03-29 14:42:03 -06:00
Gregory Nutt
ae0b0ca3fd SAMV7/Cortex-M7: Add support for write through D-Cache. SAMV7 Ethernet look like it needs this 2015-03-29 13:09:22 -06:00
Gregory Nutt
18b26dc8e6 Clean up pointer handling to make code more readability. This re-introduces the compiler optimization problem but this is the correct thing to do. I will have to drop back from -Os to -O2. 2015-03-28 14:46:35 -06:00
Gregory Nutt
b15cd1653f SAMV7 EMAC: Fix alignment issue: RX buffers need to be invalidated. This means the alignment of buffers must be at least to the data cache line size at both ends of the buffer 2015-03-28 13:09:01 -06:00
Gregory Nutt
afd737ddcc SAMV7 EMAC: Sometimes TX is not started when TSTART is set??? Workaround seems to be to set it twice. Restored full optimization. Also CONFIG_NET_NOINTS is set so that interrupt level provessing is avoided 2015-03-28 09:42:45 -06:00
Gregory Nutt
750fad37f0 SAMV7 Ethernet: Fix some errors in circular queue handling 2015-03-27 13:04:43 -06:00
Gregory Nutt
dd33bb14ac Fix another typo in the modified assertion logi 2015-03-27 13:02:46 -06:00
Gregory Nutt
a8cba44e0f Fix a typo in the last commit 2015-03-27 10:58:52 -06:00
Gregory Nutt
08d54685a1 SAMV7 Ethernet+USB Updates 2015-03-27 10:47:03 -06:00
Gregory Nutt
c6bcf3b8a5 ARMv7-M: Add logic to dump all stack usage on a crash 2015-03-27 10:45:39 -06:00
Gregory Nutt
3f0e716f48 Updated comments/README 2015-03-26 12:33:03 -06:00
Gregory Nutt
cf8f8b8c4a SAMV6 USB updates 2015-03-26 09:49:01 -06:00
Gregory Nutt
f267af5af8 SAMV7 USB: Move clock initialization back to sam_clockconfig.c; add seperate UTMI register definition header file; fix a couple of typo bugs 2015-03-26 07:56:26 -06:00
Gregory Nutt
59ad69ba2e SAMV7 USB: Replace 0 with something a little more informative 2015-03-25 18:59:59 -06:00
Gregory Nutt
88a21f5d2f SAMV7 USB: Add some conditioned out test code 2015-03-25 18:45:04 -06:00
Gregory Nutt
a4b9e89e4e Add UTMI register definitions 2015-03-25 18:09:41 -06:00
Gregory Nutt
0253741178 SAMV7 USB: More changes 2015-03-25 17:19:36 -06:00
Gregory Nutt
86883b6d9e SAMV7 USB: more updates 2015-03-25 15:56:10 -06:00
Gregory Nutt
6b5fd920ed SAMV7 USB DCD: A few more fixed from early intergration. Still does not work 2015-03-25 09:04:51 -06:00
Gregory Nutt
43d6e5f13c SAMV7 USB: More fixes at beginning of testing. Still a long way from working 2015-03-25 08:06:59 -06:00
Gregory Nutt
157f42ff07 SAMV7 USB DCD is code complete and ready for test 2015-03-24 14:30:53 -06:00
Gregory Nutt
e4d1abe403 SAMV7 USB: Updates to interrupt handling logic 2015-03-24 14:07:20 -06:00
Gregory Nutt
4505835858 SAMV7 USB: Updates to endpoint configuration logic 2015-03-24 11:19:34 -06:00
Gregory Nutt
a36dc5d143 SAMV7 USB: Updates to early initialization logic 2015-03-24 10:05:21 -06:00
Gregory Nutt
b58bc6f74c Fix typo from last commit 2015-03-23 18:40:35 -06:00
Gregory Nutt
135ab91f5e Tiva: Remove unconditional debug output from GPIO code 2015-03-23 18:28:18 -06:00
Gregory Nutt
a642b9c3dd Tiva: Fix compile errors when GPIO interrupts are not enabled 2015-03-23 17:51:13 -06:00
Gregory Nutt
61904da368 SAMV7: Add framework for USB DCD. Initial check-in is just the SAMA5 USB DCD with naming changes to get a clean compilation. Needs careful review and comparison with datasheet and, of course, testing 2015-03-23 14:06:53 -06:00
Gregory Nutt
79ff3618e4 Update some recent Tiva changes so that old LM3S parts at least still build (but have not been retested) 2015-03-23 11:21:26 -06:00
Gregory Nutt
fedc213eec - ADC driver has been re-organized; configuration is now handled in code 
instead of Kconfig to help reduce bloat and confusion.
- Timer changed to remove ADC coupling in Kconfig to code and moved
configuration up from arch/arm/src/tiva to configs/tm4c123g-launchpad/src.
- GPIO driver needed small fixes in the configuration routines and
discovered false-positive bugs in interrupt testing: interrupts are now
verified to actually be working reliably.
- Attempt to apply some consistency in the tiva arch/ level's interface
to the config/board/ level driver configuration.

From Calvin Maguranis
 2015-03-23 09:12:52 -06:00
Gregory Nutt
4726c1e460 PIC23MX Starter Kit: Looks like we need to use a different linker script with Pinguino 2015-03-21 15:40:22 -06:00
Gregory Nutt
7d14b172ce SAMV7: A little more USB-related stuff 2015-03-21 08:54:01 -06:00
Gregory Nutt
948531c352 SAMV7: Add configuration logic and clock setup for USB device 2015-03-21 07:28:59 -06:00
Gregory Nutt
36c523bd9d SAMA5: Fix a typo in the Kconfig file 2015-03-21 06:22:04 -06:00
Gregory Nutt
e835af5840 SAMV7: Add USBHS register defintiion header file 2015-03-20 14:08:33 -06:00
Gregory Nutt
e68baa3073 Include chip/sam_spi.h in sam_spi.h 2015-03-20 11:09:36 -06:00
Gregory Nutt
5b3fe34ffb SAMA5D3: Fix typos in timer/counter header file. From Bob Doiron 2015-03-20 09:19:10 -06:00
Gregory Nutt
db52134d47 STM32 RTC lower-half: Fix some errors that cause compilation failures. From shilo.xyz 2015-03-19 12:56:47 -06:00
Gregory Nutt
e319870ac9 SAMV5 EMAC: A few more fixes. Neccessary but not sufficient 2015-03-19 08:54:50 -06:00
Gregory Nutt
6db55da159 SAMV7 Ethernet: Fix an order problem that left RX and TX disabled 2015-03-18 18:07:07 -06:00
Gregory Nutt
fb3fe58b58 SAMV7: Add a sneak internal interface that will allow us to set the MAC address before NSH even starts 2015-03-18 17:23:40 -06:00
Gregory Nutt
7e95bfe8d0 SAMV7: Updates to Ethernet driver based on comparison with Atmel sample code. Add configuration for other PHY GPIOs. Still no Ethernet interrupts 2015-03-18 15:55:00 -06:00
Gregory Nutt
824f486bdf SAMV7 Ethernet: Support getting IP address from the XULT AT24 EEPROM 2015-03-17 14:29:41 -06:00
Gregory Nutt
4ce927168f SAMV7 EMAC: Fix range of MCK dividers 2015-03-17 11:19:46 -06:00
Gregory Nutt
ae433eaa84 SAMV7: Use D-Cache clean/flush/invalidate by range in EMAC and XDMAC drivers 2015-03-17 09:28:27 -06:00
Gregory Nutt
108f722626 Break ARMv7E-M cache operations into separate files; Finish the unimplemented cache operations 2015-03-17 08:48:41 -06:00
Gregory Nutt
a590bdc737 SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling 2015-03-16 13:51:37 -06:00
Gregory Nutt
8a73d9b8ea SAMV7: Add Ethernet MAC register definition header file 2015-03-16 11:46:20 -06:00
Gregory Nutt
83a17af442 This commit enables HSMCI functionality in the SAMV71-XULT. TX DMA is, unfortunately, currently disabled. 2015-03-15 12:17:39 -06:00
Gregory Nutt
db2d9abcfa SAMA5: Fix a bug in SAMA5 HSMCI. The bitfield mask and shift values were reversed resulting in a trashed value for the number of blocks in the BLOCKR register. This was sufficient to prevent DMA writes from working. 2015-03-15 09:35:48 -06:00
Gregory Nutt
88d3eab435 SAMV7 XDMA: Fix a problem with invalidating the cache on RX DMA 2015-03-14 15:25:32 -06:00
Gregory Nutt
801d556452 EFM32: Add I2C driver. From Pierre-noel Bouteville 2015-03-14 14:47:53 -06:00
Gregory Nutt
b24ad6ae63 SAMV7: More SDRAM logic. It does still does not work 2015-03-14 13:27:00 -06:00
Gregory Nutt
fe09227cd5 SAMV71-XULT: Add support for SDRAM (unverified) 2015-03-14 11:00:46 -06:00
Gregory Nutt
2976594cfe Include correct chip file 2015-03-14 09:15:11 -06:00
Gregory Nutt
c32190c58d SAMV7: Add SDRAMC register definition header file 2015-03-14 09:13:51 -06:00
Gregory Nutt
6b1202d17f SAMV7 HSMCI: Change system bus interfaces seems to eliminate DMA failures. 2015-03-13 14:35:36 -06:00
Gregory Nutt
c2049956a4 Minor updates from initial debugging. 2015-03-13 13:46:27 -06:00
Gregory Nutt
0cae7563e8 SAMV7 HSMCI: Reading response registers at the wrong time can cause loss of response data. 2015-03-13 12:46:33 -06:00
Gregory Nutt
cbfe1c7699 SAMV7: Fix some cloning errors. SAMA5->SAM7 2015-03-13 10:38:10 -06:00
Gregory Nutt
a08378ce72 Fix a typo in a Cortex-M7 address 2015-03-13 10:37:21 -06:00
Gregory Nutt
265af48120 STM32 serial: Make input hardware flow-control work with RX DMA. From Jussi Kivilinna 2015-03-13 07:18:21 -06:00
Gregory Nutt
b8476c7ee8 STM32: Fix RX DMA setup for UART5. From Jussi Kivilinna. 2015-03-13 07:06:46 -06:00
Gregory Nutt
8f59fc8f64 SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7 2015-03-12 18:03:41 -06:00
Gregory Nutt
0d79e315fd SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out. 2015-03-12 16:00:38 -06:00
Gregory Nutt
26cf5a35a9 SAMV71-XULT: Enable I2C and the I2C tool in the NSH configuration 2015-03-12 12:27:06 -06:00
Gregory Nutt
9b6c7661a4 SAMV7: Add TWI/I2C driver (untested) 2015-03-12 10:58:11 -06:00
Gregory Nutt
ca48fbfc4a SAMV7: Add SPI header files and driver 2015-03-12 09:12:37 -06:00
Gregory Nutt
f8c73c3499 stm32: usbdev: Fix stale initialization invalidating later NULL check. From Juha Niskanen 2015-03-12 08:08:50 -06:00
Gregory Nutt
47b225848d ARMv7-M MPU. Bad syntax will cause failure to write the correct value to the MPU_RASR register. From Juha Niskanen 2015-03-12 08:00:53 -06:00
Gregory Nutt
6511afa1c2 stm32_i2c: Add missing NULL check. From Juha Niskanen 2015-03-12 07:53:41 -06:00
Gregory Nutt
8d31651a1b Bringing PPPD yet closer to the NuttX coding style 2015-03-11 18:47:04 -06:00
Gregory Nutt
a4f1c636a3 SAMV7-XULT: Integrate button support and apps/examples/buttons into the NSH configuration 2015-03-11 14:41:58 -06:00
Gregory Nutt
a47d2eecce SAMV7: Correct low-level console output 2015-03-11 14:39:32 -06:00
Gregory Nutt
d8a99fb73f SAMV71-XULT: Enable 64-bit floating point support 2015-03-11 12:30:14 -06:00
Gregory Nutt
6dfc859e6f SAMV71-XULT: Switch to the ARM GNU tools for Embbeded tools that actually support Cortex-M7 2015-03-11 12:16:27 -06:00
Gregory Nutt
4285029fa1 SAMV7-XULT: Enable I- and D-caches, correct polaty of LEDs 2015-03-11 11:23:19 -06:00
Gregory Nutt
f72079cc63 Update COPYING file with special license requirements for PPPD 2015-03-11 09:14:15 -06:00
Gregory Nutt
b5980f024d SAMV71-XULT: Some bugfixes from early bring-up work 2015-03-10 16:11:28 -06:00
Gregory Nutt
3e5d0f8c7e Tiva TimerLib: Fix a typo in peripheral waiting logic: gptm, not gpio. From Bradley Noyes 2015-03-10 12:16:40 -06:00
Gregory Nutt
522462a1b1 SAMV7: Add logic to enable/disable TCMs 2015-03-10 11:32:05 -06:00
Gregory Nutt
9e10f868eb SAMV7: Update floating point and TCM configuration options. Update TODO list. Update comments. Refresh a configuration 2015-03-10 07:50:32 -06:00
Gregory Nutt
d6fce04562 Cosmetic changes to conditional compilation 2015-03-09 18:14:31 -06:00
Gregory Nutt
13cb5252bb Remove some traiilng whitespace 2015-03-09 15:42:35 -06:00
Gregory Nutt
1310ad28cf Cortex-M7: Add cache operations 2015-03-09 15:42:07 -06:00
Gregory Nutt
29dbba1693 Cortex-M7: Add cache operations 2015-03-09 15:41:48 -06:00
Gregory Nutt
aa22bec093 SAMV7: Leverage XDMAC driver from the SAMA5D4. 2015-03-09 10:11:12 -06:00
Gregory Nutt
ac52af5991 SAMV71-XULT: Add support for on-board LEDs. Includes partial support for on-board buttons. Some corrections fo to egg-stk37000 and sam4e-ek discovered during leveraging. Add board READEM.txt file 2015-03-09 08:23:09 -06:00
Gregory Nutt
f696530485 SAMV7: Add GPIO interrupt support 2015-03-08 19:32:05 -06:00
Gregory Nutt
dbb972b2f7 SAMV71: Add GPIO library support 2015-03-08 19:12:30 -06:00
Gregory Nutt
ed0fa0358c SAMV7: Add PIO register definition header file 2015-03-08 17:34:26 -06:00
Gregory Nutt
bbf80bbd5d SAMV71: Add pin mapping definitions 2015-03-08 13:24:32 -06:00
Gregory Nutt
ed1920ff76 SAMV71: Fix a few typos; Use factional value in BAUD calculation 2015-03-08 12:27:55 -06:00
Gregory Nutt
9d32caaa2c SAMV7: Add serial driver 2015-03-08 10:15:42 -06:00
Gregory Nutt
5b72858f0c SAMV71: Add UART register definition header file 2015-03-08 08:42:22 -06:00
Gregory Nutt
521de710b8 EFM32 updates from Pierre-noel Bouteville 2015-03-08 07:12:47 -06:00
Gregory Nutt
2571d6202d SAMV71-XULT: Add heap allocation logic 2015-03-07 11:46:54 -06:00
Gregory Nutt
b1cecdd3ea SAMV7: Add interrupt-related logic 2015-03-07 11:16:44 -06:00
Gregory Nutt
3c8d6e171f SAMV7: Add basic clock and timer ISR configuration logic 2015-03-07 10:32:47 -06:00
Gregory Nutt
5812dc263f SAMV71: Add EEFC register definition header file 2015-03-06 16:39:18 -06:00
Gregory Nutt
7f92f22167 SAMV71: Add Supply Controller register definition header file 2015-03-06 15:27:51 -06:00
Gregory Nutt
7113de4d18 SAMV71: Add PMC register definition header files 2015-03-06 14:58:13 -06:00
Gregory Nutt
6e6b9483ea SAMV71: More updates on the way to a clean build. Still more to do to complete that journey 2015-03-06 12:13:09 -06:00
Gregory Nutt
fdac423979 Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71. 2015-03-06 10:53:57 -06:00
Gregory Nutt
93a6b16718 Add a bare bones framework that will do nothing more than support configuration for the Atmel SAMV71 Xplained Ultra board. Very much a work in progress. 2015-03-06 08:56:44 -06:00
Gregory Nutt
9bcdf974a0 Add new common lazy FPU state saving option for ARMv7-M. Not yet verified 2015-03-06 08:26:43 -06:00
Gregory Nutt
3b798f6ef1 SAM3/4: Leverage some start-up logic from STM32 2015-03-05 17:45:13 -06:00
Gregory Nutt
89fd098a20 SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions 2015-03-05 16:34:22 -06:00
Gregory Nutt
10cfa3b7a5 Fix typo in file name 2015-03-05 15:48:48 -06:00
Gregory Nutt
f4ec5efe3a SAMV71: Add memory map header file 2015-03-05 15:47:29 -06:00
Gregory Nutt
67c21e6817 SAMV7 Kconfig: Add peripheral selections 2015-03-05 13:51:39 -06:00
Gregory Nutt
7704145bd3 Make ARM build system Cortex-M7 ready 2015-03-05 11:25:27 -06:00
Gregory Nutt
02e613b277 Add basic build directories and configuration logic for the SAMV7 family 2015-03-05 10:00:24 -06:00
Gregory Nutt
b6b50f5f42 Fix some BBRAM return values (from David Sidrane). Also some MTD-related cosmetic changes 2015-03-05 08:08:11 -06:00
Gregory Nutt
5158e10bc2 Fix two uses of DEBUG_COLORATION vs STACK_COLORATION (from David Sidrane). Also some corrected comments 2015-03-05 06:41:14 -06:00
Gregory Nutt
a5043d5e60 Add support for dumping board-specific information on assertion. From David Sidrane 2015-03-04 07:00:29 -06:00
Gregory Nutt
466b69fe00 Add missing SPI callback functions to the STM32 SPI driver. From Freddie Chopin 2015-03-04 06:52:46 -06:00
Gregory Nutt
a278893c69 Fix issues when AES support was added for the STM32L1. From Juha Niskanen 2015-03-04 06:38:03 -06:00
Gregory Nutt
32067448d7 Add support for new STM32L1 chip variant. From Juha Niskanen 2015-03-04 06:33:44 -06:00
Gregory Nutt
5eba2afbd6 STM32 BBSRAM driver updated by David Sidrane 2015-03-03 16:05:24 -06:00
Gregory Nutt
33ac85adcb Adds architecture support for the STM32F372 and F373 (no board support yet). Only tested on STM32F373CC, but should work on the rest. Contributed by Marten Svanfeldt. 2015-03-02 10:33:42 -06:00
Gregory Nutt
429863f348 arch/: board function prototypes are now in include/nuttx/board.h. Remove from architecture header file; Add inclusion of nuttx/board.h to all files referencing board functions 2015-02-27 17:19:38 -06:00
Gregory Nutt
8fa7c8d4fa Tiva ADC: Drive updates from Calvin Maguranis 2015-02-25 13:38:22 -06:00
Gregory Nutt
59412f25ce SAM4CM free-running time: Change overflow type from uint16 to uint32. From Max Neklyudov. 2015-02-25 08:12:31 -06:00
Gregory Nutt
70c8ff6581 Eliminate some warnings 2015-02-25 08:05:35 -06:00
sauttefk
a6695b442e Fix SSI TX and RX legacy mapping of TM4C1294NC 2015-02-24 03:31:12 +01:00
Gregory Nutt
0dc70108b8 STM32: Fix for compilation introduced by last backup RAM change. Not sure it it is correct, be now things do compile 2015-02-21 17:51:03 -06:00
Gregory Nutt
63711ad338 Adds the ability to use the STM32F2 and STM32F4 Battery Backedup SRAM in the file system. With an option to Save Panic context to one of the files. From David Sidrane. 2015-02-21 15:15:51 -06:00
Gregory Nutt
7d43cf2087 Changes to support fully write protecting the backup domain. N.B. stm32_pwr_enablebkp did not account for the delay from enable to the domain being writable. The KISS solution is a up_udelay. A more complex solution would be a negated write test with restore. From David Sidrane. 2015-02-21 14:53:33 -06:00
Gregory Nutt
2d91128111 Tiva GPIO clean-up by Calvin Maguranis 2015-02-20 13:40:25 -06:00
Gregory Nutt
a0a553f3e9 Tiva: Move GPIIO prototypes out of arch/arm/include/tiva/irq.h to arch/arm/tiva/tiva_gpio.h where they belong 2015-02-20 13:31:43 -06:00
Gregory Nutt
ac0cd3655a Fix some time value changes; mostly changing greater than 1000000000 to greater than or equal to 1000000000. From Juha Niskanen 2015-02-20 07:07:36 -06:00
Gregory Nutt
2532e33de2 VFS: The inode unlink method should not be support if operations on the root pseudo-filesystem are disabled. 2015-02-18 09:34:58 -06:00
Gregory Nutt
d3196ca5c3 The RTC ioctl() method is now a configuration option 2015-02-18 08:23:10 -06:00
Gregory Nutt
57eb72a13f Add an IOCTL method to the RTC interface 2015-02-18 08:05:31 -06:00
Gregory Nutt
80cb25a0ff Tiva ADC: Should not have its own ADC debug. Should use the common Analog debug 2015-02-17 14:54:56 -06:00
Gregory Nutt
7354e41aa6 Tiva: Updated files to allow for ADC triggering by the timer. I’ve cleaned up some parts of the ADC code, too, and fleshed out the PWM triggering ioctl. From Calvin Maguranis 2015-02-17 13:50:30 -06:00
Gregory Nutt
d578829ddd Tiva SPI: Cosmetic improvements 2015-02-17 12:45:47 -06:00
Gregory Nutt
56b29b00ea EFM32 USB Device: Is not basically functional with this change. From Pierre-noel Bouteville. 2015-02-16 15:45:49 -06:00
Gregory Nutt
ff6b34967b Fix a compilation error. From Macs Neklyudov 2015-02-16 14:30:15 -06:00
Gregory Nutt
0081b0840b Missed a Kconfig definition in the last commit 2015-02-16 10:41:12 -06:00
Gregory Nutt
c747521953 STM32 RTC: Extend the RTC interface to support reading subseconds. From Jussi Kivilinna 2015-02-16 07:18:09 -06:00
Gregory Nutt
529bc9626c Add support for RTC driver to the STM32F4-Discovery board 2015-02-15 10:11:01 -06:00
Gregory Nutt
68d39b69aa Remove an unused variable 2015-02-15 08:51:39 -06:00
Gregory Nutt
726b0d5f58 RTC: A little more clean-up of the RTC driver 2015-02-15 08:19:23 -06:00
Gregory Nutt
53322a50f4 STM32 RTC: Implement the rdtime() method of the RTC lower half interface 2015-02-13 13:56:22 -06:00
Gregory Nutt
702f155fd0 STM32 RTC driver lower half: Implement the settime method of the RTC interface 2015-02-13 13:36:15 -06:00
Gregory Nutt
b0b6747d49 Break out a new internal interface, stm32_rtc_setdatetime(). This eliminates some un-necessary time conversions. From Freddie Chopin. 
Add a skeleton implementation of the RTC lower half interface at arch/arm/src/stm32/stm32_rtc_lowerhalf.c.  This is just the framework for the RTC lower half.  None of the interface methods have yet been implemetned.
 2015-02-13 12:56:58 -06:00
Gregory Nutt
c662563b83 Forgot to add a file in the last commit 2015-02-13 10:05:10 -06:00
Gregory Nutt
501bc15fbd RTC: Remove all backdoor interfaces from rtc.h 2015-02-13 08:41:34 -06:00
Gregory Nutt
d1fa95ffc3 Merge commit 'd000b0ac237cb6b17e3d355b55250c3ca7e9f2d6' 2015-02-11 18:07:03 -06:00
sauttefk
7384d3bd79 Add TI EK-TM4C1294XL launchpad support 2015-02-12 00:30:38 +01:00
Gregory Nutt
24e51794f9 Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg 2015-02-11 07:15:45 -06:00
Gregory Nutt
28c2d93212 LP17 Ethernet Driver: Fix some compile problems when IPv6 is enabled 2015-02-10 15:23:11 -06:00
Gregory Nutt
5566a458d1 LPC17xx: Add IPv6 support to the LPC17 Ethernet driver. Untested... I no longer have a proper environment for LPC17 debug. 2015-02-10 14:04:08 -06:00
Gregory Nutt
9e6cd16a8b SAM4 Ethernet Driver: No supports operation using the high priority work queue so that packet processing can occur outside of interrupt level processing. 
SAM4E-EK: The nsh configuration now configures the Ethernet driver for execution on the HP work thread.
 2015-02-10 11:10:55 -06:00
Gregory Nutt
8b0d9fb456 Fix some warning 2015-02-09 18:24:31 -06:00
Gregory Nutt
0a6ae631dc Clone the SAMA5D4 IPv6 support to the SAM4E EMAC and SAMAd3 EMAC and GMAC drivers. 2015-02-09 17:16:55 -06:00
Gregory Nutt
f0d318c124 Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test. 2015-02-09 16:12:11 -06:00
Gregory Nutt
08677542dc SAMA5D Ethernet: Add support for CONFIG_NET_NOTINTS so that the driver can operate from the work queue thread instead of doing everything from the interrupt level. 2015-02-09 15:26:05 -06:00
Gregory Nutt
25f187d754 ARMv7-A interrupt handler: Should not automatically re-enable interrupts on interrupt return. That interferes with the driver's ability to manage interrupts. 2015-02-09 15:24:31 -06:00
Gregory Nutt
fa580e17cf Oops... Conditioned on IPv4 wheren IPv6 was intended 2015-02-09 14:16:32 -06:00
Gregory Nutt
987715e8a3 Fix IPv4-dependend debug output 2015-02-09 13:18:31 -06:00
Gregory Nutt
09b356c497 SAMA5D4 EMAC: Add support for Multicast address matching and IPv6 2015-02-09 10:50:38 -06:00
Gregory Nutt
67f0563fad Add logic so that STM32 Ethernet drivier can avoid interrupt level processing and, instead, execute on the work thread. 2015-02-09 08:33:29 -06:00
Gregory Nutt
8bac6b71ce SYSLOG: Add an option to use the syslog'ing device as the system consolution. This option enables a low-level, write-only console device at /dev/console (similar to the low-level UART console device). From Pierre-noel Bouteville. 2015-02-08 06:53:24 -06:00
Gregory Nutt
b2ed249b42 STM32 SPI: Clean-up asymmetric configuration of SPI6 2015-02-07 18:59:06 -06:00
Gregory Nutt
706f01b8a2 STM32 SPI: The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1 (for F411, F427, and F429). Per David Sidrane. 2015-02-07 13:59:45 -06:00
Gregory Nutt
9318121175 Updated Tiva ADC files 2015-02-06 16:56:12 -06:00
Gregory Nutt
3ca8d3766a Tiva ADC: Add Kconfig options for ADC. From Calvin Maguranis 2015-02-05 19:05:13 -06:00
Gregory Nutt
225489a99a Tiva ADC: Partial build support. Still missing Kconfg changes 2015-02-05 18:01:18 -06:00
Gregory Nutt
376f39c822 Tiva ADC: Adds a Tiva ADC driver. From Calvin Maguranis 2015-02-05 17:36:23 -06:00
Gregory Nutt
a6bda5f8ba Tiva ADC: Register definitiona header file from Calvin Maguranis 2015-02-05 16:29:17 -06:00
Gregory Nutt
46a153aa3e Adds support for TM4C123G timers; integrates with the TM4C123G Launchpad. From Calvin Maguranis 2015-02-05 13:51:32 -06:00
Gregory Nutt
ee8d792737 Networking: Changes need to build ICMPv6 'router' configuration on STM32 with network debug enabled 2015-02-05 11:47:56 -06:00
Gregory Nutt
821ffc0b8a STM32: Add an IPv6 configuration for the STM32F4-Discovery board (witht he STM32-DISCO_BB base board). Verify that the STM32 Ethernet driver works with IPv6. 2015-02-05 11:21:04 -06:00
Gregory Nutt
de75731989 Add IPv6 support to network driver skeleton and to SAMA5D4 Ethernet driver (which, unfortunately is still missing address filtering logi) 2015-02-05 10:49:32 -06:00
Gregory Nutt
506c6c8512 ICMPv6: Add logic to behave like a router (if so configured): NuttX will not send the router advertisement message in response to any router solicitation messages. 2015-02-05 09:43:29 -06:00
Gregory Nutt
1646e643d7 Networking: Break out Ethernet definitions into a separate file; add IPv6 multicast addresses as common globals, Ethernet drivers need to filter link-local, all nodes Ethernet address 2015-02-04 14:51:20 -06:00
Gregory Nutt
f036df9faa Minor update to Kconfig file selections 2015-02-04 08:21:32 -06:00
Gregory Nutt
011c6e0c7e Re-arrange condition logic from the last change to avoid having STM32-specific conditional logic outside of the STM32 sandbox. 2015-02-04 07:24:19 -06:00
Gregory Nutt
2393a074e5 STM32: Add driver for STM32L162XX AES peripheral. Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> 2015-02-04 06:49:05 -06:00
Gregory Nutt
d617384d27 EFM: Remove a misbehaving assertion. From Pierre-noel Bouteville 
Also remove spaces before and after paretheses to conform to coding standard.
 2015-02-03 13:34:37 -06:00
Gregory Nutt
d08e29e0a0 Remove and extra endif from the Kconfig 2015-02-03 12:46:40 -06:00
Gregory Nutt
5189cddef2 Convert the 64-bit usec limit to a 32-bit tick limit 2015-02-03 07:18:17 -06:00
Gregory Nutt
f017f4c8a8 SAM4CM: Add support for tickless operation 2015-02-03 07:00:54 -06:00
Gregory Nutt
d8561fbcae Remove execute privileges from some header files 2015-02-01 06:24:18 -06:00
Gregory Nutt
515856c3d9 EFM32 Add support of BURTC and add possibility of debug message of RMU: Pierre-noel Bouteville 2015-02-01 06:19:53 -06:00
Gregory Nutt
0817d47964 Fix a missing quotation mark in configuration description 2015-01-30 12:28:04 -06:00
Gregory Nutt
6b900ec05c EFM32: Logic to unconditionally enable LE clocking. Even you don't use core clock LE as source for LFA or LFB, to read are write any register not clocked by HFPERCLK or HFCORECLK, HFCORECLKLE should be enabled. From Pierre-noel Bouteville. 2015-01-30 07:44:49 -06:00
Gregory Nutt
56200909a0 ARM assembly language memcpy.S was not returning a value in R0 it is required to do. From David Sidrane 2015-01-29 06:36:53 -06:00
Gregory Nutt
ce80d90e6d Tiva Ethernet: Move place where interrupts are disabled. It is probably not possible, but the logic looks like it could leave interrupts disabled 2015-01-27 14:59:31 -06:00
Gregory Nutt
523b12c624 Recent changes to stm32_rtcc.c do not compile with STM32L15XX configurations. From Jussi Kivilinna. 2015-01-27 09:20:42 -06:00
Gregory Nutt
2ce16c8fda Disabling any of EXTI 5-9 interrupts was disabling interrupts for all EXTI 5-9. Same issue with EXTI 10-15. From Jussi Kivilinna. 2015-01-27 09:15:43 -06:00
Gregory Nutt
d78464404a Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board. From Toby Duckworth 2015-01-26 07:33:22 -06:00
Gregory Nutt
30b141e2c8 Remove CONFIG_DEBUG_STACK. Adding CONFIG_STACK_COLORATION makes this configuration option pointless 2015-01-24 06:49:51 -06:00
Gregory Nutt
e8f266001d Add CONFIG_STACK_COLORATION that does the same thing as CONFIG_DEBUG_STACK but without enabling debug. From David Sidrane 2015-01-24 06:03:39 -06:00
Gregory Nutt
16f72b3470 Add support for the EFM32 reset management unit (RMU). From Pierre-noel Bouteville 2015-01-23 15:25:10 -06:00
Gregory Nutt
639fe6c297 Armv7-M: Remove Px4-only setting of stack to 0xff. This is incompatible with standard NuttX stack montitoring logic 2015-01-22 10:09:10 -06:00
Gregory Nutt
b3db229b77 STM32 Ethernet: Port IPv6 address filtering from the Tiva TM4C driver 2015-01-21 15:04:39 -06:00
Gregory Nutt
9588b0e7a7 All Ethernet drivers (again): Missed one place where arp_out() is called and neighber_out() needs to be called 2015-01-21 11:36:33 -06:00
Gregory Nutt
723b7fc430 Networking: Modify all Ethernet drivers: Do neighbor look-up on all outgoing IPv6 packs in order to properly set the destination link layer address. 2015-01-20 15:52:25 -06:00
Gregory Nutt
f6063c3896 Networking: Add missing raw/packet socket support to all Ethernet drivers 2015-01-20 15:14:29 -06:00
Gregory Nutt
07132f462f Ethernet drivers: Use IFF_IS_IPv4 macro. Cannot rely on the EtherType being set correctly. 2015-01-20 06:26:14 -06:00
Gregory Nutt
19a71b395c TM4C Ethernet: Fix the ICMPv6 multicast address 2015-01-19 14:56:43 -06:00
Gregory Nutt
674a86027a Tiva Ethernet: Add support for receiving IPv6 multicast frames 2015-01-19 12:43:13 -06:00
Gregory Nutt
3aafa0b93d nuttx/arch/arm/src/stm32/stm32_serial.c: fix declaration and definition of up_receive() and up_dma_receive() to match fields of uart_ops_s from nuttx/include/nuttx/serial/serial.h 2015-01-19 06:42:27 -06:00
Gregory Nutt
0d8ef0993f Tiva Ethernet: When calling into the stack from the worker thread, it is necessary to have the stack locked 2015-01-18 16:58:11 -06:00
Gregory Nutt
f14538bf52 Tiva Ethernet: Don't try to print IPv4 address if IPv4 is not enabled 2015-01-18 11:38:40 -06:00
Gregory Nutt
41b1f5d9cf Tiva Ethernet: Back out previous change... it is WRONG 2015-01-17 11:55:20 -06:00
Gregory Nutt
30183a73be Tive Ethernet: Fix some race conditions in the driver that become apparent when debug is enabled 2015-01-17 10:59:45 -06:00
Gregory Nutt
f5824701b7 Tiva Ethernet: Costmetic changes to comments and debug strings 2015-01-17 10:27:57 -06:00
Gregory Nutt
f0c112b3b0 Tiva Ethernet: Remove assertion. Just log and error and continue 2015-01-17 10:01:55 -06:00
Gregory Nutt
2236a996e5 TM4C Ethernet: Add some assertions 2015-01-16 15:25:18 -06:00
Gregory Nutt
ac69e11a5f Networking: All Ethernet drivers: Call ipv6_input if IPv6 is enabled and an IPv6 packet is received 2015-01-15 09:31:23 -06:00
Gregory Nutt
836a8b1625 - Rename devif_input() ipv4_input() 
- Copy net/devif/devif_input.c to ipv6_input.c.  Remove all IPv4-specific logic.
- Rename net/devif/devif_input.c to ipv4_input.c.  Remove all IPv6-specific logic
- Split IPv4 header structure out as net_ipv4hdr_s from net_iphdr_s
 2015-01-15 08:03:56 -06:00
Gregory Nutt
6bc54c3541 Networking: Condition certain ARP logic on CONFIG_NET_ARP in all Ethernet drivers 2015-01-15 07:07:39 -06:00
Gregory Nutt
d3174cdac4 Update README 2015-01-14 09:10:26 -06:00
Gregory Nutt
11eec5f5d8 Tiva Timer: Revert the previous change. Thre is a better way to handler timerout interrupts. 
Removed setting of the initial timer interval load value (or, rather, it is always set to zero for a free-running timer).  Also, do not unconditional enable the timer out interrupt.  The timerout interrupt is not not enabled until tiva_timer32_setinterval() is called.
 2015-01-14 07:33:59 -06:00
Gregory Nutt
db59dd2208 Tiva Timer: Remove a big chunk of unnecessary logic 2015-01-13 17:08:37 -06:00
Gregory Nutt
fe4e3f4529 Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt 2015-01-13 15:55:54 -06:00
Gregory Nutt
08638e10bd Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress. 2015-01-13 11:49:00 -06:00
Gregory Nutt
5aab327457 DK-TM3C129X Timer: Add timer initialization logic to the board bring-up 2015-01-13 11:10:35 -06:00
Gregory Nutt
0aa32a003c Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers 2015-01-13 10:10:02 -06:00
Gregory Nutt
ffa34aa5db Tiva Timer: Completes implementation of the timer driver lower half 2015-01-13 10:06:40 -06:00
Gregory Nutt
1bd74b4dcc Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000 2015-01-13 08:29:25 -06:00
Gregory Nutt
cfc0732c57 Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL 2015-01-13 07:49:20 -06:00
Gregory Nutt
73e6fc8142 Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c 2015-01-12 15:55:41 -06:00
Gregory Nutt
f93e69e94e Tiva Timer: First cut at timer driver lower half (still incomplete) 2015-01-12 15:52:48 -06:00
Gregory Nutt
4510be6c7d Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well 2015-01-12 10:14:48 -06:00
Gregory Nutt
9e546ff37a Tiva interrupts: Fix chip-specific interrupt un-definitions 2015-01-12 10:00:42 -06:00
Gregory Nutt
90da8aa71d Tiva Timers: Add interfaces to read the current timer value 2015-01-12 10:00:41 -06:00
Gregory Nutt
e5a0dcd0f9 USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts 2015-01-11 08:05:09 -06:00
Gregory Nutt
b75c43f6ef Tiva Timer: Fix a typo 2015-01-10 12:42:39 -06:00
Gregory Nutt
3c06976ba7 Tiva Timer: Implements configuration of the 32-bit RTC timer 2015-01-10 12:41:15 -06:00
Gregory Nutt
c0e1dc3b8a Tiva Timer: Add support for RTC match interrupts 2015-01-10 12:22:37 -06:00
Gregory Nutt
a2a5c47d9d Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns 2015-01-10 10:07:56 -06:00
Gregory Nutt
2eeca96330 Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled 2015-01-10 08:34:39 -06:00
Gregory Nutt
2871677362 Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes 2015-01-09 16:49:00 -06:00
Gregory Nutt
df48abcc47 Tiva Timer: Add logic to acknowledge Tiva Timer interrupts 2015-01-09 15:01:49 -06:00
Gregory Nutt
9ae597c441 Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module 2015-01-09 14:10:31 -06:00
Gregory Nutt
7384857658 Tiva Timer: Add more interrupt management logic 2015-01-09 13:29:03 -06:00
Gregory Nutt
626d6cdab4 Tiva Timer: Add functions to set match registers; Add logic to select count direction 2015-01-09 12:05:26 -06:00
Gregory Nutt
8552b2f679 Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers. 2015-01-09 11:07:52 -06:00
Gregory Nutt
d5d3a23ac3 Tiva Timers: Add framework to support tmer interrupts 2015-01-09 10:21:59 -06:00
Gregory Nutt
1193b4aa55 STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE 2015-01-08 17:47:34 -06:00
Gregory Nutt
09bd382697 Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations 2015-01-08 13:44:10 -06:00
Gregory Nutt
58818e1afd Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode. 2015-01-08 11:08:54 -06:00
Gregory Nutt
d3bc0b7223 Tiva Timer: Add register level debug support 2015-01-08 10:14:38 -06:00
Gregory Nutt
6c612cf967 Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit 2015-01-08 09:47:38 -06:00
Gregory Nutt
92dc58c376 Tiva Timer: SYNC regiser is only available on GPTM0 2015-01-08 08:07:31 -06:00
Gregory Nutt
e55df605a8 Tiva Timer: Update timer register bit definitions for the LM4F 2015-01-08 08:03:47 -06:00
Gregory Nutt
1ed2956ad5 Tiva Timer: Extend timer register definitions to handle other chips 2015-01-08 07:56:00 -06:00
Gregory Nutt
1ace391fcf MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. 
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.

This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.

From David Sidrane
 2015-01-08 06:23:42 -06:00
Gregory Nutt
5c68f0dd34 Tiva Timer: Missed one register bit field definition 2015-01-07 12:03:08 -06:00
Gregory Nutt
9eb693845e TM4C129X Timer: Completes timer register definition header file 2015-01-07 11:43:56 -06:00
Gregory Nutt
81afc06f54 TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete 2015-01-07 10:07:47 -06:00
Gregory Nutt
28a52cbd23 TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions 2015-01-07 08:57:48 -06:00
Gregory Nutt
0748291ce9 Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms 2015-01-06 10:49:47 -06:00
Gregory Nutt
c429a4d93f Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL) 2015-01-06 10:48:08 -06:00
Gregory Nutt
10b349bd1a Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt 2015-01-05 15:12:45 -06:00
Gregory Nutt
52c4334429 Tiva: Fixes to support building Tiva TM4C129X I2C driver 2015-01-05 13:15:40 -06:00
Gregory Nutt
67aeab7105 Tiva: Update I2C register definitions to include support for the TM4C129X 2015-01-05 13:08:07 -06:00
Gregory Nutt
c4f64c72c8 Tiva Ethernet: Add support for PHY interrupts 2015-01-03 13:16:26 -06:00
Gregory Nutt
40113f0b93 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
a7e0acbc6f Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
15f0a046fd Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
6bb12a34dc Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
28d44e1b30 Cosmetic changes 2015-01-02 13:59:47 -06:00
Gregory Nutt
b828741900 Tiva: Fix typos in conditional compilation 2015-01-02 13:59:30 -06:00
Gregory Nutt
91a92fc538 Tiva Ethernet: Add lots of debug output for testing 2015-01-02 13:10:25 -06:00
Gregory Nutt
ce3dac34b2 Tiva: If peripheral ready register not available, then lets say the peripheral is ready 2015-01-02 12:58:20 -06:00
Gregory Nutt
194e5a9600 Tiva: Wait for the console UART to be ready before configuring it 2015-01-02 12:57:41 -06:00
Gregory Nutt
47b8ce855e Tiva Ethernet: Fix compile problem when debug enabled 2015-01-02 12:04:22 -06:00
Gregory Nutt
86dc1726aa Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X 2015-01-02 11:53:02 -06:00
Gregory Nutt
9688a9aacb Tiva Ethernet: MMC interrupts need to be disable initially 2015-01-02 11:40:48 -06:00
Gregory Nutt
ea3895c2e8 Tiva Ethernet: Update DMA BUSMODE settings based on TI example code 2015-01-02 11:10:41 -06:00
Gregory Nutt
67699b8cae Tiva Ethernet: Update PHY initialization 2015-01-02 10:11:57 -06:00
Gregory Nutt
a97d304d1a STM32 RTC: Add Kconfig options needed with the preceding commit 2015-01-02 06:45:45 -06:00