4 Commits

Author SHA1 Message Date
Abdelatif Guettouche
f54804bafc arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC
section.

The RTC region is accessed by both I and D buses.  The old name of
`rtc_iram_seg` is a bit confusing.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Dong Heng
31854ca135 riscv/esp32c3: Fix heap end address 2021-04-12 01:36:11 -05:00
Abdelatif Guettouche
5562f08369 boards: Add the ESP32-C3 DevKit board
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00