Commit Graph

197 Commits

Author SHA1 Message Date
Masayuki Ishikawa
a500bd0238 arch: k210: Fix the pause handler for SMP
Summary:
- Apply the same logic added to cxd56_cpupause.c

Impact:
- SMP only

Testing:
- Tested with maix-bit:smp (QEMU)
- Run smp and ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-20 00:49:25 -08:00
YAMAMOTO Takashi
cce626b545 risc-v: Add _intmax_t and _uintmax_t 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
e99321bf9d risc-v 32-bit: Fix types to match what the compiler expects
spacetanuki% riscv64-unknown-elf-gcc -march=rv32im -mabi=ilp32 -dM -E - < /dev/null | grep INT32_TYPE
    #define __INT32_TYPE__ long int
    #define __UINT32_TYPE__ long unsigned int
    spacetanuki% riscv64-unknown-elf-gcc -march=rv32im -mabi=ilp32 -dM -E - < /dev/null | grep INT64_TYPE
    #define __INT64_TYPE__ long long int
    #define __UINT64_TYPE__ long long unsigned int
    spacetanuki% riscv64-unknown-elf-gcc -dM -E - < /dev/null | grep LP64
    #define __LP64__ 1
    #define _LP64 1
    spacetanuki%
2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
723cc14009 risc-v: Switch int64_t from long long to long
So that it matches what the toolchain expects.

    spacetanuki% riscv64-unknown-elf-gcc --version
    riscv64-unknown-elf-gcc (SiFive GCC 8.3.0-2019.08.0) 8.3.0
    Copyright (C) 2018 Free Software Foundation, Inc.
    This is free software; see the source for copying conditions.  There is NO
    warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

    spacetanuki% riscv64-unknown-elf-gcc -dM -E - < /dev/null | grep UINT64_TYPE
    #define __UINT64_TYPE__ long unsigned int
    spacetanuki%
2020-11-19 00:49:56 -08:00
zhongan
a396b191d4 rv32im: set compressed instruction enabled as default.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-11-17 18:53:10 -08:00
zhongan
9eae6edfde rv32im: fix typo.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-11-17 18:53:10 -08:00
YAMAMOTO Takashi
0390037472 arch/risc-v/src/gap8/gap8_uart.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
1170d0f71c arch/risc-v/src/fe310/fe310_serial.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
ce7fae15e4 arch/risc-v/src/k210/k210_serial.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
316ca6cd86 arch/risc-v/src/litex/litex_serial.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
ee06d08548 arch/risc-v/src/nr5m100/nr5_serial.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
f752b360f6 risc-v inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00
Juha Niskanen
d65acc6db4 arch: serial: fix typos and run nxstyle
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-31 15:39:50 +01:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX'
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
liuhaitao
d5c6bfe6cf arch: Add custom arch chip build support
Just like custom board build support, add custom arch chip build
support.

Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-10-20 14:48:16 +08:00
Abdelatif Guettouche
609a5fa4f0 arch/: Add the ARCH_SRC directory to the context and clean_context
targets

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-17 22:46:27 +09:00
Yoshinori Sugino
444a05131c arch/risc-v/include: Fix nxstyle warnings
No functional changes
2020-10-10 14:24:52 +01:00
Yoshinori Sugino
aae4e15d9b arch/risc-v/src: Fix nxstyle warnings
No functional changes
2020-10-10 11:44:26 +01:00
Masayuki Ishikawa
e8ec8fb4b4 arch: risc-v: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with maix-bit:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Yoshinori Sugino
3de85be15a arch/risc-v/src: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Yoshinori Sugino
2adec1f366 arch/risc-v/src/fe310: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Yoshinori Sugino
698008d1e5 Fix typos 2020-09-28 13:54:43 +08:00
zhongan
6240977341 rv32im: add missing call of 'up_savefpu'.
Change-Id: Iaf2e212a4fdea2f5f04a178d24755e0e37a30ef6
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
zhongan
07dd053e86 risc-v: add putreg64 for mtimer registers.
Change-Id: I18fe312c95c73966f5c09fd18081b0c72923e2ac
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
zhongan
657d1c9fdc Add and fix CSR macros listed in RISC-V spec V1.10.
Add csr operatiing macros.

Change-Id: Ia5c148d10709c21424c5ecaaca01b7d200fb8e01
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-21 07:35:56 -07:00
Xiang Xiao
bf7399a982 arch: Initialize idle thread stack information
and remove the special handling in the stack dump

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Matias N
166242c171 use "export" to expose TOPDIR to all child make instead of passing it around every time 2020-09-15 21:11:33 -07:00
Matias N
3d1159007f Remove extra application of EXTRAFLAGS and KDEFINE and the arch-level
EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.

KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
2020-09-14 13:59:57 +09:00
Xiang Xiao
b0797263ca libc/stdio: Allocate file_struct dynamically
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
2020-09-11 17:58:17 +08:00
Ouss4
06ca12e6b9 arch/: Trivial typos, mostly "their is" to "there is" 2020-09-09 14:09:43 -04:00
Xiang Xiao
f99719e260 Move note driver from drivers/syslog to drivers/note
it's better to put the note transport layer into a common folder

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-07 11:54:10 +08:00
Johannes Schock
515ad1c388 Added KDEFINE (__KERNEL__) to EXTRAFLAGS for libboard, for other architectures. 2020-09-05 21:25:31 +08:00
Masayuki Ishikawa
08c4376606 arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code

Impact:
- Should have no impact because the logic is the same for SMP

Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-03 10:20:20 +08:00
Gregory Nutt
55a9172bc2 Fix Cygwin build with Windows native toolchain
PR #1450 broke the Cygwin build.  Refer to Issue #1672.

The use of of logic like:

    EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"

fails when the Toolchain $(CC) is a native Windows toolchain.  That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command.  Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command.  The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.

This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain.  That toolchain returns:

    arm-none-eabi-gcc --print-file-name=libgcc.a
    c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
2020-09-01 10:20:28 +08:00
Yoshinori Sugino
728d5efed6 arch/risc-v/src: Cosmetic change
Replace spaces with a tab
2020-08-14 10:27:23 +01:00
Xiang Xiao
28eed285c8 sched: The secondary idle threads should call nx_idle_trampoline
because nx_task_idle doesn't call sched_note_start. To avoid the
same error happen again in the furture, nx_task_idle is removed.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-29 16:03:13 +09:00
SPRESENSE
e249a2f82f Makefile: Fix Make.dep not updated by config changes
Make.dep file should be updated by .config changed after first make.
There are 2 cases affected for this problem:

 1) Add source files by config symbol
 2) Include header files in #ifdef directive

These 2 cases may not be included in Make.dep and this may prevent the
differential build from working correctly.
2020-07-28 03:59:45 -05:00
Nakamura, Yuuichi
02718f0827 Syscall instrumentation build system support for Arm and RISC-V 2020-07-22 12:01:40 -05:00
Xiang Xiao
5efa93ec26 arch/Toolchain.defs: Change all ARCROSSDEV to CROSSDEV
ARCROSSDEV always equals to CROSSDEV, so it is no reason to keep ARCROSSDEV.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-20 23:50:59 -07:00
Xiang Xiao
b329e2377d boards: Move toolchain related variables to Toolchain.defs
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
2020-07-20 17:10:37 +01:00
Xiang Xiao
47f2090410 arch: Change --print-file-name=libgcc.a to --print-libgcc-file-name
Since the new option is more compatible with clang

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-19 18:26:31 -07:00
Xiang Xiao
d6827cab60 arch: up_assert shouldn't call exit directly
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
2020-07-19 01:21:36 +01:00
Xiang Xiao
4910d43ab0 build: Move the toolchain library setting to the common place
so all boards support C++ automatically
2020-07-16 15:38:08 -03:00
Nakamura, Yuuichi
f392d246d3 Fix note driver initialization 2020-07-13 00:46:55 -05:00
ligd
36a0978952 arch/risc-v/src/rv32im: update & complete risc-v rv32im arch
1. add schedulesigaction.c
2. add SYS_save_context handling
3. Skip ECALL instruction when up_swint()

Change-Id: Id52c6dd9ee1052441957b73463c00d3fd26555c5
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-06-30 09:31:21 -03:00
chao.an
332e5481ee arch/stackframe: fix heap buffer overflow
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
    #0 0x56673ca2 in strcpy string/lib_strcpy.c:64

0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
    #0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
    #1 0x5667725d in up_create_stack sim/up_createstack.c:135
    #2 0x56657ed8 in nxthread_create task/task_create.c:125
    #3 0x566580bb in kthread_create task/task_create.c:297
    #4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
    #5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
    #6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
    #7 0x56656e95 in nx_start init/nx_start.c:809
    #8 0x566548d4 in main sim/up_head.c:95
    #9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)

CALLSTACK:
    #8  0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
    #9  0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
    #10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
    #11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
    #12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
    #13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
    #14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
    #15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
    #16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
    #17 0x565e3d96 in nx_start () at init/nx_start.c:809
    #18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95

Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-15 07:19:41 -06:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
2020-06-10 08:24:47 +02:00
Huang Qi
2b0324c3bf boards/risc-v/k210/maix-bit: Add initial autoled support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-08 10:53:29 +09:00
Huang Qi
bcd7ccc0b5 arch/risc-v/src/k210: Add basic gpiohs support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-08 10:53:29 +09:00