Commit Graph

6 Commits

Author SHA1 Message Date
Masayuki Ishikawa
18ce70c1e7 boards: qemu-armv8a: Fix pthread_attr_setstacksize failed in ostest
Summary:
- This commit adjusts CONFIG_TESTING_OSTEST_STACKSIZE to fix
  pthread_attr_setstacksize failed error in ostest

Impact:
- None

Testing:
- Tested with ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-15 08:46:01 +02:00
Hidenori Matsubayashi
28180b49d1 arm64: add Cortex-A57 and Cortex-A72 configurations
This change adds the following:
- Rename the board configuration name from qemu-a53 to qemu-v8a.
- Add the configurations for Cortex-A57 and Cortex-A72.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-14 09:27:35 +08:00
zhanghongyu
e9db7bbb8c arm64/qemu/qemu-a53: Ensure the purity of the defconfig
Configuring...
  Building NuttX...
  Normalize qemu-a53/nsh
13a14
> CONFIG_ARCH_CHIP_QEMU_A53=y
Saving the new configuration file
On branch master
Your branch is up to date with 'origin/master'.

Changes not staged for commit:
  (use "git add <file>..." to update what will be committed)
  (use "git restore <file>..." to discard changes in working directory)
	modified:   boards/arm64/qemu/qemu-a53/configs/nsh/defconfig
	modified:   boards/arm64/qemu/qemu-a53/configs/nsh_smp/defconfig

retrigger ci build.
2022-10-13 21:10:30 +02:00
Hidenori Matsubayashi
06cf41901f arch/arm64: cleanup defconfigs
Use CONFIG_ARCH_CHIP_QEMU instead of CONFIG_ARCH_CHIP_QEMU_A53. This is because these configurations depend on the hardware configuration of qemu (memory map, irq numbers, etc.).

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-13 19:26:26 +08:00
Nathan Hartman
dd718e78f7 Fix typos 2022-08-07 23:33:19 +08:00
qinwei1
e77b06721b arch: arm64: ARMv8-A support for NuttX
N/A

Summary:

Arm64 support for NuttX, Features supported:

1. Cortex-a53 single core and SMP support: it's can run into nsh shell at
   qemu virt machine.

2. qemu-a53 board configuration support: it's only for evaluate propose

3. FPU support for armv8-a: FPU context switching at NEON/floating-point
  TRAP is supported.

4. psci interface, armv8 cache operation(data cache) and smccc support.

5. fix mass code style issue, thank for @xiaoxiang781216, @hartmannathan @pkarashchenko

Please refer to boards/arm64/qemu/qemu-a53/README.txt for detail

Note:
1. GCC MACOS issue
The GCC 11.2 toolchain for MACOS may get crash while compiling
float operation function, the following link describe the issue
and give analyse at the issue:

https://bugs.linaro.org/show_bug.cgi?id=5825

it's seem GCC give a wrong instruction at certain machine which
without architecture features

the new toolchain is not available still, so just disable the MACOS
cibuild check at present

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2022-07-14 09:35:49 -04:00