Commit Graph

54420 Commits

Author SHA1 Message Date
hujun5
ea181e2621 arm: armv7-a/r and armv8-r up_cpu_index inline
reason:
inline small code to improve performance

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-06 03:44:49 +08:00
yinshengkai
da6ddea8d4 arch/arm: support kernel heap in BUILD_FLAT mode
Make umm & kmm heap alloc more clear, and possible support FLAT build to
enable kernel heap.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-09-05 11:19:47 -03:00
hujun5
874c0b002c spinlock: spin_initialize should add memory barrier
reason:
spin_initialize is often used to release a lock,
and if we don't include a memory barrier,
it may lead to the lock being released prematurely.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 21:28:52 +08:00
hujun5
855060f353 sched: Make sure that affinity mask is valid
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 21:26:58 +08:00
shizhenghui
af19a22b11 ci-docker: add subversion to linux dockerfile
Add subversion to install list ensure linux docker
can use svn command to download source code.

Signed-off-by: shizhenghui <shizhenghui@xiaomi.com>
2024-09-05 21:25:46 +08:00
hujun5
e1b9144e71 can: Before we use pstate, we should check if it is NULL.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 21:25:22 +08:00
chao an
dedb4c95c9 armv8-r/r52: add neon support into compiler line
1. correct the armv8-r fpu flag from vfpv3-d16 to fpv5-sp-d16
2. add neon support

This commit updates the build script to specify the FPU type of
`fpv5-sp-d16` when the processor is configured with a single-precision
FPU, and `neon-fp-armv8` when the processor is configured with a
double-precision + Advanced SIMD-capable FPU.

Note that the `fp-armv8` FPU type is an alias for double-precision FPv5
with 32 double-precision registers (refer to the GCC
`gcc/config/arm/arm-cpus.in` for more details); NEON is always
specified in case of a double-precision configuration because the
Cortex-R52 can only be configured as such.

Reference:
https://developer.arm.com/Processors/Cortex-R52

Instruction set:

Arm and Thumb-2. Supports DSP instructions and a configurable Floating-Point
Unit either with single-precision or double precision and Neon.

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-05 09:52:51 -03:00
hujun5
a65adcd9db smp: smp call handler add up_cpu_paused_[save|restore]
reason:
Since smp call handler may lead to context switching,
we need to update the context information by calling up_cpu_paused_[save|restore].

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 09:35:17 -03:00
tfzou
fad8a22074 arm: Add support for CSK6011A SOC and CSK6011A-NANO board
Signed-off-by: tfzou <tfzou@listenai.com>
2024-09-05 09:34:33 -03:00
hujun5
198630a809 sched: use this_task replace nxsched_self
reason:
We can reduce a function call to improve performance.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 09:33:50 -03:00
TAiGA
cc0d4af20a tools/mksymtab: support for structure 2024-09-05 15:54:49 +08:00
fangxinyong
7b05a550dc sched: replace up_cpu_index with this_cpu
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
2024-09-05 12:09:24 +08:00
YAMAMOTO Takashi
fb58ac99fa esp32_psram.c: Remove a seemingly stale comment 2024-09-05 11:49:31 +08:00
chao an
2465b67c84 cmake/tricore: filter out nostdlib in linker phase to avoid build break
Regression by:

| commit b64fb09e6c
| Author: xuxin19 <xuxin19@xiaomi.com>
| Date:   Tue Jul 16 15:50:13 2024 +0800
|
|     cmake:bugfix fix CMake LTO build block
|
|     it was wrong in https://github.com/apache/nuttx/pull/12423/files#r1618852245
|     EXTRA_FLAGS is useful in LTO for pass option tu lto linker
|
|     Signed-off-by: xuxin19 <xuxin19@xiaomi.com>

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-05 11:47:06 +08:00
Kevin Zhou
fc6bcd6600 xtensa/esp32s3: Add timing delay set interface for QSPI 2024-09-05 11:36:18 +08:00
Matheus Catarino
1936e68f40 risc-v/qemu-rv: Add Build Config for leds64_zig
This PR adds a new Build Config `rv-virt:leds64_zig` that builds the Zig App `leds_zig` for QEMU RISC-V 64-bit.
ref.: https://github.com/apache/nuttx-apps/pull/2534
2024-09-05 11:28:12 +08:00
Saurav Pal
fc31c61730 boards/sim: Defconfigs for nand and mnemofs
Adds nand and mnemofs sim configs.

Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
2024-09-05 11:02:05 +08:00
Petro Karashchenko
a2ed0ddd72 libs/libm: fix epsilon relaxation in log and logf
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-09-05 10:14:04 +08:00
Alexander Merkle
39937c9685 tools/ci/docker/linux/Dockerfile: fix ccache when running container as user
Normally ccache places the temporary files in `~/.ccache`, when invoking the container with
  `-u <uid>:<gid>`
as e.g. Jenkins does, this might result in a invalid/unknown home folder.
Thus ccache tries to write to `/.ccache` which doesn't exist and the user doesn't have any permissions.

Explicitly set `CCACHE_DIR` to a folder with appropriate permissions.
2024-09-05 10:09:57 +08:00
chao an
6098747c4f arm/giv3: add g_ prefix to some global variables
Signed-off-by: chao an <anchao@lixiang.com>
2024-09-05 09:58:21 +08:00
YAMAMOTO Takashi
3d275bd4a2 psram_cache_init: remove cosmetic differences between PRO/APP
No functional changes are intended.
2024-09-05 09:44:18 +08:00
hujun5
433f159c06 arch: remove unused up_cpu_pausereq waiting
reason:
After the up_cpu_pause call completes, it guarantees that other CPUs have fully stopped.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-05 07:15:54 +09:00
Nonpawit Ekburanawat
c9fc04911c doc: Add STM32H745I-DISCO dual-core documentation
Signed-off-by: Nonpawit Ekburanawat <nonpawit.ek@gmail.com>
2024-09-04 10:27:20 -03:00
Yanfeng Liu
7bd857c9f1 Revert "arch/riscv: unify in-kernel syscall"
This reverts commit 6986cd4105 as it breaks critical section as in
https://github.com/apache/nuttx/pull/12864#issuecomment-2325779041
2024-09-04 09:47:49 -03:00
YAMAMOTO Takashi
58d3c53d2e esp32: fix seemingly wrong calculations
DPORT_APP_CACHE_MASK_DRAM1 is already a mask.
2024-09-04 09:15:16 +02:00
Alexander Merkle
c95a1cc98b tools/ci/docker/linux/Dockerfile: fix cmake download
remove the leftover `wget` as curl is used
triggers a host not found on my machine

Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com>
2024-09-04 09:09:50 +02:00
hujun5
9e5d3dacd6 irq: dynaminc create g_irqmap
reason:
dynaminc create g_irqmap to reduce the use of data segments
CONFIG_ARCH_NUSER_INTERRUPTS should be one more than the number of IRQs actually used

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-03 19:22:28 -03:00
YAMAMOTO Takashi
471d411503 esp32: psram_set_cs_timing: sync with esp-idf
I have no idea what this setting is.
I'm just blindly trying to follow whatever esp-idf does.

the esp-idf counterpart:
6e5414b6c4/components/esp_psram/esp32/esp_psram_impl_quad.c (L702-L712)
6e5414b6c4/components/esp_psram/esp32/esp_psram_impl_quad.c (L136-L147)
2024-09-03 19:16:28 -03:00
chao an
b15c1a441a arm/gicv3: set routing affinity before enable IRQ
In corner case, the pending ISR will be triggered immediately
after enable the IRQ, this PR will setting CPU affinity first
to avoid routing the unexpected IRQ to other CPUs.

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-03 19:14:14 -03:00
Filipe Cavalcanti
29ae9d1110 esp32s2: fix SPI flash and file system mounting
Copied spi flash files from risc-v
Removed old spiflash from make.defs
KConfig modifications for common spiflash
Added new spiflash entry to make.defs
S2 Board config update
Modifications working on S2. Need fix on ROM function
Board fixes
Deleted old spiflash files
Fixes for smartfs operation
Set new HAL version
Fixed wrong change on S3
2024-09-03 19:13:46 -03:00
yangsong8
918ae4cc84 drivers: usbdev: Fix USB descriptor
This commit fixes the regression from https://github.com/apache/nuttx/pull/13190

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2024-09-03 11:45:45 -03:00
yinshengkai
baf79de7e5 task: assign_pid retry after malloc
Calling malloc in the critical section may cause thread switching.
Add a retry mechanism to handle the situation where other threads have been successfully expanded.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-03 09:45:33 -03:00
yinshengkai
8b13572d64 sched: update spinlock in nxsched_get_tcb to enter_critical_section
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-09-03 09:45:33 -03:00
simbit18
ccb20feb25 tools/ci/docker/linux/Dockerfile: Restarting the Docker-Linux workflow a new attempt
tools/ci/docker/linux/Dockerfile

revert from --strip-components=1 to --strip-components 1

.github/workflows/docker_linux.yml

   added -> workflow_dispatch:

Manual execution of a workflow
https://docs.github.com/en/actions/managing-workflow-runs-and-deployments/managing-workflow-runs/manually-running-a-workflow
2024-09-02 14:11:51 -04:00
YAMAMOTO Takashi
53795fd497 esp32: enable smp for esp32-devkitc:psram_usrheap config 2024-09-02 10:24:26 -03:00
YAMAMOTO Takashi
96f19aa719 esp32: enable smp for esp32-devkitc:psram config 2024-09-02 10:24:26 -03:00
Tiago Medicci Serrano
6df9de8788 esp32: fix initialization with PSRAM + SMP
Cache flush must be done prior to the APP cpu initalization. This,
however, must be true for the case where PSRAM is not available or
not selected. To do that, this commit flushs the cache during the
device initialization.
2024-09-02 10:24:26 -03:00
YAMAMOTO Takashi
c06a742a63 esp32: fix a crash with PSRAM + SMP
this function is called via esp_spiram_init_cache early in the boot.
2024-09-02 10:24:26 -03:00
chao an
f084685da8 sched/event: clear pending events before enable the scheduler
enable the scheduler may cause the context to switch to a high-priority task,
which will failure to clear pending events correctly.

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-02 18:24:28 +08:00
chao an
85c39e96d6 global/variables: add g_ prefix to some global variables
Signed-off-by: chao an <anchao@lixiang.com>
2024-09-02 18:23:57 +08:00
chao an
39e873f269 sched/policy: move g_policy from data to rodata
Signed-off-by: chao an <anchao@lixiang.com>
2024-09-02 18:23:57 +08:00
SPRESENSE
d1c7e1816f libc/netdb: Separate IPv4 and IPv6 cache size limit
Some domains have a lot of IPv6 addresses. Because of that, it is
not possible to get the IPv4 address with getaddrinfo.

This change separate IPv4 and IPv6 cache size limit to enable to
get both IP addresses.
2024-09-02 06:16:50 -04:00
simbit18
63ed723d93 tools/ci/docker/linux/Dockerfile: Restarting the Docker-Linux workflow
The docker image has not been updated we currently use that one
from 22 days ago.

It seems that the error encountered is due to an incomplete download. It will probably work fine if downloaded again..

 https://github.com/apache/nuttx/actions/runs/10619683045/job/29437799464#step:7:1339

28.31
28.31 gzip: stdin: unexpected end of file
28.31 tar: Unexpected EOF in archive
28.32 tar: Unexpected EOF in archive
28.32 tar: Error is not recoverable: exiting now
2024-09-02 10:27:57 +08:00
Yanfeng Liu
32801d3047 fs/mq_open: revising comments
This contains minor revision on comments of `file_mq_open()`.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-31 12:04:17 -03:00
guoshichao
4c01594d5b nuttx: remove the unnecessary -pipe build option
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-08-31 10:22:20 +08:00
Tiago Medicci Serrano
c72c66fff8 espressif: Fix deadlock in RT timer caused by critical section
This commit fixes a deadlock in `esp32s3-devkit:sta_softap`
defconfig: `spin_lock_irqsave` was being used to enter a critical
section that calls `nxsem_post`. In this case, it's recommended
to use `[enter|leave]_critical_section` to avoid deadlocks when a
context switch may happen, for instance.
2024-08-30 17:00:51 -03:00
YAMAMOTO Takashi
e8b1876f99 esp32: enable APP_CPU cache earlier
NuttX uses PSRAM, possibly using the APP_CPU cache MMU,
way before starting the APP_CPU in up_cpu_start().
Flushing the cache when launching the APP_CPU can cause
data corruptions on PSRAM.
Eg. mm_heap structures if the PSRAM is added to a heap.
2024-08-31 00:13:42 +08:00
simbit18
ebbd585f97 cmake/nuttx_kconfig.cmake: fixed the correct .config path in the build folder
Fixing the correct .config path during the setconfig process.

changed ${NUTTX_DIR} -> ${CMAKE_BINARY_DIR}

see https://github.com/apache/nuttx/pull/13175#issuecomment-2320360957
2024-08-30 23:47:11 +08:00
Alan Carvalho de Assis
b998afdc04 doc: Fix Documentation build procedure
User reported an issue caused by not clear documentation:
https://github.com/apache/nuttx/issues/13232
2024-08-30 23:18:32 +08:00
chao an
cf4a92c81e armv8-r/gicv3: correct cpu index of irouter
interrupt routing cpu should be index not cpuset

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-30 21:48:58 +08:00