Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
g_irq_spin for backword compatibility (In this case, NULL must be specified)
Impact:
- None
Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h
This change to the files only modifies the name of called functions. nxstyle fixes were made for all core architecture files. However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change. It is not humanly possible to fix all of these. I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.
This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them:
up_arch.h
up_internal.h
up_vfork.h
The only change to the files is from including up_arch.h to arm_arch.h (for example).
The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
* Serial Fixed interrupt storm
The target would randomly hang in the serial isr.
The priv->ie and the hardware were inconsistent.
The isr used the priv->ie to gate offloading
the RX data. Bang! Hung.
imxrt_disableuartint(priv, &ie);
ret = imxrt_setup(dev);
/* Restore the interrupt state */
imxrt_restoreuartint(priv, ie);
interrupt-> Of no return
priv->ie = ie;
On a fast cpu with FIFO, this will not work
with out proper protections.
* Serial: Conditionally enable 9 bit mode
* armv7-mi/mpu.hi: Restructure API
Preserve the existing API and enabled better granualriy on
setting.
* Enable MPU for non protected builds to set cache
* mpuinit use symbolic values for addresses
* Allow DTCM on HEAP
* allocateheap Fix Coding style
* Simplify EINTR/ECANCEL error handling
1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx
* Unify the void cast usage
1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
1) Operational issue
TC (Transmission complete) and TDRE (TX Buffer Empty) were transposed in imxrt_serial.c. The end result was that for unoptimised code everything worked fine, but optimised code got itself into a real mess and continually fired interrupts. The patch attached fixes this. This one would have been found much more quickly if this particular board had supported SWO :-/
2) Startup issue
There are a number of chip errata that apply to the 1052 first revision (A-suffix) that don't apply to the second (B-suffix). Those got me for a while and it's important to use an EVK_B_ dev board if you're suffering stability problems with this particular chip. However, even with that resolved with either optimised or unoptimised code when there is no SNVS (Battery Backup) power and the power is switched on the CPU appears to boot but gets stuck with timer interrupts not being generated. The CPU is running and it will execute linear code. I have determined this by putting an 'imxrt_lowputc('A'+irq)' into up_doirq. For the non-running case the output looks like this;
LLLL
this implies 4 0x0b interrupts have been generated, and nothing else. If I hit keys on the keyboard I get 'e' in the flow. 0x0b is the SVC instruction and is the mechanism by which NuttX handles task switching. 'e' is 0x24, which corresponds to the LPUART1 interrupt. Other than these, the system does not respond further but is happily in the idle loop. In this circumstance if you hit SW2 on the EVKB board though the logjam 'unjams' and normal service is established, output now looks like;
LLLLPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPLPP ...etc.
Where 'P' is 0x0f (the SYSTICK interrupt)....this is what _should_ be happening so; SYSTICK starts up after SW2 has been pressed.
From this point on everything works correctly and you can reboot the CPU, put new code into it or do whatever you wish, **provided power is not cycled off**. If power is cycled off then return to the top and go through the process again.
When there is SNVS power to the CPU then power can be switched on and off as you wish, and the CPU will boot correctly. This has been determined by putting 3V onto J6.
I think we are probably doing something naughty with the way we are starting the clocks to the timers. There are certainly some restrictions on imxrt clock manipulation which we have studiously avoided. I am investigating further and have some potential patches but even if I find the root cause it should not be included in 8.2 as the change could be disruptive.
This port was the joing effort of Janne Rosberg, Ivan Ucherdzhiev, and myself. I give credit to Ivan for the kill because he is the one to held on to the end.
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
configs/imxrt1050-evk/scripts: Add section to linker script to handle the case where RAMFUNCs are enabled. RAMFUNCs appear to be enabled in the default configuration ... they probably should not be enabled.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: imxrt_lowputc.c is finished. Now everything needed for the initial port is done and ready for testing.
arch/arm/src/imxrt: Add logic to imxrt_lowputc.c. Still incomplete.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: Add serial support. configs/imxrt1050-evk: Add linker script.
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Add initial cut at imxrt_allocateheap.c
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arm/arm/src/imxrt: Completes all definitions for PADMUX, CTLMUX, and IOMUX_INPUT and mapping tables on imxrt_gpio.c and imxr_iomuxc.c.
arch/arm/src/imxrt/chip: Add definitions for IMXRT_PADCTL and IMXRT_PADMUX registers. Only the IMXRT_INPUT definitions in this commit.
arch/arm/src/imxrt/chip: Add more IOMUXC register definitions.
Author: Gregory Nutt <gnutt@nuttx.org>
configs/imxrt1050-evk: Add STRIP definition to Make.defs.
arch/arm/src/imxrt: Bring in i.MX6 memory configuration settings.
arch/arm/src/imxrt: Remove call to non-existent imxrt_gpioinit() from imxrt_start.c.
arch/arm/src/imxrt: Bring in incomplete imxrt_iomuxc.c file from i.mx6.
arch/arm/src/imxrt: Add first cut at GPIO interrupt logic.
arch/arm/include: Add definitions to support a second level of GPIO pin interrupts.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_wdog.c/.h
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Port SAMv7 interrupt logic to imxrt_irq.c.
arch/arm/src/imxrt: More clarification of the start-up memory map.
arch/arm/src/imxrt: Some mostly cosmetic clean-up to the imxrt_start.c file that was so rudely taken from the SAMv7.
arch/arm/src/imxrt: Add imxrt_start.c. Initial commit is the the SAMv7 startup logic with name changes.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: Adds a few IOMUXC register definitions.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_clockconfig.c/.h
configs/imxrt1050-evk: Add clock configuration definitions to board.h
arch/arm/src/imxrt: Fix CCM register name; Fix doubly defined in LPUART bit field.
arch/arm/src/imxrt: Add analog defines to CCM register definition header file.
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Bring in GPIO C files from i.MX6. Things are in disarray now because that GPIO logic depends on IOMUXC logic which is not yet in place.
arch/arm/src/imxrt: Add a few more GPIO definitions to make the header file compatible with i.MX6
arch/arm/src/imxrt/chip: Add GPIO register definition file.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add DCDC register definitions.
arch/arm/srch/imxrt: Add CCM register bit definitions
Author: Gregory Nutt <gnutt@nuttx.org>
Purely cosmetic
arch/arm/src/imxrt: Add system reset controller register definition header file.
Embarassingly trivial change left in compiler.
arch/arm/src/imxrt: Finishes i.MX RT1050 LPUART register definition header file.
arch/arm/src/imxrt: Beginning of an i.MX RT1050 LPUART register definition header file.
Some trivial things
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_wdog.h
arch/arm/src/imxrt: Add initial imxrt_ccm.h
Author: Gregory Nutt <gnutt@nuttx.org>
Trivial update to README.
arch/arm/src/imxrt: The i.MX Rt implements 4 bits of interrupt priority, not two. Thanks, Janne.
arch/arm/src/imxrt: Fix some initial compile issues. Still a long way from complete, but there is a buildable environment now for the imxrt1050-evk.
configs/imxrt1050-evk: Add an initial NSH configuration for testing.
configs/Kconfig: Hook the i.MX RT 1050 board configuration into the NuttX configuration system.
configs/imxrt_evk: Add the framework for i.MX RT 1050 board support.
arch/arm/src/imxrt: Bring in a few more files from LPC54xxx.
arch/arm/src/imxrt: Bring in imxrt_clrpend() from the LPC54xxx.
arch/arm/src/imxrt: Bring in Cortex-M7 SysTick setup from the SAMv7.
arch/arm/src/imxrt: Add a few easy files.
arch/arm/src/imxrt/chip: Add memory map header files.
arch/arm/src/imxrt: A few basic files to start the port to the i.MX RT 1050.
