Gregory Nutt
62a1f6f110
up_timer_initialize() is named incorrectly. The prefix should be the architecture name, not up_ since it is private to the architecture. up_timerisr() is similarly misnamed and should also be private since it is used only with the xyz_timerisr.c files. Also updat TODO list.
2017-02-07 10:35:04 -06:00
Gregory Nutt
4a8c6a6d2d
ELF: Move ARMv6-M, ARMv7-M, and legacy ARM versions of ELF relocation logic to libc/machine
2017-01-21 15:24:25 -06:00
Gregory Nutt
be5ba90d4f
Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications.
2017-01-20 10:53:46 -06:00
Gregory Nutt
3c4684ef5f
Eliminate CONFIG_ARCH_OPTIMIZED_FUNCTIONS. Move options to select architectur-specific C library options from libc/Kconfig to libc/machine/Kconfig and rename.
2017-01-20 09:30:07 -06:00
Gregory Nutt
0c0c98691e
STM32 and STM32L4 Oneshot: EBUSY is more appropriate error then ENOMEM
2017-01-18 16:20:15 -06:00
Gregory Nutt
b05f928143
STM32L4: Port fix for multiple oneshot timers from STM32. Also fixes a few issues with original STM32 implementation.
2017-01-18 10:45:22 -06:00
Sebastien Lorquet
db24f237d7
STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings
2016-12-01 09:00:59 -06:00
Sebastien Lorquet
ec586ab350
implementation of dumpgpio for stm32l4, was required for pwm debug.
2016-11-22 07:57:21 -06:00
Gregory Nutt
19c1c9d78b
All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems.
2016-11-17 15:03:31 -06:00
Sebastien Lorquet
197cec58d2
timer driver: Use signal to notify of timer expiration. Add generic argument so that there can be additional usage.
2016-11-17 14:38:21 -06:00
Sebastien Lorquet
98088a7456
typos
2016-11-09 19:52:29 +01:00
Sebastien Lorquet
a9c66683f2
Change the way to configure quadrature encoder prescalers.
2016-11-09 19:16:44 +01:00
Gregory Nutt
d8fecba333
arch: Disable priority inheritance on all semaphores used for signaling in all RNG drivers
2016-11-03 17:19:51 -06:00
Gregory Nutt
d28181da10
arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers
2016-11-03 17:05:53 -06:00
Gregory Nutt
8b07aa6f7c
arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers
2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf
arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers
2016-11-03 14:23:42 -06:00
Gregory Nutt
6acc831e77
Remove duplicate select from Kconfig
2016-10-26 07:00:24 -06:00
Sebastien Lorquet
68dae715b0
CHxN channels are always outputs
2016-10-26 13:21:57 +02:00
Gregory Nutt
04c6319e32
Merged in slorquet/nuttx/stm32l4_uarts (pull request #155 )
...
Enable and renames for 32l4 UARTs 4 and 5
2016-10-25 13:09:17 +00:00
Sebastien Lorquet
27920eeae9
Enable and renames for 32l4 UARTs 4 and 5
2016-10-25 10:55:25 +02:00
Sebastien Lorquet
9be23d0c76
Fix i2c devices rcc registers
2016-10-25 10:53:24 +02:00
Gregory Nutt
ad6856c931
Trivial stylistic changes from review of last PR
2016-10-14 11:12:49 -06:00
Sebastien Lorquet
fb1f424e12
Support Complementary PWM outputs on STM32L4
2016-10-14 18:06:11 +02:00
Sebastien Lorquet
f7e0a36f55
Multiple stm32l4 timer fixes:
...
- too many parentheses when calculating max chan count (???)
- channel 4 does not have a complementary output
2016-10-14 12:50:45 +02:00
David Sidrane
d4a8585d6f
Fixed L4 USB Driver by avoiding SETUPDONE and EPOUT_SETUP
2016-10-04 16:52:12 -10:00
David Sidrane
a416b304a3
Code Cleanup and conform to upstrem debug config
2016-10-04 16:51:47 -10:00
David Sidrane
e54a0cd3d0
Header cleanup
2016-10-04 16:51:32 -10:00
Sebastien Lorquet
9dcecd4b15
Add support for qencoders on various nucleo boards
2016-10-03 16:07:20 +02:00
Gregory Nutt
06c70129ed
STM32L4: Remove dependencies on STM32 F3 from Kconfig
2016-10-02 16:05:13 -06:00
Sebastien Lorquet
d5ef349d9a
Add support for quadrature encoders on STM32L4
2016-10-02 23:26:16 +02:00
Gregory Nutt
7f1a88e243
Pierre's assertion-avoidance change should also be applied to STM32 F7 and L4
2016-09-15 08:41:49 -06:00
Jim Wylder
5d73f114b5
STM32L4: Add support for USART3-USART5
...
For STM32L4 parts, the higher number USART ports supported
varies. Add the HAVE_USARTx definitions to the configuration
to allow enabling the higher numbered USART ports.
Signed-off-by: Jim Wylder <jwylder@motorola.com>
2016-09-14 15:20:18 -05:00
Sebastien Lorquet
50dd745e23
restore stm32l4 name
2016-09-07 14:17:38 +02:00
Sebastien Lorquet
87d2f86968
Register renames to allow stm32l4 usb device compilation
2016-09-05 08:50:09 +02:00
Sebastien Lorquet
e4a713477a
Apply stm32 fix to stm32l4
2016-08-31 13:12:49 +02:00
Gregory Nutt
8052dc4955
STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others.
2016-08-13 16:01:50 -06:00
Gregory Nutt
51fcd89b98
Add and fix some SPI debug output
2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365
STM32 and STM32L4: Enabling DMA loses other bits in CR2
2016-08-13 08:01:41 -06:00
Gregory Nutt
10f90a1738
STM32 F3: Fix more SPI issues
2016-08-12 19:00:34 -06:00
Gregory Nutt
046acf6b54
Add a simulated oneshot lowerhalf driver
2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09
Correct some spacing
2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3
oneshot interface: max_delay method should return time in a standard struct timespec form.
2016-08-12 11:33:10 -06:00
Gregory Nutt
1965e25da4
STM32L4: Add oneshot lower half driver.
2016-08-11 17:14:41 -06:00
Gregory Nutt
6df28bc74e
Make bit-order SPI H/W feature configurable for better error detection
2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791
Fix cloned variable error in all SPI drivers
2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e
STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS.
2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6
STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers.
...
This change three things: (1) It adds HWFEAT_LSBFIRST as a new H/W feature. (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
2016-08-08 08:28:13 -06:00
Gregory Nutt
9b9b721406
Rename alarm_enable to rtc_alarm_enabled; mark inline
2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d
Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized.
2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8
Simplify some computations
2016-07-23 08:13:25 -06:00
