Commit Graph

765 Commits

Author SHA1 Message Date
Brennan Ashton
aef6f4ae09 Add initial support for the QuickLogic EOS S3
The QuickFeather board added as an initial target.
These featrues are minimally implemented:
  * Clock Configuration -- All clocking registers are defined and
    configuration is used to setup the HSO, M4 Core, and M4 Perif
    clocks.  Additionally some clock debugging is stubbed for
    bringing out clock paths to IO pins.

  * UART -- The lowputc as well as the serial driver is implemnted
    for the single UART device. Currently the configuration is
    hard coded, but uses the proper interfaces to later fill in.

  * SysTick -- The system tick timer is implemented and clocking
    properly. Tickless mode is not yet implemented.

  * Interrupts -- The interrupt system is implemented and verified
    using the UART and SysTick systems.

  * GPIO -- GPIO and IOMUX systems are defined and implemented.
    This is verified using the UART as well as the Arch LED
    system.  The GPIO interupt system is stubbed out but not
    implemented.

  * Arch LEDS -- The blue LED as part of the RGB LED is configured
    and attached to the Arch LED system.  This indicates the device
    coming online as well as when a hardfault is triggered.

Applications and Testing:
  * There is a nsh configuration implemented that includes debug
    features as well as the ostest, getprime, and mem test.
    All of these have been run and verified.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-07-15 11:25:30 +01:00
Xiang Xiao
05f6445493 arch: Move *_getsp to the common place arch/arch.h
so other place can get the stack pointer easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
Jari van Ewijk
86c151edf1 S32K Small Fixes:
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
2020-06-30 15:46:15 +01:00
Jacob Dahl
b12b3072e8 Added support for STM32F412xx. Tested with the NUCLEO-F412ZG dev board as well as a custom board using the STM32F412CE. 2020-06-29 17:44:35 +02:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
2020-06-10 08:24:47 +02:00
Alan C. Assis
d41a2f87f0 Add support to STM32F411CE 2020-06-07 02:29:16 +01:00
David Sidrane
bcf673a673 stm32h7 stm32h7x3xx_irq: Fix CS violation 2020-05-23 09:16:30 -03:00
David Sidrane
f5482b50ee stm32h7:stm32h7x3xx_irq STM32_IRQ_SDMMC->STM32_IRQ_SDMMC2 2020-05-23 09:16:30 -03:00
Nathan Hartman
168a4cafc6 Add support for STM32G474: Modify existing files
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.

This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.

arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:

    * Add architectural support to existing NuttX files. This
      makes the STM32G474 family parts accessible to the system.

With big thanks for detailed code review:
    David Sidrane (davids5)
    Mateusz Szafoni (raiden00)
    Abdelatif Guettouche (Ouss4)
2020-05-23 09:02:00 -03:00
Nathan Hartman
3b4e4c603f Add support for STM32G474: New files
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.

This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.

arch/arm/include/stm32/stm32g47xxx_irq.h:
arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h:
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h:
arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h:
arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h:
arch/arm/src/stm32/hardware/stm32g47xxx_uart.h:
arch/arm/src/stm32/stm32g47xxx_rcc.c:

    * New files required for architectural support. Note that
      existing NuttX files are not modified. As such, in this
      revision, the system is unaffected by their addition.

With big thanks for detailed code review:
    David Sidrane (davids5)
    Mateusz Szafoni (raiden00)
    Abdelatif Guettouche (Ouss4)
2020-05-23 09:02:00 -03:00
Nathan Hartman
34286dfdac stm32: nxstyle fixes
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.h:

    * nxstyle fixes, mostly long lines
2020-05-20 11:23:48 +08:00
qiaowei
cddd64fd30 armv8-m: Add stack overflow by stack pointer limit register
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I0f0ae0fb8edb8e1690b3c5e3e8b3189d51a318b0
2020-05-18 07:21:05 -06:00
Xiang Xiao
7ffafa3654 Remove executable bit from source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-13 06:32:13 -06:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
2020-05-07 12:04:16 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Gregory Nutt
bda24f09c2 libs/libc/tls/tls_getinfo.c: Add tls_get_info()
Move the logic to get TLS information from an inline function to a normal function.  For the unaligned case, it is probably too large to be inlined.

Also fixes some minor things from review of previous commits.
2020-05-05 18:56:33 +01:00
Abdelatif Guettouche
b7e7fba732 TLS_UNALIGNED (#2)
* Implement the TLS_UNALIGNED
2020-05-05 18:56:33 +01:00
Gregory Nutt
6766aa0ed5 Mea Culpa. Fix nxstyle problems from PR879
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
2020-04-26 11:56:15 -03:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Gregory Nutt
e6af32c88f Run nxstyle against all files modified by PR 848 2020-04-22 21:36:41 +01:00
Nathan Hartman
02ab0cd149 stm32: Fix typos, wrong comments, and nxstyle.
arch/arm/include/stm32/chip.h:

    * Fix 2 typos.

    * Fix 1 wrong comment (No LCD -> LCD)

    * Fix nxstyle errors regarding comment positions, blank lines
      before/after comments, and C++ style comments.
2020-04-22 16:14:57 +01:00
Alin Jerpelea
afead9c9da arch: arm: a1x: nxstyle fixes for a1x arch
nxstyle fixes for a1x arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-21 13:46:07 +08:00
Nathan Hartman
120de788d4 kinetis: Fix typos
arch/arm/include/kinetis/kinetis_pmc.h:

    * Fix several typos in comments.
    * Rewrap some comment lines.
    * Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
      parenthesis for safety.
    * Fix nxstyle complaint regarding long line.
2020-04-16 14:43:54 -06:00
Nathan Hartman
9b9d1fc7ca arch/stm32h7: Extend support to all STM32H7x3xx
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.

arch/arm/src/stm32h7/Kconfig:

    * Add explicit support for all microcontrollers in the
      STM32H7x3xx family by adding support for:
        - STM32H743AG
        - STM32H743AI
        - STM32H743BG
        - STM32H743BI
        - STM32H743IG
        - STM32H743II
        - STM32H743VG
        - STM32H743VI
        - STM32H743XG
        - STM32H743XI
        - STM32H743ZG
        - STM32H753AI
        - STM32H753BI
        - STM32H753VI
        - STM32H753XI
        - STM32H753ZI

    * Fix TODO items for IO_CONFIG (all STM32H7X3XX).

    * Because 100-pin parts lack GPIO ports F and G, but have
      port H, create the new hidden configs STM32H7_HAVE_GPIOF
      and STM32H7_HAVE_GPIOG.

    * STM32H7_STM32H7X3XX:
      - Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
        when not STM32H7_IO_CONFIG_V (100-pin part).
      - STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
        IO configs except V (100-pin part), which doesn't expose
        SPI5 due to pin count.

    * STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
      STM32H7_HAVE_GPIOG because we aren't adding more part
      numbers in this family.

    * Remove extraneous (duplicate) "bool" and "default n"
      lines.

    * config STM32H7_FMC: Fix indent (contents were indented
      with spaces while rest of file uses tabs).

arch/arm/include/stm32h7/chip.h:

    * Extend preprocessor logic to add support for the new
      MCU part numbers.

    * Expand table of differences between family members.

    * Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.

    * If IO config is not known, issue compile-time #error
      with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
      Suggested by davids5.

arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:

    * When checking STM32H7_NGPIO > 5 or 6, check also
      CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.

arch/arm/src/stm32h7/stm32_gpio.c:

    * stm32_configgpio(): When applicable, make sure we're not
      trying to configure one of the missing ports.

    * Fix nxstyle complains (wrong end of line comment position
      and several long lines). No functional changes.

    * g_gpiobase[]: Init base address for ports F and G according to
      CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.

    * stm32_configgpio(): Replace complicated check with g_gpiobase[]
      null check. Suggested by davids5.

    * stm32_gpiowrite() and stm32_gpioread(): Add previously missing
      null check of g_gpiobase[].

arch/arm/src/stm32h7/stm32_gpio.h:

    * Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
      GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
      GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
      compiler will prevent use of ports that do not exist on the
      target MCU.

    * Fix nxstyle complaints.

Documentation/NuttX.html:

    * Remove copy-and-pasted anchor for stm32f76xx77xx.

    * Correct link to README.txt for Nucleo-H743ZI board,
      formerly on BitBucket, now on GitHub.

    * Add list item for STMicro STM32H747I-DISCO board.

Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
2020-04-16 13:23:12 -06:00
Alin Jerpelea
222a3b9fe8 arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56xx

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-14 13:20:21 +01:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
raiden00pl
7135c91b0f arch/arm/include/xmc4: add irq definitions for xmc4700 and xmc4800 2020-03-22 08:29:51 -06:00
Andrey Zabolotnyi
e5f5509054
stm32h7: Added basic support for STM32H753II. (#527)
Co-authored-by: Андрей Заболотный <zapparello@ya.ru>
2020-03-10 07:55:18 -07:00
Gregory Nutt
493b8de938 Revert "Change SAMA5 files to have apache license headers:"
This reverts commit f735584514.

These header changes introduce unacceptable errors:

1. The changes alter the width of the initial block comment.  That will cause nxstyle failures on most of the files.

2. The third line of the header is an (optional) short description of content of the the file.  This change erroneously removes that line.

Automated header file changes can screw up a lot of files, very quickly.
2020-03-07 08:47:48 -03:00
Adam Feuer
f735584514 Change SAMA5 files to have apache license headers:
- No code changes
- All files are now utf-8 encoded
- Some non-utf-8 characters in comments were changed or removed
2020-03-06 10:33:08 +00:00
patacongo
730133d84a SAMA5D27 peripheral support - USB Host working (#444)
* SAMA5D27 peripheral support - USB Host working

    - updated nsh defconfig with vfat for testing USB Host
    - sama5d2_xult: USB Host worked.
    - ported sam_bringup.c code from sama5d3-xplained
    - USB 2.0 HS now working
    - other perpherals may work, but haven't been tested

* update license headers to approve NuttX Apache-2.0
2020-03-05 18:24:11 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files
and fix the wrong correction
2020-02-22 14:45:07 -06:00
Xiang Xiao
e7d9260014 arch: Customize the typedef of size_t instead of intptr_t
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG.  The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
2020-02-18 07:15:19 -06:00
Nathan Hartman
239537fd9d arch/arm/include/tiva/chip.h: Fix typos 2020-02-17 16:50:03 -06:00
liuguo09
e21c30cf9d
arch/arm/include/stm32f010g0/chip.h: correct wrong #if defined to fix build break (#227)
/home/jenkins/jenkins-slave/workspace/NuttX-Nightly-Build/nuttx/include/arch/stm32f0l0g0/chip.h:53:42: error: missing ')' after "defined"
   53 | #if defined(CONFIG_ARCH_CHIP_STM32F030RC || CONFIG_ARCH_CHIP_STM32F030CC)
      |                                          ^~
/home/jenkins/jenkins-slave/workspace/NuttX-Nightly-Build/nuttx/include/arch/stm32f0l0g0/chip.h:53:45: error: missing binary operator before token "CONFIG_ARCH_CHIP_STM32F030CC"
   53 | #if defined(CONFIG_ARCH_CHIP_STM32F030RC || CONFIG_ARCH_CHIP_STM32F030CC)

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-02-07 08:30:58 -08:00
Peter van der Perk
499607d68f
S32K add support for Nxp drone boards (#224)
* S32K add support for Nxp drone boards

* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle

Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>

Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
2020-02-07 04:53:40 -08:00
Alan Carvalho de Assis
7f91a737ea arch/arm/include/stm32f010g0/chip.h: Add support for STM32F030CC 2020-02-06 17:40:05 +00:00
Alan Carvalho de Assis
bc00f6e444 arch/arm/src/stm32f010g0: Add memorymap and pimmap support for the
STM32F030RC
2020-02-05 22:38:04 +00:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
Juha Niskanen
a762c06ed9 Fix typos and some incorrect comments
Author: Alan Carvalho de Assis <acassis@gmail.com>

    Run nxstyle against .c and .h files and fix it

Author: Juha Niskanen <juha.niskanen@haltian.com>

    Fix typos and some incorrect comments
2020-01-20 09:32:36 -03:00
Nathan Hartman
72a0934bcc arch/arm/include/cxd56xx/audio.h: Fix minor typos 2020-01-14 20:57:29 -03:00
Alin Jerpelea
15eddd29c8 cxd56xx improvements (#48) and various other fixes (#49)
Author: Alan Carvalho de Assis <acassis@gmail.com>

    Verify all .c and .h against nxstyle, fixed the Mixed cases

Author: Alin Jerpelea <alin.jerpelea@sony.com>

    cxd56xx improvements (#48)

    * arch: cxd56xx: Add size limitation for I2C SCU xfer

    This is a fw restriction, unroll loop because it can be transfer
    up to 16 bytes.

    * arch: cxd56xx: Fix lack of leave_critical_section

    add the missing leave_critical_section

    * arch: cxd56xx: Remove unnecessary file

    this header is duplicate and we can remove it

    * arch: cxd56xx: Cosmetic change

    remove space after function

    * arch: cxd56xx: update topreg registers

    the topreg registers are updated to match the cxd5602 HW

    * arch: cxd56xx: Add voltage setting for low battery notification

    Add voltage setting for low battery notification

    * arch: cxd56xx: Improve perfomance of SD card

    Improve a problem that the clock of SD Host Controller is lower than the
    expected value in SDR25 transfer mode.

    * arch: cxd56xx: Cosmetic changes

    cleanup to comply with coding standard

    * boards: cxd56xx: Cosmetic changes

    updates to comply with coding standard

    * boards: cxd56xx: Fix SD card cannot mount issue

    SD card cannot mount when connecting and disconnecting three times
    or more due to wrong state of parameter 'initialized'.

    This change enables to skip swtching initialized state when mount
    failed.
2020-01-07 18:29:52 -03:00
Alin Jerpelea
077ef70b0c cxd56xx improvements (#48)
* arch: cxd56xx: Add size limitation for I2C SCU xfer

This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.

* arch: cxd56xx: Fix lack of leave_critical_section

add the missing leave_critical_section

* arch: cxd56xx: Remove unnecessary file

this header is duplicate and we can remove it

* arch: cxd56xx: Cosmetic change

remove space after function

* arch: cxd56xx: update topreg registers

the topreg registers are updated to match the cxd5602 HW

* arch: cxd56xx: Add voltage setting for low battery notification

Add voltage setting for low battery notification

* arch: cxd56xx: Improve perfomance of SD card

Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.

* arch: cxd56xx: Cosmetic changes

cleanup to comply with coding standard

* boards: cxd56xx: Cosmetic changes

updates to comply with coding standard

* boards: cxd56xx: Fix SD card cannot mount issue

SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.

This change enables to skip swtching initialized state when mount
failed.
2020-01-07 11:21:58 -03:00
Pieter du Preez
00df2f0fe2 Fixed a compilation error, with irq debugging for stm32f7 and stm32h7 archs.
This commit fixes a compilation error that occurs when enabling the
following configuration items for stm32f7 and stm32h7 architectures:

   CONFIG_DEBUG_FEATURES=y
   CONFIG_DEBUG_ERROR=y
   CONFIG_DEBUG_WARN=y
   CONFIG_DEBUG_INFO=y
   CONFIG_DEBUG_IRQ=y
   CONFIG_DEBUG_IRQ_ERROR=y
   CONFIG_DEBUG_IRQ_WARN=y
   CONFIG_DEBUG_IRQ_INFO=y

The compiler error for stm32f7:

make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC:  chip/stm32_irq.c
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:497:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_FIRST'?
   stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
                                ^~~~~~~~~~~~~~~
                             STM32_IRQ_FIRST
chip/stm32_irq.c:497:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'

And the compiler error for stm32h7:

make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC:  chip/stm32_irq.c
chip/stm32_irq.c: In function 'stm32_dumpnvic':
chip/stm32_irq.c:164:4: warning: #warning Missing logic [-Wcpp]
 #  warning Missing logic
     ^~~~~~~
     chip/stm32_irq.c: In function 'up_irqinitialize':
     chip/stm32_irq.c:522:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_CRS'?
        stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
                                     ^~~~~~~~~~~~~~~
                                  STM32_IRQ_CRS
chip/stm32_irq.c:522:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'

This commit replaces all STM32_IRQ_NIRQS defines with the NR_IRQS
define, which seems to be consistent with the rest of the code in
Nuttx.
2020-01-05 21:24:16 +00:00
jjlange
084f81e76e Author: Gregory Nutt <gnutt@nuttx.org>
Run all .c and .h files in last PR through nxstyle.

Author: macman88 <jjlange91@gmail.com>

    SAME5x Ethernet Support (#25)

     boards/arm/samd5e5/same54-xplained-pro/:  Adds basic support for Microchip SAM E54 Xplained Pro board.
    arch/arm/src/samd5e5/:   Adds an Ethernet driver for the SAME5x family (based on the SAMA5 GMAC driver).
2020-01-02 12:35:45 -06:00
Minamiya_Natsuki
2388373aa5 Squashed commit of the following:
Author: Alan Carvalho de Assis <acassis@gmail.com>

    Run all .h and .c files modified in last PR through nxstyle.

Author: Minamiya_Natsuki <yukihiratype2@gmail.com>

    Add FMC SDRAM for STM32H7x3 chip (#22)

    * Add FMC SDRAM for STM32H7x3 chip

    * Add FMC SDRAM for STM32H7x7

    * Nuttx Coding Standard requires one declaration per line

    * should be __ARCH_ARM_SRC_STM32H7_STM32_FMC_H

    * fix bad alignment

    * fix typo

    * fix typo

    * people can't live in furture

    * fix comment line length

    * fix more comment line length

    * fix aligenment

    * fix typo
2020-01-02 12:17:16 -03:00
Pieter du Preez
28c8e1444c Fixed STM32L4_NUSART for STM32L433XX. (#9)
STM32L4_NUSART was set to 4. The spec at
https://www.st.com/resource/en/datasheet/stm32l433cc.pdf states the
following on page 1:

   - 4x USARTs (ISO 7816, LIN, IrDA, modem)
   - 1x LPUART (Stop 2 wake-up)

However it on page 49, it states:

   The STM32L433xx devices have three embedded universal synchronous
   receiver transmitters (USART1, USART2 and USART3).

The latter is correct.

This patch sets STM32L4_NUSART to 3.
2019-12-31 07:47:06 -06:00
raiden00pl
d80d6b8774 Merged in raiden00/nuttx_nrf52 (pull request #1098)
nrf52 updates

arch/arm/nrf52: add more options to Kconfig

arch/arm/nrf52: cosmetics changes to some files

arch/arm/nrf52: nfct, radio, twi, spi registers definitions

arch/arm/nrf52: fix warnings in nrf52_gpio.c

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-12-19 15:40:56 +00:00
Valmantas Palikša
bc7566a83f arch/arm/include/armv7-m/syscall.h: ARM EABI specifies that the stack should be aligned by 8 on function calls, inside the function is not required to be aligned by 8. Since these functions call svc, compiler doesn't know that the svc is a function, therefore it does not do any stack management. This change pushes an even number of args to the stack and maintains an 8 byte alignment. I've checked the assembly and it doesn't cause any more overhead that the hand written assembly. 2019-12-16 09:10:08 -06:00
Gregory Nutt
6bff1f4df4 arch/arm/include/samd2l2/sam_adc.h: I was wrong... this header file does belong in the samd2l2 include directory. It contains IOCTL definitions that are needed by applications. Usage of a chip-specific header file is, however, not really a good portable design because it requires that the application know that it is running on a specific chip. But still, if we are going to do that, the include directory is where the header file belongs. My apologies for the bad judgement. 2019-12-16 03:53:05 -06:00
Lwazi Dube
25aa695a35 Reviewed by David Sidrane.
boards/arm/stm32h7/stm32h747i-disco:  Remove references to nucleo in the stm32h747i-disco board.
arch/arm/include/stm32h7, arch/arm/src/stm32h7, and boards/arm/stm32h7/stm32h747i-disco:  Add support for the STM32H747I-DISCO board.
2019-11-18 14:03:38 -06:00
Xiang Xiao
8f05cc560b arch/arm/include/setjmp.h: Add prototypes for setjmp/longjmp functions. 2019-11-17 08:48:17 -06:00
Nathan Hartman
33898ef551 arch/arm/include/tiva/tm4c_irq.h: Fix wrong IRQ vector number. 2019-11-06 20:43:51 -06:00
Nathan Hartman
71ce894cab arch/arm/src/tiva, arch/arm/include: Add support for Tiva TM4C129ENCPDT. 2019-11-06 16:20:40 -06:00
Alin Jerpelea
2be1153030 Merged in alinjerpelea/nuttx (pull request #1061)
boards: cxd56xx: spresense: cleanup and new defconfig

* arch: cxd56xx: remove NVIC_SYSH redefinition

    The NVIC_SYSH is already defined in nvicpri.h

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: spresense: configs: enable SPRESENSE_EXTENSION

    Enable high current mode for the Spresense Extension board on all examples
    that have SDCARD support

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: spresense: ifdef SDCARD_TXS02612

    The SD Card TXS02612 port expander is hosted on the Extension board and
    should not be enabled if the extension board is not prezent.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: spresense: configs: increase MQ_MAXMSGSIZE

    This change is needed by the display driver on spresense platform

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: spresense: config: add lcd examples defconfig

    This is a configuration for the basic nx examples

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-24 14:26:02 +00:00
Alin Jerpelea
f7af996f1d Merged in alinjerpelea/nuttx (pull request #1059)
boards: cxd56xx: spresense: add board_timerhook function

* boards: cxd56xx: spresense: add board_timerhook function

    in preparation for SDK we muts have a weak board_timerhook function

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* drivers: usbhost: add missing endif

    By accident an endif was missing.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: audio: add build barrier

    The audio implementation should not be beuilt if the config
    CONFIG_CXD56_AUDIO is not set.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch:arm:cxd56xx: add ge2d.h header

    The header is used by imageproc.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-23 13:12:21 +00:00
Gregory Nutt
eeff429939 Fix some trivial spacing issues noted in review of PR. 2019-10-11 23:52:15 +08:00
Alin Jerpelea
716c7c9bee Merged in alinjerpelea/nuttx (pull request #1048)
boards: arm: cxd56xx: audio: add power_control and audio_tone_generator

* boards: arm: cxd56xx: audio: add power_control

    Add a simeple way to control the audio power for userspace apps

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: audio: add audio_tone_generator

    Add a simple way to control the audio buzzer with defined frequency
    for userspace apps

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-11 15:46:15 +00:00
Alin Jerpelea
33d0de4d57 Merged in alinjerpelea/nuttx (pull request #1046)
boards: spresense: add audio implementation

* boards: arm: cxd56xx: add audio implementation

    Add the board audio control implemantation

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: update audio defconfig

    Small updates to build the platforms specific audio driver

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: drivers: add audio implementation

    Add the audio implementation for CXD56XX chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: fix Load switch GPIO

    During the initial bringup the grong GPIO was set.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-10-09 23:55:20 +00:00
Daniel Pereira Volpato
61055cee94 Add support for STM32G070xx
arch/arm/include/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
arch/arm/src/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
2019-09-17 11:10:38 -06:00
Juha Niskanen
ebc6f51641 Fix some typos 2019-09-17 10:46:23 -06:00
Gregory Nutt
e5c3874a3b Tiva directories: Fix TM4C129XNCZAD part number in Kconfig and identifiers. Rationale: Fully specify that this is the 212-pin BGA package (ZAD ending) and for consistency with earlier changes to other Tiva TM4C12x part numbers in Kconfig names and identifiers. 2019-08-30 08:46:57 -06:00
Alin Jerpelea
6ecee7e403 Merged in alinjerpelea/nuttx (pull request #1021)
boards: cxd56xx: add SCU sensors (2/2)

* boards: cxd56xx: add cxd56_bh1721fvc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bh1745nuc initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1383glv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bm1422gmv initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmi160 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_bmp280 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_kx022 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_lt1pa01 initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_rpr0521rs initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: cxd56xx: add cxd56_sensors initialization

    We are adding the sensor initialization for cxd56xx boards in the
    common board folder.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56: add Backup Log driver

    The driver will be used to backup logs on crash.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: add crashlog driver

    Add Crashlog driver with support for reset on crash

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move gs2200m initialization

    Move the board gs2200m initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move ili9340 initialization

    Move the board ili9340 initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: move lpm013m091a initialization

    Move the board lpm013m091a initalization to the common board folder

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* boards: arm: cxd56xx: common: typo fixes

    HEADER: Updates on file location
    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-08-23 13:28:35 +00:00
Gregory Nutt
b4ee19f5bd arch/arm/src/s32k1xx: This commit brings in the LPSPI and LPI2C peripheral drivers from the i.MXRT which used the identical IP.
Squashed commit of the following:

    arch/arm/src/s32k1xx:  Update peripheral input clocking for the way that things are done for the S32K1XX.  Fix other misc. compilation/configuration issues.

    arch/arm/src/s32k1xx:  Clean up LPSPI and LPI2C naming for S32K1XX.  Using S32K1XX clock functions to get peripheral input clock.

    arch/arm/src/s32k1xx:  Clone i.MXRT LPSPI and LPI2C support.  i.MXRT uses the same IP as S32K1XX.
2019-08-21 11:18:40 -06:00
Gregory Nutt
33ab25ae14 arch/arm/src/s32k1xx/s32k14x and boards/arm/s32k1xx/s32k146evb/src: Numerous fixes to get a clean build of the S32K146EVB. 2019-08-19 10:49:50 -06:00
Gregory Nutt
5b102ff848 Squashed commit of the following:
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c:  Finishes the implementation of the core clock configuration logic.
    arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h:  Add SMC register definition header file.
    arch/arm/src/s32k1xx:  Bring in GPIO logic from Kinetis.  Looks like the same IP.
2019-08-16 16:18:15 -06:00
Nathan Hartman
5a2d5fb7f9 arch/arm/src/tiva, arch/arm/include: Add support for Tiva TM4C123AH6PM. 2019-08-15 14:17:24 -06:00
Gregory Nutt
963031f42c arch/arm/src/s32k1xx: A few fixes. The build progresses further but still fails. 2019-08-14 12:40:51 -06:00
Pavel Pisa
810bf5e87a symtab/Makefile: When system wide locale is set (i.e. en_US.UTF-8) then 'read' is ordered after 'readdir' even if separator is set to quotation mark and key set to 2. When C locale is used result is correct. 2019-08-14 11:02:30 -06:00
Gregory Nutt
2a228e8650 Fleshs out a few more things needed to compile and build the S32K118EVB board configuration.
Squashed commit of the following:

    arch/arm/include:  Add interrupt IRQ numbers.
    tools/: Add support for the S32K1XX family.
2019-08-14 10:57:54 -06:00
Gregory Nutt
bcfabcbe53 This commit brings the initial files for a port to the NXP S32K1xx family. This is very much a work in progress and is little more that a partial configuration/build environment and some S32K1xx register definition header files
Squashed commit of the following:

    arch/arm/src/s32k1xx/hardware/s32k1xx_mcm.h:  Add MCM register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h:  Add memory map definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_cmu.h:  Add CMU register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h:  Add PCC register definition file.
    arch/arm/src/s32k1xx/hardware/s32k1xx_scg.h:  Add SCG register definition file.
    arch/arm/src/s32k1xx:  Add initial Make.defs files.
    Basic configuration logic for the S32K1 family.
2019-08-12 12:12:58 -06:00
Gregory Nutt
0ed1a06016 arch/arm/include/cxd56xx/chip.h: The correction of commit c300f27130 must be applied to the CXD56xx too. 2019-08-10 08:33:47 -06:00
Gregory Nutt
545cfada38 This commit removes CONFIG_ARCH_INT_DISABLEALL. In the normal course of things, interrupts must occasionally be disabled using the up_irq_save() inline function to prevent contention in use of resources that may be shared between interrupt level and non-interrupt level logic. Now the question arises, if we are using BASEPRI to disable interrupts and have high priority interrupts enabled (CONFIG_ARCH_HIPRI_INTERRUPT=y), do we disable all interrupts except SVCall (we cannot disable SVCall interrupts). Or do we only disable the "normal" interrupts?
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts".  That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)

Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC.  Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
2019-08-09 10:52:35 -06:00
Gregory Nutt
c300f27130 arch/arm/include/armv7-m/nvicpri.h: In the 'normal' case, the priority of the SVCALL interrupt was the same as the priority of the high priority interrupt. This means that SVCALL interrupt processing can defer the high priority interrupt and result in the jitter in that interrupt response. Fix is to raise the priority of the high priority interrupt above the priority of the SVCALL interrupt. Suggested by Nathan Hartman. 2019-08-09 07:07:16 -06:00
David S. Alessio
ced0dc1e16 arch/arm/src/armv7-m: Add ARMv7-M setjmp/longjump functions. 2019-08-06 15:59:19 -06:00
Nathan Hartman
5f76eb1207 arch/arm/src/tiva: LM3S, LM4F, TM4C: Fix GPIO IRQ error, ports R, S, T. Preprocessor logic for CONFIG_TIVA_GPIOx_IRQS was setting/clearing port Q defines when it should act on ports R, S, T. gpioport2irq() was missing handling for port T. 2019-08-04 16:55:26 -06:00
Nathan Hartman
c71f2fa56f arch/arm/src/tiva: Rename TM4C1294NC identifiers to TM4C1294NCPDT.
Rationale: TM4C1294NC is ambiguous:

  TM4C1294NCPDT is a 128-TQFP
  TM4C1294NCZAD is a 212-NFBGA

The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.

Rename:

  CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
  ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
  TM4C1294NC to TM4C1294NCPDT
2019-07-29 13:31:52 -06:00
Nathan Hartman
6e8b76c3ab arch/arm/src/tiva: Rename TM4C123GH6PMI identifiers to TM4C123GH6PM
Rationale: In terms of firmware programming, there is no functional difference between these parts:

  TM4C123GH6PMI7
  TM4C123GH6PMI7R
  TM4C123GH6PMT7
  TM4C123GH6PMT7R

From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)

arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/Kconfig:
configs/Kconfig:
  Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM

arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
  Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
  Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
2019-07-29 11:15:46 -06:00
Alin Jerpelea
5867fdc0e1 Merged in alinjerpelea/nuttx (pull request #948)
arch: arm: cxd56xx: add GNSS device and UART0

* arch: arm: cxd56xx: add GNSS device

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Geofence Support

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add UART0 iterface

    UART0 is an interface with hardware flow control in the application subsystem.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: path correction

    In the initial commit the path reference was not updated

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-12 11:29:22 +00:00
Gregory Nutt
ad1adffba6 arch/arm/src/lpc11xx, arch/arm/include/lpc11xx, configs/lpcxpresso-lpc1115: Support for the LPCXpresso-LPC1115 and for the LPC1115 architecture in general was removed after NuttX-7.30. The LPC11 port was never really used (to my knowledge) and was no longer supported. A snapshot of the port is still available in the Obsoleted repository. It can be brought back into the main repository at any time if anyone is willing to provide support for the architecture. 2019-07-11 16:16:11 -06:00
jjlange
e5dfd805e6 Merged in jjlange/nuttx/lpc40xx (pull request #946)
Add support for LPC40xx family chips

* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
    Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
    Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit.  These configurations are still something of a work in progress.  In particular, the LCD functionality is untested.

* First pass rename in *.c and *.h files.

* Renamed LPC17XX to LPC17XX_40XX in config files

* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files

* Replaced LPC17xx with LPC17xx/LPC40xx in .h files

* Updated some documentation

* Working on moving directories

* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx

* Renamed LPC17_* constants / configuration options to LPC17_40_*

* Updated chip family name defines

* Renamed some chip-specific files

* Updated references to renamed files

* Updated references to lpc17_ to lpc17_40_

* Renamed source files from lpc17_* to lpc17_40_*

* Clean up white space

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-11 16:50:00 +00:00
Alin Jerpelea
9b8c4a355d Merged in alinjerpelea/nuttx (pull request #935)
drivers: video: add ISX012 Image sensor

* arch: arm: src: cxd56xx: add cisif support

    add cisif support on cxd56xx chip to be able to use cameras

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* drivers: video: add ISX012 Image sensor

    add driver for ISX012 Image sensor

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-07-04 14:02:05 +00:00
Alin Jerpelea
37a24c05fd arch/arm/src/cxd56xx: Cleaning up header files to match project layout. 2019-07-04 06:45:48 -06:00
Alin Jerpelea
bfda93d66b Merged in alinjerpelea/nuttx (pull request #915)
arch: arm: cxd56xx: I2C, SPISD, Charger and Gauge

* arch: arm: cxd56xx: add I2C character driver

    for testing purposes, we use the CXD56_I2C_DRIVER to register the
    /dev/i2c[] character devices.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: use I2C character driver

    We should use the CXD56_I2C_DRIVER to register the /dev/i2c[]
    character devices.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add battery gauge driver

    add battery gauge driver for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add charger driver

    add charger driver for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch:arm: cxd56xx: add SPI SDCard configuration

    Add SPI SDCARD functionality configuration

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable gauge driver

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable charger driver

    enable charger driver on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-25 12:06:47 +00:00
Alin Jerpelea
2a32f36540 Merged in alinjerpelea/nuttx (pull request #909)
arch: arm: cxd56xx: SCU, ADC, I2C

* nuttx: configs: spresense: LEDS: fix warnings

    In the initial code several errors were missed because I pushed
    the dirty code.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Sensor Control Unit (SCU)

    Add Sensor Control Unit (SCU) on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add I2C support

    add I2C support on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add ADC interface support

    Add ADC interface support on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: Use DMAC for reading sensing data

    Use DMAC for reading sensing data from SCU on cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: code style sanitization

    NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable I2CDEV

    add enable I2CDEV for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: add notification LEDs

    Add usefull diagnostic LEDs on the speresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-18 12:46:43 +00:00
Alin Jerpelea
92892a8dd7 Merged in alinjerpelea/nuttx (pull request #902)
arch: arm: cxd56xx: PM and PWM

* configs: spresense: add SPI configuration

    add SPI configuration for spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add support for PWM

    add support for PWM for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable PWM support

    enable PWM support on spresense board

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Power Management PROCFS support

    the powermanager procfs support will export
    /proc/pm:
     clock
     power

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable powermanager procfs support

    The powermanager procfs is disabled by default and need to be enabled
    by the CONFIG_CXD56_PM_PROCFS option

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add timer driver

    Add timer driver for cxd56xx.

    NOTE
    The timer allows a divider of 1, 16 and 256 options

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add Watch Dog Timer

    Add Watch Dog Timer on cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable timer

    the platform support has been added and now we can use the timers
    on spresense board.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* configs: spresense: enable WatchDog timer

    The platform support has been added and now we can use the WatchDog
    Timer on spresense board.

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-14 18:40:06 +00:00
Alin Jerpelea
215a146f2e Merged in alinjerpelea/nuttx (pull request #884)
arch: arm: cxd56xx: add support for USB and SDIO

* arch: arm: cxd56xx: add support for USB connectivity

    Add basic support for USB connectivity

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add SDHCI support

    We add SDHCI driver for the cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-05 14:05:56 +00:00
Alin Jerpelea
eeedce32c4 Merged in alinjerpelea/nuttx (pull request #881)
updates for arch: arm: cxd56xx:

* arch: arm: cxd56xx: add pinconfig

    Add the HW pin configuration for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add GPIO support

    Add GPIO support for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add support for GPIO interrupts

    add support for GPIO interrupts

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add clock support

    Add clock support for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add PMIC support

    Add support for PMIC (Power management integrated circuit)
    for cxd56xx chip

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add FIFO CPU schedulier

    add a simple FIFO schedulier that minimizes overhead

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

* arch: arm: cxd56xx: add ICC support

    add Inter Core Communication for cxd56xx

    Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-06-05 11:29:51 +00:00
Gregory Nutt
5cdd038df2 Rename STM32F0L0 to STM32F0L0G0 since it now alsow supports the STM32G0 thanks to Mateusz Szafoni's contribution
Squashed commit of the following:

    arch/arm:  Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.

    Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.

    Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
2019-05-27 08:16:24 -06:00
raiden00pl
9c676a9e67 Merged in raiden00/nuttx_lora (pull request #876)
Initial support for STM32G0

configs: initial support for nucleo-g071rb

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-27 11:48:57 +00:00
Mateusz Szafoni
8603a13f38 arch/arm/include/stm32f0l0/chip.h: Add one more definition of STM32_NADC. 2019-05-17 13:12:21 -06:00
raiden00pl
a5250662fa Merged in raiden00/nuttx_lora/lora (pull request #872)
Port AES and RND to STM32 M0 + some improvements

arch/arm/src/stm32f0l0/stm32_rng.c: change the function names to use the stm32_rng prefix

arch/arm/src/stm32f0l0/stm32_usbdev.c: move HSI48 enable to stm32xx_rcc.c

arch/arm/src/stm32f0l0: add support for AES

arch/arm/src/stm32f0l0: add support for RND

arch/arm/src/stm32f0l0: add HSI48 support for L0

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-17 18:46:30 +00:00
Gregory Nutt
3e848fb893 Merged imxrt1020 into master 2019-04-30 16:08:46 -06:00
Jukka Laitinen
54856cfa5e arch/arm/src/stm32h7/: Add stm32h7 ethernet driver. This is the initial push for the ethernet driver. The driver has been tested to be working on a nucleo board. This is still WIP, it doesn't for example do MAC filtering on HW level, but just receives all ethernet packets. 2019-04-30 08:43:39 -06:00
Gregory Nutt
abf6965c24 Squashed commit of the following:
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
2019-04-29 14:52:05 -06:00
Nobuto Kobayashi
eba004d498 arch/arm/src/cxd56xx and arch/arm/include/cxd56xx: Add initial CXD56xx chip sources. 2019-04-22 07:51:22 -06:00
raiden00pl
95340ebfda Merged in raiden00/nuttx_l0f0 (pull request #852)
Support for STM32L071X and a few improvements for STM32F0L0

arch/arm/src/stm32f0l0: add peripherals configuration for STM32L0

arch/arm/src/stm32f0l0: a few fixes for USART

arch/arm/include/stm32f0l0/stm32f0_irq.h: use names as in other STM32

arch/arm/include/stm32f0l0/chip.h: use names as in other STM32

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-04-09 13:28:38 +00:00