Commit Graph

765 Commits

Author SHA1 Message Date
David Sidrane
9ef481ce4b Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/kinetis:  Cosmetic changes from review of coding standard.

Author: David Sidrane <david_s5@nscdg.com>
    Merged in david_s5/nuttx/master_kinetis (pull request #710)

    kinetis:Add DMA and use it as RX FIFOs on Serial

    * Add initial implementation of the DMA

    * Add across Kxx family support [WIP]

    * Incorporate the DMA into the serial

        Add polling to serial

        do DMA initialisation at UART startup and fix DMA mux setting.

        Fix circular DMA handling in the serial driver.

    * Adapt defconfig to enable UART1,4 RXDMA

    * [WIP] - refactor this with new CONFIG DMA settings

    * kinetis/Kconfig:Bring inline with upstream stucture

          1. Use the Serial console configuration from drivers/serial/Kconfig
            and friends.
          2. Prefix arch specific featurs as such
             UARTx_RXDMA->KINETIS_UARTx_RXDMA

    * Kinetis:Serial formatting and clean up

    * kinetis:DMA Formating and Cleanup

    * kinetis:serial Use cleaner DMA API

    * kinetis:Make.defs fix duplicate/errant kinetis_dma.o

    * kinetis:serial Fix warning/error on only one uart using DMA

          The driver can support no DMA on any UART, DMA on some
          UARTs or DMA on all UARTs.

          In the case of no DMA we disable the DMA based variables
          and logic. In the case of all DMA we disable the non
          DMA variables and logic, and in the mixed case both
          DMA and non DMA variable and logic are enabled.

    * kinetis:dma config fix formatting

    * kinetis:chip/dma fix formatting

    * kinetis:DMA config assume Unknown

           Assume KINETIS_DMA_VERSION_UKN for all SoC not versioned
           This is as the code was in nuttx prior to this commit

    * kinetis:DMAMUX contain versioning- use HAS pattern define Unknown

          The pattern for chip versioning is to define 'HAS' constants.
          Define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG to contain the
          version numbers to the include soc header and use that define
          in the chip headers.

          Define the KINETIS_DMAMUX_VERSION_UKN for the default as prior
          this commit addressing was by default monotonic for CHCFG

    * freedom-k66f:Disable Serial RXDMA

          The application has to add calling of the kinetis
          serial dma poll as it is application specific.

    Approved-by: GregoryN <gnutt@nuttx.org>
2018-08-10 08:03:50 -06:00
Juha Niskanen
e402dadf5d arch/arm/src/stm32l4: Avoid using redundant CONFIG_STM32L4_STM32L4X2. This is almost always same as CONFIG_STM32L4_STM32L4X3. Avoid duplication to reduce macro clutter. This patch limits CONFIG_STM32L4_STM32L4X2 usage to dependency tracking and pinmap. Also enable ADC for CONFIG_STM32L4_STM32L4X5 (untested, but same RM). 2018-08-09 06:42:54 -06:00
Gregory Nutt
5996d70883 Revise commit 09ccd43d61: That change had the subtle side-effect of unconditionally enabling interrupts in the primask. That may be what we want in most cases, but certainly not all. This does increse the size of the inline function by about 48-bits per instantiation. 2018-08-04 07:37:31 -06:00
Gregory Nutt
09ccd43d61 arch/arm/include/armv7-m, arch/arm/include/armv7-m, arch/arm/include/stm32f7: Add a configuration to enable workaround for r0p1 Errata 837070: Increasing priority usingwrite to BASEPRI does not take effect immediately.
This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can pre-empt execution.  Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next instruction. Subsequent instructions are guaranteed to see the new boosted priority.

This was raised in Bitbucket issue 113 from Vadzim Dambrouski.
2018-08-02 16:51:58 -06:00
Gregory Nutt
754c8493ff arch/arm/src/samd5e5: Leverage the SAMD2L2 DMA controller. 2018-07-29 11:31:26 -06:00
Gregory Nutt
a9d713bbcc This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:

    arch/arm/src/samd5e5: Clean-up EIC logic.
    arch/arm/src/samd5e5:  Fix some compilation issues; Still issues with the EIC logic from samd2x.
    arch/arm/src/samd5e5:  Fix some compilation issues; bring in some EIC logic from samd2x.
    arch/arm/src/samd5e5:  Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
    configs/metro-m4:  Add LED support.
    arch/arm/src/samd5e5:  Bring in SAML21 clock configuration.  This is a WIP; it cannot possible even compile yet.
    arch/arm/src/samd5e5:  Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
    arch/arm/src/samd5e5: Add SERCOM utility function.
    arch/arm/src/samd5e5:  Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5.  This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
    arch/arm/src/samd5e5: Add sam_config.h header file
    arch/arm/src/samd5e5/:  Add Generic Clock (GCLK) utility functions.
    arch/arm/src/samd5e5:  Add EVSYS register definition file
    arch/arm/src/samd5e5 and configs/metro-m4:  Use SERCOM3 for the Arduino serial shield as console.
    arch/arm/src/samd5e5/chip:  Add SERCOM USART, SPI, I2C master, and slave register defintions header files
    arch/arm/src/samd5e5/chip:  Add AES, PM, TRNG, and WDT header files.
    arch/arm/src/samd5e5/chip:  Add pin multiplexing header files.
    Various fixes to configuration system; fix metro-m4/nsh defconfig file.
    configs/metro-m4:  Add initial support for the Adafruit Metro M4 board.
    arch/arm/src/samd5e5:  Add peripheral clock helpers.
    arch/arm/src/samd5e5/chip:  Add PAC register definition header file.  Fix some errors in the memory map header file.
    arch/arm/src/samd5e5:  Add chip.h headerf file.
    arch/arm/src/samd5e5:  Add PORT register definitions and support from SAML21.
    arch/arm/include/samd5e5:  Add interrupt vector definitions.
    arch/arm/src/samd5e5:  Add some boilerplate files.  Correct some typos.
    arch/arm/src/samd5e5/chip/sam_eic.h:  Add EIC register definitions.
    arch/arm/src/samd5e5/chip:  Add OSC32KCTRL and OSCCTRL register definitions.
    arch/arm/src/samd5e5/chip:  Add GCLK, MCLK, and RSTC header files.
    arch/arm/src/samd5e5/chip/sam_cmcc.h:  Add CMCC register definitions
    arch/arm/src/samd5e5/chip/sam_supc.h:  Add SUPC header file.
    arch/arm/src/samd5e5:  Add start-up logic.
    arch/arm/src/samd5e5:  Add Make.defs file
    arch/arm/src/samd5e5/chip:  Add memory map header file.
    arch/arm/include/samd5e5:  Add chip.h header file.
    arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig:  Add configuration logic for the SAMD5x/Ex family.
2018-07-26 12:12:08 -06:00
Gregory Nutt
c3b406826e Rename all usage of samdl/SAMDL to samd2l2/SAMD2L2 to make room in the name space for the forthcoming samd5e5/SAMD5E5
Squashed commit of the following:

    Change all remaining occurrences of SAMDL to SAMD2L2.

    configs/:  Change all remaining occurrences of SAMDL to SAMD2L2

    configs/:  Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
    arch/arm/src and include:  Rename all directories from samdl to samd2l2.  Change all configuration variable names and other usage from SAMDL to SAMD2L2.
2018-07-22 15:54:12 -06:00
Daniel P. Carvalho
9223123cd2 arch/arm/src/stm32l4: Added custom pin mapping for STM32L4X2XX processors. 2018-07-16 15:42:13 -06:00
Alan Carvalho de Assis
283b73edc5 Fix lots of typos in C comments and Kconfig help text 2018-07-08 18:24:45 -06:00
Gregory Nutt
bdb73a60ca Fix some errors found in build testing. 2018-06-25 17:06:29 -06:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
Gregory Nutt
49ec86ddb1 arch/arm: Fix an error found in build testing. 2018-06-20 13:12:54 -06:00
Gregory Nutt
8bd9cfe038 Squashed commit of the following:
arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
2018-06-20 12:30:37 -06:00
Gregory Nutt
9a51854223 arch/arm/src/lc823450: This commit removes support for the dedicated vector handling from the LC823450 architecture support. Only common vectors are now supported. 2018-06-20 10:04:38 -06:00
Gregory Nutt
ade6751345 arch/arm/src/tiva: This commit removes support for the dedicated vector handling from the Tiva/LM architecture support. Only common vectors are now supported. 2018-06-20 09:18:42 -06:00
Gregory Nutt
b38618d0c6 Squashed commit of the following:
arch/arm/src/lpc17xx:  This commit removes support for the dedicated vector handling from the LPC17xx architectures. Only common vectors are now supported.
    arch/arm/src/kinetis:  This commit removes support for the dedicated vector handling from the Kinetis architectures. Only common vectors are now supported.
2018-06-20 08:18:32 -06:00
Gregory Nutt
01b740c66b arch/arm/src/efm32: Support for common vector handling is forced for all EFM32 chips. Yes the architecture provides support for the old-style dedicated vector handling which can never be compiled. Furthermore, the old-style dedicated vector handling is deprecated in favor of common vector handling. The commit resolves this inconsistency be removing support for the dedicated vector handling from the EFM32 architecture support. 2018-06-19 13:37:00 -06:00
Simon Laube
7b0475450c This commit brings in a partial, WIP port to the STMicro STM32H7. The port is still missing several key components that make unusable in its current form. However, the changes have lingered on a branch long enough.
See configs/nucleo-h743zi/README.txt for a detailed description of the state of the port.
2018-06-16 16:59:34 -06:00
Gregory Nutt
6230ab01b6 arch/arm/include/armv7-m: Last change requires inclusion of chip.h for definition. 2018-06-06 10:38:51 -06:00
Gregory Nutt
977d41d519 Based on a change recommended by Mark Shulte:
Signal handlers maybe run with interrupts enabled or disabled, depending on how the task the received the signal was blocked. (i.e.: If sem_wait() is called, then we disable interrupts, then block the currently running task). This could be dangerous, because user code would be running with interrupts disabled.

This change forces interrupts to be enabled in up_sigdeliver() before executing the signal handler calling up_irq_enable() explicitly.  This is safe because, when we return to normal execution, interrupts will be restored to their previous state when the signal handler returns.
2018-06-06 09:54:30 -06:00
Gregory Nutt
9222f50e1c arch/: Make sure the up_irq_enable() is available on all architectures. I will not be able to test all of these new versions of this function so this may break things for awhile. 2018-06-06 09:25:40 -06:00
Gregory Nutt
e07504291e configs/imxrt1050-evk: Fix OCRAM size used in linker script. 2018-05-24 16:51:18 -06:00
Gregory Nutt
ea8d78c9c5 arch/arm/src/imxrt: Add framework for eDMA support. Initial port is a rip off from the SAMA5Dx and is little more than the framework for the DMA support. 2018-05-16 14:28:22 -06:00
Jake Choy
93c94aadf8 arch/arm/include/imxrt/imxrt105x_irq.h: Fixed incorrect/duplicate gpio irq defines. 2018-05-08 09:46:02 -06:00
Gregory Nutt
b5a4d6d9ef configs/freedom-k28f: With these changes to the configuration, the NSH configuration is now functional on the k28f board. Also fixes corrects the active logic level for the RGB LED. arch/arm/src/kinetis/chip: Fixes an error in vector configuration. 2018-05-05 09:33:48 -06:00
Gregory Nutt
8c81b97148 Squashed commit of the following:
configs/freedom-k28f:  Add button and LED support.
    arch/arm/src/kinetis:  Fix a couple of additional compile problems.
    arch/arm/src/kinetis/chip and configs/freedom-k28f:  Add things needed for a successful build.  Still need board LED definitions.
2018-05-04 12:04:08 -06:00
Gregory Nutt
fa775661e7 And additional change that is needed with the previous commit. 2018-05-03 15:23:38 -06:00
Gregory Nutt
655d1dcf24 arch/arm/src/kinetis: Update LPUART register definitions for the K28F. 2018-05-03 15:14:58 -06:00
Gregory Nutt
c5a92c883a arch/arm/src/kinetis: Add PMC register definitions for the K28F. 2018-05-03 13:38:28 -06:00
Gregory Nutt
0f2b8b0ca2 arch/arm/src/kinetis: Add SIM register definitions for the K28F. 2018-05-03 12:31:54 -06:00
Gregory Nutt
3c7fa88fd4 arch/arm/src/kinetis: Adds MCG register definitions for the K28F. 2018-05-03 08:21:50 -06:00
Jake Choy
4261249fb6 arch/arm/src/imxrt: Add GPIO5 IRQ support. 2018-05-02 09:19:42 -06:00
Gregory Nutt
7927d1ff09 arch/arm/src/include/kinetis and src/kinetis: Beginning of a port to the K28F."
Squashed commit of the following:

    arch/arm/src/kinetis:  Add K28F memory map.
    arch/arm/src/include/kinetis and src/kinetis:  Add basic chip features and interrupt-related definitions for the K28F
2018-05-01 11:24:18 -06:00
Alan Carvalho de Assis
745a498ce2 arch/arm/include/nrf52: All nRF52 IRQs above NRF52_IRQ_TEMP were wrong. 2018-04-26 22:03:50 -06:00
Daniel Agar
8a648e8fa9 Merged in dagar/nuttx/pr-stm32f777_typo (pull request #628)
stm32f7 fix CONFIG_STM32F7_STM32F77X define typo

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-04-19 04:06:45 +00:00
Gregory Nutt
1efd591cd8 arch/arm/include/tms570, arm/src/armv7-r, and arm/src/tms570: Adds support for the TMS570LS3137ZWT and corrects seversl ARMv7-R and TMS570 issues 2018-04-18 08:58:36 -06:00
Ivan Ucherdzhiev
cf8c25df64 This commit brings in basic support fo the i.MX RT 1050 'crossover' SoC. The basic support is complete and compiles without error, but is still untested.
This port was the joing effort of Janne Rosberg, Ivan Ucherdzhiev, and myself.  I give credit to Ivan for the kill because he is the one to held on to the end.

Squashed commit of the following:

  Author: Gregory Nutt <gnutt@nuttx.org>
    configs/imxrt1050-evk/scripts:  Add section to linker script to handle the case where RAMFUNCs are enabled.  RAMFUNCs appear to be enabled in the default configuration ... they probably should not be enabled.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  imxrt_lowputc.c is finished. Now everything needed for the initial port is done and ready for testing.
    arch/arm/src/imxrt:  Add logic to imxrt_lowputc.c.  Still incomplete.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  Add serial support.  configs/imxrt1050-evk:  Add linker script.

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Add initial cut at imxrt_allocateheap.c

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arm/arm/src/imxrt:  Completes all definitions for PADMUX, CTLMUX, and IOMUX_INPUT and mapping tables on imxrt_gpio.c and imxr_iomuxc.c.
    arch/arm/src/imxrt/chip:  Add definitions for IMXRT_PADCTL and IMXRT_PADMUX registers.  Only the IMXRT_INPUT definitions in this commit.
    arch/arm/src/imxrt/chip:  Add more IOMUXC register definitions.

  Author: Gregory Nutt <gnutt@nuttx.org>
    configs/imxrt1050-evk:  Add STRIP definition to Make.defs.
    arch/arm/src/imxrt:  Bring in i.MX6 memory configuration settings.
    arch/arm/src/imxrt:  Remove call to non-existent imxrt_gpioinit() from imxrt_start.c.
    arch/arm/src/imxrt:  Bring in incomplete imxrt_iomuxc.c file from i.mx6.
    arch/arm/src/imxrt:  Add first cut at GPIO interrupt logic.
    arch/arm/include:  Add definitions to support a second level of GPIO pin interrupts.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_wdog.c/.h

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Port SAMv7 interrupt logic to imxrt_irq.c.
    arch/arm/src/imxrt:  More clarification of the start-up memory map.
    arch/arm/src/imxrt:  Some mostly cosmetic clean-up to the imxrt_start.c file that was so rudely taken from the SAMv7.
    arch/arm/src/imxrt:  Add imxrt_start.c.  Initial commit is the the SAMv7 startup logic with name changes.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  Adds a few IOMUXC register definitions.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_clockconfig.c/.h
    configs/imxrt1050-evk:  Add clock configuration definitions to board.h
    arch/arm/src/imxrt:  Fix CCM register name; Fix doubly defined in LPUART bit field.
    arch/arm/src/imxrt:  Add analog defines to CCM register definition header file.

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Bring in GPIO C files from i.MX6.  Things are in disarray now because that GPIO logic depends on IOMUXC logic which is not yet in place.
    arch/arm/src/imxrt:  Add a few more GPIO definitions to make the header file compatible with i.MX6
    arch/arm/src/imxrt/chip:  Add GPIO register definition file.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add DCDC register definitions.
    arch/arm/srch/imxrt: Add CCM register bit definitions

  Author: Gregory Nutt <gnutt@nuttx.org>
    Purely cosmetic
    arch/arm/src/imxrt:  Add system reset controller register definition header file.
    Embarassingly trivial change left in compiler.
    arch/arm/src/imxrt:  Finishes i.MX RT1050 LPUART register definition header file.
    arch/arm/src/imxrt:  Beginning of an i.MX RT1050 LPUART register definition header file.
    Some trivial things

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_wdog.h
    arch/arm/src/imxrt:  Add initial imxrt_ccm.h

  Author: Gregory Nutt <gnutt@nuttx.org>
    Trivial update to README.
    arch/arm/src/imxrt:  The i.MX Rt implements 4 bits of interrupt priority, not two.  Thanks, Janne.
    arch/arm/src/imxrt:  Fix some initial compile issues.  Still a long way from complete, but there is a buildable environment now for the imxrt1050-evk.
    configs/imxrt1050-evk:  Add an initial NSH configuration for testing.
    configs/Kconfig:  Hook the i.MX RT 1050 board configuration into the NuttX configuration system.
    configs/imxrt_evk:  Add the framework for i.MX RT 1050 board support.
    arch/arm/src/imxrt:  Bring in a few more files from LPC54xxx.
    arch/arm/src/imxrt:  Bring in imxrt_clrpend() from the LPC54xxx.
    arch/arm/src/imxrt:  Bring in Cortex-M7 SysTick setup from the SAMv7.
    arch/arm/src/imxrt:  Add a few easy files.
    arch/arm/src/imxrt/chip:  Add memory map header files.
    arch/arm/src/imxrt:  A few basic files to start the port to the i.MX RT 1050.
2018-04-12 09:31:09 -06:00
Gregory Nutt
730f7450b7 Remove all support for the CC3200 and CC3200-Launchpad. This was a port that was started but never completed. What good is partial CC3200-Launchpad board support with no wireless support?
Squashed commit of the following:

    Remove final references to CC3200 from the repository.
    arch/arm/include/tiva:  Remove all CC3200 support.
    arch/arm/src/tiva:  Remove all CC3200 support.
    configs/cc3200-launchpad:  Remove the board support directory.
2018-04-09 16:41:27 -06:00
Masayuki Ishikawa
97ca4ef956 Merged in masayuki2009/nuttx.nuttx/change_copyright (pull request #621)
Change all Sony related copyright to conform with our company's internal rules.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-04-04 12:35:47 +00:00
Janne Rosberg
d608f6943b arch/arm/src/nrf52: Initial support for the NRF52 2018-03-26 10:37:32 -06:00
Gregory Nutt
ab5244e855 arch/arm/src/stm32: While we are at it and the differences are fresh in mind, add support for the rest of the STM32F401 family. 2018-03-05 17:36:08 -06:00
Gregory Nutt
33adf2c64d arch/arm/src/stm32: Add support for the STM32F401xB and STM32F401xC families. 2018-03-05 13:45:01 -06:00
Gregory Nutt
1e59d9dd14 armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions. 2018-02-04 12:22:03 -06:00
Matt Thompson
48355b32dc Merged in extent3d/nuttx (pull request #568)
SAMD External Interrupt Controller (EIC) support

* SAMD External Interrupt Controller (EIC) support

* removed comment

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2018-01-12 13:11:58 +00:00
raiden00pl
01dc86da3d stm32/chip.h: minor fixes for STM32F334 2018-01-03 19:07:51 +01:00
Gregory Nutt
c17651e26e arch/arm/include/lpc54xx: Add SD/MMC header file. 2017-12-19 09:12:42 -06:00
Gregory Nutt
5a12079e53 arch/arm/src/lpc54xx: Implement GPIO interrupt support. configs/lpcxpress-lpc54628: Add support for the USER button. Enable the apps/examples/button test in the NSH configuration. 2017-12-16 13:00:06 -06:00
Gregory Nutt
8bc90a1899 This adds basic architectural support for the LPC546xx family and includes support for the LPCXpresso-LPC54628 board. The basic NSH port is almost complete... still lacking GPIO support and LED support. There are still no significant drivers available.
Squashed commit of the following:

    arch/arm/src/lpc54xx:  Finish off some missing logic.  Complete now execpt for GPIO and LED support.
    arch/arm/src/lpc54xx:  Add lpc54_clrpend.c
    arch/arm/src/lpc54xx:  Serial driver is complete and compiles.
    arch/arm/src/lpc54xx:  Add beginning of a serial driver (still missing some logic)
    arch/arm/src/lpc54xx:  Fleshes out low level USART intialization.
    arch/arm/src/lpc546xx/Kconfig: Add hooks to integrate with common seril upper half.
    arch/arm/src/lpc54xx:  Beginning of USART console support.
    arch/arm/src/lpc54xx: Completes very basic clock configuration.
    arch/arm/src/lpc54xx:  Add clocking logic (still not complete)
    arch/arm/src/lpc54xx:  Beginning of PLL configuration logic.
    arch/arm/src/lpc54xx:  Fix a few things from first compile attempt.  Compilation cannot work until I at least finish the clock configuration logic.
    arch/arm/src/lpc54xx: Addes some SysTick logic.
    arch/arm/src/lpc54xx:  Completes basic startup logic (sans clock configuration) and interrupt configuration.
     arch/arm/src/lpc54xx:  Add generic ARMv7-M start-up logic (needs LPC54628 customizations); add emtpy file that will eventually hold the clock configuration logic.
    arch/arm/src/lpc54xx:  Add (incomplete) SYSCON register definition header file.
    arch/arm/src/lpc54xx:  Add FLEXCOMM header file.
    arch/arm/src/lpc54xx:  Bring in tickless clock logic from LPC43; configs/lpcxpresso-lpc54628: mount procfs if enabled.
    arch/arm/src/lpc54xx: Add RIT clock definitions; add SysTick initialization (not finished)
    LPC54xx and LPCXpresso-LPC54628: add more boilerplate files and stubbed out files.
    arch/arm/src/lpc54xx:  Add (incomplete) USART header file.
    Add another condition to a Kconfig; refresh a defconfig.
    arch/arm/src/lpc54xx/chip: Add LPC54628 memory map header files.
    configs/lpcxpresso-lpc54628:  Add basic build files for the LPCXpresso-LPC54628
    arch/: Basic build directory structure for the LPC54628
2017-12-07 13:30:02 -06:00
Gregory Nutt
a197676006 Fix typos in some comments. 2017-11-23 14:21:57 -06:00
Bob Feretich
fab5faf097 STM32F7: Completes architecture support for the STM32 F72x and F73x families. Adds support for the Nucleo-144 boards with STM32F722. 2017-11-18 07:55:50 -06:00
Bob Feretich
13b52da3fa stm32 f72xx and f73xx: Add register definition header files and clocking logic 2017-11-17 07:18:02 -06:00
Gregory Nutt
08fa834a6a arch/arm/include/stm32 and stm32f7: Remove ltdc.h and dma2d.h. Those header files in that location permitted inclusion into application space logic and, hence, facilitated and encouraged calling into the OS and violating the portable POSIX OS interface. The definitions in those header files were move the appropriate location in the counterpart, architecture specific files at arch/arm/src/stm32 and stm32f7 dma2d.h and ltdc.h.
configs/stm32f429i-disco/ltdc:  This configuration has been deleted because it violated the portable POSIX OS interface.  It used apps/examples/ltdc and include ltdc.h and dma2d.h which were also removed for the same reason.
2017-11-06 12:22:48 -06:00
Gregory Nutt
25079a9c93 BCM2708: Fleshes out GPIO interrupt logic. 2017-10-18 10:13:10 -06:00
Gregory Nutt
851fa7ba85 BCM2708: Fixes off system timer logic for the Pi Zero. 2017-10-17 14:53:11 -06:00
Gregory Nutt
0fc8978a90 Pi Zero: Add GPIO module header file. 2017-10-17 07:37:44 -06:00
Gregory Nutt
270aa2848a Squashed commit of the following:
BCM2708:  Add enough infrastructrue (more stubs) to get a clean compilation of the Pi Zero configuration (with many undefined things at link time).

    BCM2708:  Add basic interrupt handling logic

    BCM2708: Add interrupt register definitions.

    BCM2708:  Add irq.h header file

    BCM2708/Pi zero:  bcm_boot.c and bcm_memorymap.h now compile.  Added pizero linker script.

    BCM2708/Pi Zero:  Add Make.defs needed to build.

    arch/arm/include/bcm2708, arch/arm/src/bcm2708, configs/pizero:  Add some basic build and configuration logic.

    configs/pizero:  Add some basic structure of the Rasperry Pi Zero port.

    Created directory configs/pizero.  Nothing there now but a README.txt file.

    Add initial boot.c and memorymap.c files
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Add AUX/UART/SPI registers definition
    Author: Alan Carvalho de Assis <acassis@gmail.com>

    Pizero GPIO registers
    * Initial commit to add GPIO definitions
    * Add remaining GPIO registers definition
    Alan Carvalho de Assis <acassis@gmail.com>

    BCM2708 memory map:  Add VBASE defintions; fix VCSDRAM address per Alan; move all virtual address to the bottom of the file to avoid confusion -- top is all physical address; bottom is all veritural address.

    Add initial memory map to BCM2708/BCM2835
    Alan Carvalho de Assis <acassis@gmail.com>
2017-10-09 13:11:17 -06:00
Alan Carvalho de Assis
81d6cefd65 Add support to STM32F433RC 2017-08-28 07:05:32 -06:00
Juha Niskanen
37867ae3b9 chip.h edited online with Bitbucket: correct some STM32_NDAC 2017-08-21 07:30:58 +00:00
raiden00pl
0bed6ac8b4 STM32F33: correct STM32_NDAC 2017-08-20 20:07:50 +02:00
Gregory Nutt
42b3ee4cfc Fix a few errors that crept in with my review changes. 2017-08-02 09:19:29 -06:00
Gregory Nutt
5f2d4b8f84 Changes from review of commit e851a24329 2017-08-02 08:26:08 -06:00
Masayuki Ishikawa
e851a24329 arch/arm/src/lc823450: Initial support for ON Semiconductor LC823450
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2017-08-02 21:09:43 +09:00
Titus von Boxberg
28eab902d0 No FSMC, only FMC for STM32F7 2017-07-27 18:27:01 +02:00
Gregory Nutt
c3b552e072 Minor cosmetic updates from review of last PR. 2017-07-20 07:39:57 -06:00
Titus von Boxberg
ea703b832a copied from stm32 2017-07-19 19:07:53 +02:00
Gregory Nutt
47be509d79 Rename CONFIG_STM32_STM32F40XX to CONFIG_STM32_STM32FXXXX since it is used by F4 parts other than F40x 2017-07-06 10:20:14 -06:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
8b907c4c1f STM32L4: Fix a typo 2017-06-08 11:07:20 -06:00
Gregory Nutt
95fcdff1fd STM32L4: Add STM32L475 RCC definitions/logic. 2017-06-08 10:04:28 -06:00
Gregory Nutt
66e2247f30 STM32L4: Ad support for the STM32L475 family. Incomplete -- still needs pinmap, rcc, otgfs, syscfg 2017-06-08 08:52:09 -06:00
Gwenhael Goavec-Merou
02535be36a STM32F410. Add support for STM32Fr10. STM32F410 is a version of STM32F4 with 32 KB of RAM and 62 or 128 KB of flash. 2017-05-13 08:40:09 -06:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Juha Niskanen
35883ff9ae Merged in juniskane/nuttx_stm32l4/l4dev (pull request #347)
STM32L4: add support for many new MCUs from STM32L4X3XX product line and Nucleo-L452 board

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-05-05 15:31:07 +00:00
David Sidrane
2171523f50 Kinetis:Add TPM to K66 chip 2017-05-05 07:12:52 -06:00
Juha Niskanen
ae22eb224a STM32L4: changes needed for STM32L452 and Nucleo-L452RE board
GPIO and UART seem similar across STMicro product matrix,
so renamed files accordingly. RCC is cloned just in case,
while conflicting differences there seem to be very minor.
2017-05-04 15:23:38 +03:00
Juha Niskanen
a59b7bc932 STM32L4: add GPIO_PORTI definition
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2017-05-02 07:41:14 -06:00
Juha Niskanen
b4d2651ca9 STM32L4: stm32l4_i2c: add I2C4 code 2017-04-28 08:09:16 -06:00
Juha Niskanen
f1b71e3ae7 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:26:32 -06:00
Juha Niskanen
8a6662c957 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:25:20 -06:00
Juha Niskanen
06e4c4aedd STM32L4: add support for the STM32L496XX family 2017-04-25 08:47:50 -06:00
Juha Niskanen (Haltian)
c04c49dac0 Add support for the STM32F09X family. 2017-04-21 08:23:25 -06:00
Gregory Nutt
73c7f05a3c Cosmetic changes to spacing and comments. 2017-04-20 14:08:08 -06:00
Gregory Nutt
d0ec395c42 Correct some spacing and some unused definition in some irq.h header files. 2017-04-20 12:39:21 -06:00
Juha Niskanen
9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Gregory Nutt
27e212a291 Nucleo-F072RB: Various fixes to get the first clean build. 2017-04-18 10:37:05 -06:00
Gregory Nutt
8b157b034d STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x 2017-04-17 17:13:32 -06:00
Gregory Nutt
2c01aaad59 STM32F0: Add basic support for STM32F07x family 2017-04-17 16:54:07 -06:00
Gregory Nutt
c910334ced Make sure that Alan is listed as author in new files. 2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis
c3e0ec369f Add basic support for STM32F0 2017-04-14 08:34:36 -06:00
Juha Niskanen
e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
David S. Alessio
7f2c4c4274 XMC4xxx: Add FPU support 2017-03-22 12:04:32 -06:00
Gregory Nutt
805a4f65e9 XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration. 2017-03-21 09:31:44 -06:00
Gregory Nutt
886dadae0a XMC4xxx: Minor updates to naming and comments 2017-03-20 18:10:23 -06:00
Gregory Nutt
b9e29d1083 XMC4xxx: Clean up memory map 2017-03-20 17:08:09 -06:00
Gregory Nutt
4ba091933e XMC4xxx: Fix for early bringup problems 2017-03-20 16:31:35 -06:00
Gregory Nutt
5c0be816a5 XMC4xxx: Add commin USIC support logic for use in all USIC configurations. 2017-03-19 12:48:37 -06:00
Gregory Nutt
5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt
2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
ahb
67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
David Sidrane
61b10c5e58 Kinetis:Add LPUART to K66 chip
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
2017-02-25 07:02:56 -10:00
David Sidrane
1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt
e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00
David Sidrane
ff056cf9bd arch/arm/include/kinetis/kinetis_mcg.h 2017-02-07 12:38:28 -10:00
David Sidrane
2216ed52a9 Kinetis chip Adding K66 and inlcuding MCG versioning
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
2017-02-07 12:38:28 -10:00
David Sidrane
ec567371b6 Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
2017-02-07 12:38:28 -10:00
Gregory Nutt
9395704192 Kinetis, not Kinetics. 2017-02-07 08:20:52 -06:00
Wolfgang Reißnegger
a22dc9b1a8 SAM3/4: Add support for ATSAM4S4C. 2017-01-18 11:56:51 -08:00
Maciej Skrzypek
902c41462d Kinetis: New K60 has no Flex memory 2017-01-13 08:20:48 -06:00
Maciej Skrzypek
4becebe59f Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60 2017-01-13 08:13:21 -06:00
Maciej Skrzypek
bc1826da63 Kinetis: Added CHIP_MK60FN1M0VLQ12 chip 2017-01-13 08:10:03 -06:00
Gregory Nutt
12148f0e33 Merged in paulpatience/nuttx/stm32 (pull request #180)
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
2016-12-24 20:20:39 -06:00
Gregory Nutt
f063e4c5ac Remove Calypso architecture support and support for Calypso SERCOMM driver. 2016-12-13 18:35:52 -06:00
Gregory Nutt
26560cb9e1 i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept. 2016-12-13 16:59:50 -06:00
Paul A. Patience
30bbeb6c1f STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs 2016-12-08 16:31:39 -05:00
Sebastien Lorquet
db24f237d7 STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings 2016-12-01 09:00:59 -06:00
Gregory Nutt
3353d9280f i.MX6: Disable non-cached region support. Add SCU register definitions. 2016-11-26 17:03:57 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
f53e48199f Simplify and document some macros 2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature. 2016-11-21 11:55:59 -06:00
Paul A. Patience
912fe06a86 Add architecture-specific inttypes.h 2016-10-27 16:01:38 -04:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Gregory Nutt
48fb97e7b5 More of the same cloned typo 2016-10-19 10:11:45 -06:00
David Sidrane
bce382da52 Kinetis Support ARMV7 Common Vector and FPU 2016-10-18 12:00:01 -10:00
Gregory Nutt
56f2454c86 Fix names of pre-processor variables used in header file idempotence 2016-08-06 18:48:45 -06:00
Gregory Nutt
e6137ff129 Rename SAMD/L version of CONFIG_GPIO_IRQ to CONFIG_SAMDL_GPIOIRQ 2016-07-22 14:38:33 -06:00
Gregory Nutt
360efe03c1 Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ 2016-07-22 14:18:30 -06:00
Gregory Nutt
7a7998e4f9 Add support for the NXP Freedom-K64F board. This is primarily the work of Jordan Macintyre. I leveraged this code from https://github.com/jmacintyre/nuttx-k64f 2016-07-01 15:42:21 -06:00
Gregory Nutt
91dd3306c8 arch/arm/src/kinetis: Add basic support for the K64 family. Still moving register definition files to the kinetis/chip subdirectory. 2016-07-01 11:24:41 -06:00
David Sidrane
2de4ec2a47 Added as an author 2016-06-17 12:38:17 -10:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Konstantin Berezenko
b9e7b4ed70 Correct the can2 rx irq number for stm32f10xx chips 2016-06-10 10:52:58 -07:00
David Sidrane
d8ea955d69 Added STM32FF76xxx and STM32FF7xx families 2016-06-08 08:26:26 -06:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Paul A. Patience
56b018d5db STM32: Fix typo 2016-06-06 12:02:11 -04:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Konstantin Berezenko
a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Aleksandr Vyhovanec
472115eda9 ARMv7-M: Add support for the IAR compiler 2016-04-02 08:14:09 -06:00
Gregory Nutt
e0249bd025 STM32L4: Fix incorrect and conflicting definitions for STM32L4_NGPIOS and STM32L4_NGPIO_PORTS. Now there is only STM32L4_NPORTS. 2016-03-20 14:12:07 -06:00
Gregory Nutt
4e07680554 TLS: Forgot to add a file before last commit 2016-03-11 12:30:04 -06:00
Sebastien Lorquet
f4f03e6f02 Add port to the stm32L4 2016-03-10 09:59:16 -06:00
Gregory Nutt
5c75f83b55 ARMv7-A GIC: Add definitions for shared interrupt IDs 2016-03-10 07:13:40 -06:00
Gregory Nutt
400aead74a i.MX6: Add definitions for private processor interrupt IDs 2016-03-09 18:11:28 -06:00
Gregory Nutt
5c881e6d2e i.MX6: minor updates to last commit 2016-03-04 18:44:30 -06:00
Gregory Nutt
5100e7a623 i.MX6: Add some preliminary definitions to handle other family members 2016-03-04 18:43:16 -06:00
Gregory Nutt
bed5aa8731 Add IMX_NCPUS to i.MX6 chip.h file 2016-03-02 10:28:09 -06:00
Gregory Nutt
b466f18daf i.MX6: Some fixes for early compile issues 2016-03-01 14:15:43 -06:00
Gregory Nutt
52d777fa8d Merged in paulpatience/nuttx-arch/stm32f469 (pull request #56)
STM32: Add support for STM32F46xxx
2016-03-01 11:53:07 -06:00
Paul A. Patience
099990f3da STM32: Add support for STM32F46xxx 2016-03-01 12:18:07 -05:00
Gregory Nutt
fe7331900c i.MX6 add dummy chip.h header files 2016-02-29 14:08:16 -06:00
Gregory Nutt
0a9920a87a i.MX6: Add IRQ header file 2016-02-28 14:07:53 -06:00
Gregory Nutt
74e5336b39 Rename the imx/ directories to imx1/ to make room in the namespace for other members of the i.MX family 2016-02-27 10:29:24 -06:00
Gregory Nutt
666cc280f4 Rename irqenable() to up_irq_enable(); rename irqdisable() to up_irq_disable() 2016-02-14 16:54:09 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
5d449e9991 Add spinlock support for ARMv7-A architectures 2016-02-09 12:53:10 -06:00
Gregory Nutt
8f1b9886a9 Backport the new LPC17xx I2C driver to the LPC11xx in order to get the I2C_TRANSFER method 2016-01-30 12:17:01 -06:00
Gregory Nutt
f4115ab45c Correct LPC11xx priority definitions + fix some typos in comments 2016-01-25 07:36:26 -06:00
Lok Tep
1f4ce9e7f9 LPC43xx: Fix some NVIC priority definitions 2016-01-25 07:23:28 -06:00
Andrew Webster
43303a5786 Kinetis: add MK60N512VLL100 support 2016-01-21 19:07:18 -06:00
Gregory Nutt
c58393cb4d TMS570: Add GIO drivrs and GIO interrupt support 2015-12-25 13:44:49 -06:00
Gregory Nutt
ccc6913383 TMS570: Add definitions to support GIO second level interrupts 2015-12-25 11:43:38 -06:00
Gregory Nutt
ea1fa2e938 TMS570: SCI serial driver is now included in the build and compiles without error 2015-12-24 13:37:42 -06:00
Gregory Nutt
fa36531fee TMS570: Add default VIM channel assignments 2015-12-23 09:45:32 -06:00
Gregory Nutt
5794675247 TMS570: Memory map applies only to LS04x and LS03x. Peripheral numbering seems to start with 1, not 0 2015-12-16 14:10:45 -06:00
Gregory Nutt
bacf7cf07e ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
Gregory Nutt
8cabb844ab TMS570: Hook into build/configuration system 2015-12-15 17:15:37 -06:00
Gregory Nutt
a6e035baeb TMS570: Add arch/arm/include/tms570 header files 2015-12-15 13:41:12 -06:00
Gregory Nutt
6a9876f960 SAMV7: Add an untested RSWDT driver 2015-12-06 09:56:45 -06:00
Gregory Nutt
a6d6c430d9 Changes to last merge from review for compliance to coding standards 2015-11-17 21:10:17 -06:00
Marwan Ragab
4999c14085 Added implementation to get 96-bit stm32 unique id 2015-11-17 21:34:41 -05:00
Gregory Nutt
0add2b8910 arch/arm/include/samv7: Add support for the SAME70 family 2015-11-14 11:36:21 -06:00
Lok Tep
3b4c71ef8d more revert 2015-11-09 14:51:00 +01:00
Lok Tep
a8416d2a26 revert 2015-11-09 14:41:08 +01:00
Lok Tep
7d386866af Merged nuttx/arch into master 2015-11-09 14:24:41 +01:00
v01d
79fad2843a lpc4337: WIP 2015-10-30 20:15:18 -03:00
Gregory Nutt
2b078150e8 Merged in marten_svanfeldt/nuttx-arch-public/for_upstream/stm32f429n (pull request #20)
Add support for STM32F429N (TFBGA) chip
2015-10-22 18:19:52 +08:00
Marten Svanfeldt
4d879a33ee Add support for STM32F429N (TFBGA) chip
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
2015-10-21 10:30:57 +08:00
Lok Tep
5983019a45 merge from nuttx 2015-10-08 22:57:34 +02:00
Gregory Nutt
9caf33e13b Standardize the width of all comment boxes in C header files 2015-10-03 07:28:30 -06:00
Gregory Nutt
cae0c9a2e3 Standardize the width of all comment boxes in header files 2015-10-02 17:47:23 -06:00
Gregory Nutt
36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt
3a07b09b9a LPC43xx: Tweaks to pkolesnikov's LPC4370 changes to get a clean compilation 2015-10-01 10:00:25 -06:00
petekol
0eb1afcdef usb reset right 2015-09-30 17:13:32 +02:00
petekol
585fdf70d8 CONFIG_ARCH_CHIP_LPC4370FET100 2015-09-29 17:23:17 +02:00
Gregory Nutt
cbdafb96d5 Remove unused function setipsr. Cortex-M IPSR register is not writable 2015-09-23 08:38:32 -06:00
Gregory Nutt
139a31b875 stm32f74xx75xx_irq.h: STM32_IRQ_SAI2 is not defined but STM32_IRQ_SAI1 is defined twice. Noted by Vlad Chiorean 2015-09-22 07:45:59 -06:00
Gregory Nutt
a27e673967 SAMA5D2: Finish implementtion of the PIO driver 2015-09-12 11:36:06 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Gregory Nutt
831272cd35 SAMA5D2: Add memory map file 2015-09-02 13:04:01 -06:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
c33efa0a60 SAMA5D2: Add chip definitions, PIDs, and IRQ definitions 2015-08-31 15:19:01 -06:00
Paul A. Patience
c800841632 Added definitions for STM32F303K6, STM32F303K8, STM32F303C6,
STM32F303C8, STM32F303RD, and STM32F303RE devices.
2015-08-17 14:00:49 -04:00
Gregory Nutt
348060f5d2 SAMV7: Add QSPI Register Definition Header File 2015-08-14 18:11:01 -06:00
Anton D. Kachalov
f10b7ff09a Merge branch 'master' of https://bitbucket.org/nuttx/arch 2015-08-10 18:14:49 +03:00
Anton D. Kachalov
46444388fa Add Shared IRQ support for UART w/multi port.
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-08-10 18:13:35 +03:00
Gregory Nutt
f986d08515 SAMV71: Fix error in GPIO interrupt numbering 2015-08-05 08:57:05 -06:00
Gregory Nutt
23ed19c514 Clean-up from last commit to make sure that all files have BSD licensed header with the correct authors and that the code conforms to the NuttX coding style 2015-07-29 13:52:23 -06:00
Anton D. Kachalov
75762f1519 Add support for MoxaRT 2015-07-29 19:13:47 +03:00
David Sidrane
778c630c6b Add support for the STM32446. From David Sidrane 2015-07-22 07:26:53 -06:00
David Sidrane
e36ca25c5c STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 11:30:45 -06:00
Gregory Nutt
9c284bb05f Syscall fixes: Add support for Cortex-M7; mount syscall has to be suppressed if there are no mountable file systems 2015-07-21 11:20:46 -06:00
Gregory Nutt
5f9b0b3a2f STM32 F7: Add USART/UART register definition 2015-07-18 15:58:59 -06:00
Gregory Nutt
12f04f8500 STM32 F7: Add heap initializatino logic; Clone the STM32 CCM allocator as the F7 DTCM allocator 2015-07-18 12:52:24 -06:00
David Sidrane
5e1a50c93e STM32: Oops. Some STM32 F7 edits accidentally went into STM32 files ;(. Fixed by David Sidrane 2015-07-18 11:05:44 -06:00
Gregory Nutt
4f307ba36a STM32F7: Clone GPIO support from the STM32 F4 2015-07-18 08:34:07 -06:00
Gregory Nutt
7eb5e7f9ec STM32F746G-DISCO: Getting closer to a build 2015-07-17 11:47:16 -06:00
Gregory Nutt
a7a7ec8850 STM32 F7: Misc naming fixes 2015-07-16 19:49:20 -06:00
Gregory Nutt
3583f8c1dc STM32 F7: Add more configuration selections 2015-07-16 18:30:40 -06:00
Gregory Nutt
d8915e9dc6 Add include/chip.h definitions and configuration support for the STM32 F7 2015-07-16 08:47:25 -06:00
Gregory Nutt
be16a06857 Create a src directory for the STM32F7 (not much in it yet) 2015-07-15 14:32:28 -06:00
Gregory Nutt
1ed5f5a3ed STM32: Move STM32F42xxx IRQ definitions out of stm32f40xxx_irq.h into their own stm32f42xxx_irq.h header file 2015-07-15 13:52:20 -06:00
Gregory Nutt
3efe60bb6d STM32 F7: Add interrupt vector definitions 2015-07-15 10:54:03 -06:00
Gregory Nutt
4a38276ff9 SAMD21: Extend SAMD USART support to include SAMD21 differences 2015-06-21 09:17:01 -06:00
Gregory Nutt
28ae44eb02 SAMD21: Add memory map header file 2015-06-20 15:02:25 -06:00
Gregory Nutt
66a960dacd SAMD21: Add interrupt vectors definitions 2015-06-20 14:40:47 -06:00
Gregory Nutt
15c8e2e00a SAMD21: Add interrupt vectors definitions 2015-06-20 14:40:36 -06:00
Gregory Nutt
d00ed2d780 Add configuration support for SAMD21 2015-06-20 14:31:53 -06:00
Gregory Nutt
75077f4728 SAML21: Add DMA descriptor management logic 2015-06-14 08:48:25 -06:00
Gregory Nutt
8c8b2d926b SAMD21: Add build framework for DMA support. Nothing there yet except for skeletal logic taken from SAM3/4. 2015-06-13 15:06:37 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
d6ce8220fd Clean up and review of header files for conformance to standards 2015-06-12 18:07:47 -06:00
Gregory Nutt
0742ee3c3e Add support for MK20DN--VLH5 and MK20DX---VLH5. Needed for backward compatible support for Teensy-3.0 2015-06-10 11:45:17 -06:00
Gregory Nutt
f01c04f1a7 Add support for other members of the Kinetis MK20DX---VLH7 family; undate a README 2015-06-09 18:01:32 -06:00
Gregory Nutt
0c59dd2888 Fix a missing # in the previous commit 2015-05-31 13:26:13 -06:00
Gregory Nutt
4e811aa54d Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous). 2015-05-31 13:06:26 -06:00
Gregory Nutt
318345fb1d Basic support for the Kinetis K20 architecture. Taken from PX4. This is the work of Jakob Odersky. 2015-05-26 15:03:35 -06:00
Gregory Nutt
9140a0fcc4 Initial support for the NXP LPC11 family and the LPC1115 MCU in particular. Contributed by Alan Carvalho de Assis. 2015-05-22 14:14:09 -06:00
Gregory Nutt
4458a34787 SAML21: Add interrupt header file + fix a few initial compile issues. Still a long way to go 2015-05-18 17:41:28 -06:00
Gregory Nutt
5ba5b5e24b SAML21: Add configuration logic and placeholders for memory man and pin configruation header files 2015-05-14 14:02:50 -06:00
Gregory Nutt
3ec627b02d Rename SAMD directories and configuration variables to SAMDL so that the same build environment can support the SAML 2015-05-14 12:25:09 -06:00
Gregory Nutt
10bfcaf939 Fix typo in arch/arm/include/kl/chip.h header file. From Michael Hope 2015-05-12 07:05:29 -06:00
Gregory Nutt
aaaa8f2e9d Adds support for STM32F302K8 and STM32F302K6. From Ben Dyer via PX4/David Sidrane. 2015-05-08 14:10:55 -06:00
Gregory Nutt
8062555384 Add support for the KL25Z64. The KL25Z64 is a lower memory variant of the KL25Z128 and is used on the Teensy LC. From Michael as SourceForge patch 50. 2015-05-07 06:47:17 -06:00
Gregory Nutt
d77a19f0a2 Two r's and only two r's in the word interrupt 2015-04-23 14:04:43 -06:00
Gregory Nutt
7a6a5b7bd0 Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer).
The main features are:

1. DMA2D interface
   Supports the nuttx pixel formats:
   - FB_FMT_RGB8
   - FB_FMT_RGB24
   - FB_FMT_RGB16_565
   Dynamic layer allocation during runtime for the supported formats
   - The number of allocatable layer can be configured.
   Supported dma2d operation:
   - blit (Copy content from source to destination layer) also works with
     selectable area.
   - blend (Blend two layer and copy the result to a destination layer wich can
     be a third layer or one of the source layer) also works with selectable
     area.
   - fillarea (Fill a defined area of the whole layer with a specific color)

As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.

2. LTDC interface

   I have changed the api for the currently non implemented operations:
   - blit (Copy content from a dma2d layer to an ltdc layer) also works with
     selectable area.
   - blend (Blend two dma2d layer and copy the result to a destination ltdc
     layer) also  works with selectable area.

     Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
     is a layer referenced by the dma2d interface.

     One of the most important questions for me was, How can i flexible use an
     ltdc layer with the dma2d interface, e.g. as source layer for dma2d
     operations?
     Get the layer id of the related dma2d layer by a special flag when using
     getlid() function of the ltdc interface and use the layer id to reference
     the specific dma2d layer by the dma2d interface.

     The ltdc coupled dma2d layers are predefined and can't be dynamically
     allocated of freed. They use the same frame buffer memory and the same
     color lookup table.

   Changes:
   - layer internal format of the clut table
   - interrupt handling for register reload (vertical vblank) instead using
     waiting loop
   - small fixes and refactoring

From Marco Krahl.
2015-04-16 09:11:52 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
cf8f8b8c4a SAMV6 USB updates 2015-03-26 09:49:01 -06:00
Gregory Nutt
a590bdc737 SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling 2015-03-16 13:51:37 -06:00
Gregory Nutt
8f59fc8f64 SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7 2015-03-12 18:03:41 -06:00