Commit Graph

12753 Commits

Author SHA1 Message Date
David Sidrane
3840c802d1 Kinetis SPI and I2C are 0 based
The K whole family line has max 4 or each. But the supported
  parts have the maximums listed below:

    K46 and K66    3 SPI SPI0-SPI2
    K46 and K66    4 I2C I2C0-I2C3
2017-02-13 13:24:47 -10:00
David Sidrane
ddd1f8c507 Kinetis SDHC - Enable clock after selected 2017-02-13 13:24:47 -10:00
Gregory Nutt
40f8e8b41f Fix some backward DEBUGASSERT tests in ROMFS and FAT. 2017-02-13 14:06:39 -06:00
Manohara HK
b154531838 I found an issue inside the cp15_coherent_dcache function in file, arch/arm/src/armv7-r/cp15_coherent_dcache.S.
The "mcr CP15_BPIALLIS(r0)" instruction is used for invalidating entire branch predictor.  But the problem is, since this is the generic code and can be called on any armv7-r architecture based CPU's.  It is a problem, if this instruction is called in uni processor configuration. Because, BPIALLIS (c7, 0, c1, 6) instruction is only added as part of the "Multiprocessing Extensions" (As per ARM® Architecture Reference Manual /ARMv7-A and ARMv7-R edition)

So in my opinion, this instruction should be under SMP configuration. In non-SMP configuration this instruction could become undefined.
2017-02-13 06:33:15 -06:00
David Sidrane
a907bbc5d3 Typo up_exit.c edited online with Bitbucket 2017-02-09 20:38:15 +00:00
Gregory Nutt
3329a534f7 Remove spurious blank line. 2017-02-09 13:06:42 -06:00
Gregory Nutt
c55d8f15a1 Merged in david_s5/nuttx/upstream_bkp_fix (pull request #206)
STM32 & STM32F7 Fixes the bkp reference counter issue

Approved-by: Gregory Nutt
2017-02-09 19:03:04 +00:00
David Sidrane
550d259a28 STM32F7: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
David Sidrane
169b3982a2 STM32: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
Gregory Nutt
a292da29d0 Costmetic changes from review of last PR. 2017-02-09 08:39:31 -10:00
David Sidrane
7262a788c4 Better granualarity and erro checking of the board's MCG settings
Allow for complete MCG_C2 definition from the boart.h file
  Moved #ifdef out of code by setting default values for
  Allow for individule bit setting in MCG_C2 for
    BOARD_EXTCLOCK_MCG_C2
    BOARD_MCG_C2_FCFTRIM
    BOARD_MCG_C2_LOCRE0
  Added range and sanity checking
2017-02-09 08:39:31 -10:00
David Sidrane
0e687121e5 arch/arm/include/kinetis/kinetis_mcg.h 2017-02-09 08:39:31 -10:00
David Sidrane
b2deadd569 Support the Indexed name LOCK->LOCK0 2017-02-09 08:39:30 -10:00
David Sidrane
eee029eec1 MCG defines are based on the MCG feature configuration
We define the bits as a common set of names. This means that
  an index may be added to a name i.e. LOCK is LOCK0 as that is
  the superset name.
2017-02-09 08:39:30 -10:00
David Sidrane
ab7b72f2e8 Kinetis chip Adding K66 and inlcuding MCG versioning
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
2017-02-09 08:39:30 -10:00
David Sidrane
9bbd98580b Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
2017-02-09 08:39:30 -10:00
David Sidrane
6199d1801e Add K66 memory map 2017-02-09 08:39:30 -10:00
David Sidrane
db65734820 Add Kinetis K66 to Kinetis Kconfig 2017-02-09 08:39:30 -10:00
David Sidrane
bdd99f5aa1 Removed ws at EOL 2017-02-09 08:39:30 -10:00
Marc Rechté
d501ffc563 Kinetis SDHC driver fixes. 2017-02-09 11:28:30 -06:00
Gregory Nutt
1d290c2b37 setvbuf: Add support for disabling I/O buffering. Initially cut; untested. 2017-02-09 09:24:44 -06:00
Gregory Nutt
e6558df4ad SIM: Add readlink and setvbuf to nuttx-names.dat 2017-02-09 08:31:00 -06:00
Alan Carvalho de Assis
afa1066b4d LPC43: Fix missing #endif 2017-02-08 11:52:15 -06:00
Gregory Nutt
e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00
David Sidrane
a4ea49aaa2 Better granualarity and erro checking of the board's MCG settings
Allow for complete MCG_C2 definition from the boart.h file
  Moved #ifdef out of code by setting default values for
  Allow for individule bit setting in MCG_C2 for
    BOARD_EXTCLOCK_MCG_C2
    BOARD_MCG_C2_FCFTRIM
    BOARD_MCG_C2_LOCRE0
  Added range and sanity checking
2017-02-07 12:38:28 -10:00
David Sidrane
ff056cf9bd arch/arm/include/kinetis/kinetis_mcg.h 2017-02-07 12:38:28 -10:00
David Sidrane
87f759172a Support the Indexed name LOCK->LOCK0 2017-02-07 12:38:28 -10:00
David Sidrane
6022c62229 MCG defines are based on the MCG feature configuration
We define the bits as a common set of names. This means that
  an index may be added to a name i.e. LOCK is LOCK0 as that is
  the superset name.
2017-02-07 12:38:28 -10:00
David Sidrane
2216ed52a9 Kinetis chip Adding K66 and inlcuding MCG versioning
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
2017-02-07 12:38:28 -10:00
David Sidrane
ec567371b6 Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
2017-02-07 12:38:28 -10:00
David Sidrane
5bfd2fedc6 Add K66 memory map 2017-02-07 12:38:28 -10:00
David Sidrane
97ae289f99 Add Kinetis K66 to Kinetis Kconfig 2017-02-07 12:38:28 -10:00
David Sidrane
eb955c9f15 Removed ws at EOL 2017-02-07 12:38:28 -10:00
Gregory Nutt
62a1f6f110 up_timer_initialize() is named incorrectly. The prefix should be the architecture name, not up_ since it is private to the architecture. up_timerisr() is similarly misnamed and should also be private since it is used only with the xyz_timerisr.c files. Also updat TODO list. 2017-02-07 10:35:04 -06:00
Gregory Nutt
9395704192 Kinetis, not Kinetics. 2017-02-07 08:20:52 -06:00
Gregory Nutt
54ce3817a5 SDIO interface: Handle all possible DMA combinations in all SDIO drivers. 2017-02-07 07:15:29 -06:00
Marc Rechté
b459fd1529 Updates to Kinetis SDHC driver 2017-02-06 07:43:05 -06:00
Gregory Nutt
b39d962021 Soft links: Update Documentation, rename file, add system calls 2017-02-02 17:11:08 -06:00
Gregory Nutt
1c66c06315 STM32F7 SDMMC: Make sure that all SDMMC configuration variables begin with STM32F7_; Eliminate CONFIG_SDMMC1/2_DMA altogether. Does not appear to be used. 2017-01-31 14:27:50 -06:00
Gregory Nutt
b7d29086e0 STM32F7 SDMMC: Add support for single bit operation on SDMMC2 2017-01-31 12:22:06 -06:00
David Sidrane
9066b4c093 stm32_sdio.c edited online with Bitbucket 2017-01-31 18:01:40 +00:00
Gregory Nutt
3dbdb3bb31 CONFIG_SDIO_DMA: Was been defined in several low-level architecute Kconfig files, but used at the highest levels in the code. Both are bad and both are fixed with this commit 2017-01-31 11:52:00 -06:00
Gregory Nutt
2a4791f4ee Removed dmasupported() method from the SDIO interface. That is now a bit in the cpapability set. 2017-01-31 09:51:15 -06:00
Gregory Nutt
9ac00a355f Add capabilities() method to SDIO interface. Remove CONFIG_SDIO_WIDTH_D1_ONLY. That should not be a global propertie, but rather a capability/limitation of single slot when there may be multiple slots. 2017-01-31 09:16:01 -06:00
Gregory Nutt
db77807ad2 Back out use on inline functions to access 16-bit registers. The inline functions were a work-around for misbehaving compiler years and years ago. The mon standard macro-ized version should work just fine. 2017-01-27 11:53:04 -06:00
Alan Carvalho de Assis
25bf212ab4 LPC43 pinset definitions: Add more 1 bit to pinset to reach SFSCLK0-SFSCLK3 2017-01-26 13:31:29 -06:00
Alan Carvalho de Assis
cf2beeb1cf LPC43: Remove PINCONFIG_DIGITAL 2017-01-26 13:26:55 -06:00
Gregory Nutt
3b9bcd57ba Remove uninterpretable comment. 2017-01-26 07:20:35 -06:00
Gregory Nutt
ff61d8f69d Add missing sched_note_*() calls to sam4cm SMP functions. 2017-01-24 14:33:57 -06:00
Gregory Nutt
f40a0311f5 Merged in david_s5/nuttx/upstream_2_greg_f3_bkp (pull request #200)
Add missing STM32_BKP_BASE
2017-01-23 23:42:33 +00:00