ligd
aac0db368c
ARM: fix CPSR corruption after exception handling
...
It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:
msr spsr, r1
GCC translates this to:
msr spsr_fc, r1
As a result, not all SPSR fields are updated on exception return. This
should be:
msr spsr_fsxc, r1
This bug has been fixed by Heesub Shin in:
343243c7c0
Change-Id: Ibc64db7bceecd0fb6ef39284fb5bc467f5603e2e
2021-07-19 08:41:06 -03:00
Gustavo Henrique Nihei
c05feda208
risc-v/esp32c3: Implement MTDIOC_ERASESTATE for SPI Flash driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Gustavo Henrique Nihei
50ea22314e
arm/lpc43xx: Implement MTDIOC_ERASESTATE for SPIFI Flash driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Gustavo Henrique Nihei
df2e890cfc
xtensa/esp32: Implement MTDIOC_ERASESTATE for SPI Flash driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Xiang Xiao
4444c13c14
arch/sim: The second CPU shouldn't call up_irqinitialize
...
since the signal handler the process concept
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-17 07:48:27 +09:00
Xiang Xiao
98b5724b59
arch: Fix rtcb can't found error
...
use the same condition check in declaration and reference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
2021-07-16 12:48:09 -03:00
Xiang Xiao
3204c75c1d
arch/sim: Remove the unused sim_host_timer_handler
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icacbe74308580b7fc2449cdf9e41f85fce43d5a4
2021-07-16 17:41:00 +09:00
ChenWen
2abb75fee7
risc-v/esp32c3: Fix some ESP32-C3 Wi-Fi driver issues
2021-07-15 23:20:29 -07:00
Roberto Bucher
fc810e3db4
Restored previous files
2021-07-15 23:19:59 -07:00
Xiang Xiao
cee43ce280
arch/sim: Initialize the idle thread stack info correctly
...
and change the default value of IDLETHREAD_STACKSIZE to 65536
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia54efbbca4b69706150bc4178844b316688a104e
2021-07-16 08:37:53 +09:00
David Sidrane
da01a39e39
Revert "Kinetis:Serial No DMA Poll needed"
...
This reverts commit e659ae83b0
.
It turns out the DMA polling is needed. The IDLE INT will
not happen on repetitive signals.
2021-07-15 12:28:04 -07:00
Daniel P. Carvalho
3ca46ea8e2
Change DAC driver to support STM32G4.
2021-07-15 14:33:15 -03:00
Fotis Panagiotopoulos
7f361daf60
lpc17_40: style fix in WDT definitions.
2021-07-13 08:32:42 -07:00
Michal Lenc
3d26c3efb6
fix nxstyle errors and warnings
...
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-07-13 09:55:29 -03:00
Michal Lenc
b2a9f853e8
arch/arm/src/imxrt: added support for Tickless OS
...
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-07-13 09:55:29 -03:00
Virus.V
063e1d6b74
risc-v/bl602: update wifi firmware and some fixup.
...
1. Added check for repeated connection wifi operations.
2. Invoke the carrier on/off operation in the wrong place.
3. The RTC initialization time is incorrect.
4. Reserve 32K I-Cache space in the linker script.
5. Increase the size of the wifi firmware receiving buffer.
Signed-off-by: Virus.V <virusv@live.com>
2021-07-13 05:12:12 -07:00
Sara Souza
48f2b10ee3
risc-v/esp32-c3: Use systimer 0 to RTOS TICK
2021-07-12 21:03:27 -07:00
Sara Souza
c7bf5c7a1d
xtensa/esp32: Make UART TX DMA depends on EXPERIMENTAL and adds caveats regarding its use
2021-07-12 21:03:06 -07:00
Sara Souza
2abeba041d
xtensa/esp32: Fixes termios issue.
2021-07-12 21:02:26 -07:00
Dong Heng
f5eaf82c93
risc-v/esp32c3: Use onexit to free thread private semaphore
2021-07-12 09:38:21 -03:00
Jiuzhu Dong
9b1f554429
sched: Dynamically extend the pid hash table
...
Change-Id: I3a719bc575cd408cd530a39efa203f507b44fa9c
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-07-11 19:42:30 -07:00
Xiang Xiao
5fe51b923a
mm: Simplify the semaphore handling
...
1.Move all special process to mm_takesemaphore
2.Remove the support of recurive lock
3.Remove mm_trysemaphore function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ie216a6294ab67c5d427f31b089beb15c532f08fe
2021-07-10 16:10:32 -03:00
ligd
f5279f8583
sim: fix loop add delaylist when mm_free in IDLE thread
...
Change-Id: I1827c663275f47c9dc30d63e17e3d016b0000166
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-10 16:10:32 -03:00
Fotis Panagiotopoulos
61cb524fa2
lpc17_40: Fixed progmem driver.
2021-07-09 21:49:16 -07:00
Jerry_tang
1e3a985155
AmebaZ2: Add soc src code
...
Add soc src code for rtl8720c
Signed-off-by: Jerry_tang <jerry_tang@realsil.com.cn>
2021-07-09 14:29:06 -03:00
guowei15
95b5dc523e
arm/setjmp.h:add c++ support
...
N/A
Change-Id: I619cc15570adeff10f3a9b69bf9a3cff83e625c1
Signed-off-by: guowei15 <guowei15@xiaomi.com>
2021-07-09 14:06:10 -03:00
David Sidrane
282ab797bf
stm32h7:Ethernet Add some delays so that ifup() does not hog the CPU.
2021-07-08 21:14:29 -05:00
David Sidrane
70c9cd1508
stm32h7:ethernet add timeout on MAC reset
2021-07-08 21:14:29 -05:00
David Sidrane
bf4e97177a
stm32h7:Ethernet fix formating
2021-07-08 21:14:29 -05:00
Xiang Xiao
e97ffb1f79
arch/armv7-a: Remove the special SMP SGI process
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Iaf7fe77a3ab7cbf145d907dafb0b7ca54cc4a012
2021-07-09 07:53:05 +09:00
Daniel P. Carvalho
2692b61a72
Fix newline at end of file.
2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
ea701a84f2
Fix comments.
2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
2a21c45e0a
Add STM32G43XX Analog Comparator driver.
2021-07-07 21:34:58 -03:00
Xiang Xiao
76cdd5c329
mm: Remove mm_heap_impl_s struct
...
it's more simple to make mm_heap_s opaque outside of mm
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
2021-07-07 04:25:15 -07:00
cgeng
d656417917
Fix compilation error when CONFIG_DEBUG_PWM_INFO on stm32h7
2021-07-07 03:46:31 -05:00
Alexander Lunev
8fd64854f5
stm32,stm32f7,stm32h7: supported ETH MAC promiscuous mode
2021-07-06 19:11:56 -03:00
Fotis Panagiotopoulos
9976635390
lpc17_40: fixed compiler warnings.
2021-07-06 06:17:59 -05:00
Sara Souza
a5bf47b93e
xtensa/esp32: Fixes issue with UART 2
2021-07-05 23:20:26 -05:00
Sara Souza
d67852da4b
xtensa/esp32: Change default pins of UART2
2021-07-05 23:20:26 -05:00
Dong Heng
475becac37
risc-v/esp32c3: Add board_ioctl and board_uniqueid
2021-07-05 23:12:17 -05:00
Fotis Panagiotopoulos
2f0b4eb363
lpc17xx: Added WDT driver.
2021-07-05 11:25:51 -05:00
Xiang Xiao
75bfa4584c
mm: Add kmm_malloc_size and mm_malloc_size
...
make malloc_size implementation align with malloc
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8d7781925f06e58a880437a16569dccbfd2ea035
2021-07-05 14:23:24 +09:00
Xiang Xiao
ddaa3e42b9
mm: Move the real implementation of mm_sbrk to sbrk
...
and remove mm_sbrk and kmm_sbrk since it's wrong to expose
sbrk to other heaps except the default userspace heap.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-05 08:02:08 +09:00
Xiang Xiao
b3f568c216
boards/sim: Add asan config to test the custom heap
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
4589c369be
arch/sim: Implement mm_mallinfo for the custom heap
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
8ebf9c92cf
arch/sim: Implement malloc_size for the custom heap
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
f240b2e631
arch/sim: Remove host_malloc and host_calloc
...
use host_realloc instead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
97216c220b
mm: Support malloc_size function
...
and rename malloc_usable_size to malloc_size
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
0941bad877
note: Move up_schednote.c to drivers/note folder
...
since it is general enough to work on other target
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:52:32 -03:00
Nathan Hartman
ce20211357
Fix various typos in comments and documentation
...
Fix typos in these files:
* Documentation/components/drivers/character/foc.rst
* Documentation/guides/cpp_cmake.rst
* Kconfig
* arch/arm/src/imxrt/imxrt_lpspi.c
* arch/arm/src/kinetis/kinetis_spi.c
* arch/arm/src/kl/kl_spi.c
* arch/arm/src/lpc31xx/lpc31_spi.c
* arch/arm/src/nrf52/nrf52_radio.h
* arch/arm/src/s32k1xx/s32k1xx_lpspi.c
* arch/arm/src/stm32/Kconfig
* arch/arm/src/stm32/stm32_adc.c
* arch/arm/src/stm32/stm32_foc.c
* arch/arm/src/stm32/stm32_foc.h
* arch/arm/src/stm32/stm32_pwm.c
* arch/arm/src/stm32/stm32_spi.c
* arch/arm/src/stm32f0l0g0/stm32_spi.c
* arch/arm/src/stm32f7/Kconfig
* arch/arm/src/stm32f7/stm32_spi.c
* arch/arm/src/stm32h7/Kconfig
* arch/arm/src/stm32h7/stm32_allocateheap.c
* arch/arm/src/stm32h7/stm32_fmc.c
* arch/arm/src/stm32h7/stm32_fmc.h
* arch/arm/src/stm32h7/stm32_pwm.c
* arch/arm/src/stm32h7/stm32_qspi.c
* arch/arm/src/stm32h7/stm32_spi.c
* arch/arm/src/stm32l4/stm32l4_pwm.c
* arch/arm/src/stm32l4/stm32l4_spi.c
* arch/arm/src/stm32l5/Kconfig
* arch/arm/src/stm32l5/stm32l5_spi.c
* arch/renesas/src/rx65n/rx65n_dtc.c
* arch/renesas/src/rx65n/rx65n_usbdev.c
* arch/risc-v/src/rv32m1/rv32m1_serial.c
* boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
* boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
* boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
* boards/arm/stm32h7/nucleo-h743zi2/README.txt
* boards/risc-v/rv32m1/rv32m1-vega/README.txt
* boards/sim/sim/sim/scripts/Make.defs
* drivers/1wire/1wire.c
* drivers/1wire/1wire_internal.h
* drivers/lcd/Kconfig
* drivers/syslog/ramlog.c
* fs/fat/Kconfig
* libs/libc/debug/Kconfig
* libs/libc/machine/Kconfig
* libs/libc/stdio/lib_libvsprintf.c
* libs/libc/stdlib/lib_div.c
* libs/libc/stdlib/lib_ldiv.c
* libs/libc/stdlib/lib_lldiv.c
* libs/libdsp/lib_observer.c
2021-07-04 11:23:26 -05:00
SPRESENSE
b3389cf751
arch: cxd56x: Add support for power management debug output
...
Add support for power management debug output.
2021-07-04 00:36:07 -05:00
SPRESENSE
7af6b394de
arch: cxd56x: Add Kconfig for power management debug output
...
Add configurations for power management debug output to Kconfig.
2021-07-04 00:36:07 -05:00
SPRESENSE
4738f69569
arch: cxd56x: pmic: Fix a compile error
...
Replace undefined logerr to _err function.
2021-07-04 00:36:07 -05:00
SPRESENSE
5c26d68f31
arch: cxd56x: Add a configuration for PMIC interrupts
...
Add a configuration for PMIC interrupts to Kconfig.
2021-07-04 00:36:07 -05:00
SPRESENSE
618661df93
arch: cxd56xx: Fix compile error when CONFIG_LIBM is disabled
...
It is no longer necessary to define CONFIG_ARCH_MATH_H when we would
like to link libm.a other than nuttx math library. So, this commit
removes the error condition.
2021-07-04 00:36:07 -05:00
SPRESENSE
d29db87bdc
arch: cxd56xx: Add eMMC configuration for vendor-specific commands
...
The eMMC driver for cxd56xx has been implemented a vendor-specific command
for Toshiba eMMC device, and so add a new configuration to enable the code.
2021-07-04 00:36:07 -05:00
SPRESENSE
cd06fc9761
arch: cxd56x: sdhci: Minor fix configuration name
...
Modify the referenced CONFIG to CONFIG_DEBUG_MEMCARD_INFO.
2021-07-04 00:36:07 -05:00
SPRESENSE
6a2733dd05
arch: cxd56x: emmc: Minor fix undefined configuration name
...
Replace obsolete CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_FS_INFO.
2021-07-04 00:36:07 -05:00
SPRESENSE
fa12fe9df1
arch: cxd56x: scu: Fix some printf format warnings
...
Fix some printf format warnings by -Wformat.
2021-07-04 00:36:07 -05:00
SPRESENSE
845da344fd
arch: cxd56xx: Fix compile warning
...
Fix warning by -Wimplicit-function-declaration
2021-07-04 00:36:07 -05:00
SPRESENSE
75b6a260e0
arch: cxd56xx: Rename to nxsem_set_protocol
...
nxsem_setprotocol function name was changed to nxsem_set_protocol.
Replace and fix hostif compile error.
2021-07-04 00:36:07 -05:00
SPRESENSE
4364a291f0
arch: cxd56xx: Use arm_arch.h instead of up_arch.h
...
Use arm_arch.h instead of up_arch.h and fix hostif compile error.
2021-07-04 00:36:07 -05:00
SPRESENSE
cb6ad9dfbd
arch: cxd56xx: Fix getting stuck by nested spinlock in serial
...
Fix an issue the serial console gets stuck in SMP caused by nested
spin_lock_irqsave.
2021-07-04 00:36:07 -05:00
Xiang Xiao
a18b807fa9
arch/sim: Fix bt and audio simulation stop work in SMP mode
...
by removing the SMP up_idle and sim_timer_handler
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 10:16:12 +09:00
Xiang Xiao
b1f711f790
mm: Move procfs_register_meminfo into common place
...
to avoid the code duplication and ensure the consistent behaviour
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-03 09:39:32 -07:00
Masanari Iida
707404d415
rx65n: Add missing parameters in printf
...
Printf format string requires 2 parameters, but 0
parameter was given. Add these missing parameters.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2021-07-03 09:25:57 -05:00
Dong Heng
4f2df0311d
risc-v/esp32c3: Fix some BLE driver issues
...
1. remove SMP functions because ESP32-C3 is singal core
2. disable phy_printf in ble adapter when enable Wi-Fi
3. fix BLE character device macro
2021-07-03 07:28:30 -05:00
Masayuki Ishikawa
6370c820ea
arch: rp2040: Introduce setintstack macro for SMP
...
Summary:
- This commit introduces setintstack macro to rp2040
which is used for SMP with interrupt stack
Impact:
- SMP with interrupt stack
Testing:
- Tested with raspberrypi-pico:smp
- NOTE: seed to set CONFIG_ARCH_INTERRUPTSTACK=2048
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-07-03 04:13:13 -05:00
Masayuki Ishikawa
9f206f2bb6
arch: armv6-m: Introduce setintstack macro
...
Summary:
- This commit introduces setintstack macro which can be
overridden for SMP with interrupt stack
Impact:
- SMP only
Testing:
- Tested with raspberrypi-pico:smp
- NOTE: more commits will be added later
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-07-03 04:13:13 -05:00
Virus.V
5f67d65e9e
risc-v/bl602: add efuse driver
...
Signed-off-by: Virus.V <virusv@live.com>
2021-07-02 13:17:39 -05:00
ligd
f479ca9096
sim/smp: fix smp can't start, caused by signal too busy
...
Change-Id: Ia9cad04759a869f9bed871fa0acd002115eefb0a
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 23:19:15 +09:00
ligd
2ab1dcf763
sim: add setitimer to nuttx-names.in
...
Change-Id: Id6d91d81b3d67cbe9215eb94f4ef394d61156fe8
2021-07-02 05:02:36 -05:00
ligd
a7a8c20083
sim: fix host_sleep unit error
...
Change-Id: Iaddd6381eb9870b709147d33b36482ae2e37c04d
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
36c1bba88c
sim/up_oneshot.c: take host time as current
...
Change-Id: I34625f3d3f9557a103017124388dba6104aba7cc
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
92cd7628e0
sim: remove CONFIG_SIM_WALLTIME fast timing maybe harmful for IOs
...
Change-Id: Ic4ff5ec0aa99d2d229a07c4d1a9a4dae738d3cd9
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
aa43a0215d
mm: fix memory corruption when loop create/exit thread in SMP mode
...
Root casue:
when do thread exit, need add free stack operation to mm_delaylist,
but in SMP mode, CPU0 thread1 exit, at this time, CPU1 call malloc
and free mm_delaylist.
Fix:
Divide mm_delaylist for per CPU in SMP mode.
Change-Id: Ibf7d04614ea2f99fb5b506356b7346a0d94f0590
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 04:55:46 -05:00
ligd
50eee2f081
arm: fix enable interrupt too earlier caused system crash
...
reason:
msr cpsr, r2 /* Set the CPSR */
// interrupt hanppend, context switch
pop {r0-r2, pc}
resolve:
use SPSR instead, and recover with ldmia ^
Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3
Signed-off-by: ligd <liguiding1@xiaomi.com>
(cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d)
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-01 22:20:36 -05:00
Fotis Panagiotopoulos
de213401a7
lpc17_40_progmem: fixed compilation issues.
2021-07-01 09:11:12 -05:00
Masanari Iida
839414987c
efm32: Fix missing closing bracket
...
This patch fixes missing closing bracket and semicolon.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2021-07-01 06:37:17 -07:00
Sara Souza
b45ccad6a0
xtensa/esp32: Adds support for SERIAL_TXDMA.
2021-07-01 01:50:13 -05:00
David Sidrane
e659ae83b0
Kinetis:Serial No DMA Poll needed
2021-07-01 01:44:46 -05:00
David Sidrane
78584b4569
kinetis:Serial use eDMA
...
kinetis:serial mark priv->rxdma after use
2021-07-01 01:44:46 -05:00
David Sidrane
e5a1b2e797
kinetis:SPI use eDMA
...
Kinetis:SPI only allocate DMA once
2021-07-01 01:44:46 -05:00
David Sidrane
78bf264af0
kinetis:Replace DMA
...
Kinetis:DMAMUX use hex in mask
2021-07-01 01:44:46 -05:00
David Sidrane
3439c40044
stm32h7:SDMMC fix reset of do_gpio
...
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.
Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
6d6ca8f0b6
stm32:sdio: fix wrong ifdefs
...
This was wrong but presumably did not matter.
2021-07-01 01:37:58 -05:00
Julian Oes
2a86335055
stm32:sdio: fix reset of GPIO_SDIO_D0
...
For the case when the watchdog is triggering a timeout we did not
correctly reset the GPIO_SDIO_D0.
Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
665f847760
stm32f7: fix reset of d0_gpio
...
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.
Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
154795a247
stm32f7: Removed bit that is reserved for f7
2021-07-01 01:37:58 -05:00
Julian Oes
87fd8903a0
stm32f7: whitespace fix
2021-07-01 01:37:58 -05:00
Julian Oes
804445fc15
stm32f7: unify identical sdmmc.h header files
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It turns out there is no difference in these two files as well as the
reference manual for the registers between the two parts, so it probably
makes sense to unify them
2021-07-01 01:37:58 -05:00
chenwen
31a6da2343
risc-v/esp32c3: Notifies networking layer whether the carrier is available
2021-06-30 23:09:34 -05:00
McKay Ransom
863834057b
Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl
2021-06-30 23:01:57 -05:00
Sara Souza
87fabb2bc7
xtensa/esp32: Support to select different clock source for RTC controller and close TODOs.
2021-06-30 21:27:27 -05:00
Virus.V
84100128b2
risc-v/bl602: update wifi firmware version
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-30 01:08:10 -05:00
xiewenxiang
5fd3eca9c9
riscv/esp32c3: Support BLE sleep mode
2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587
riscv/esp32c3: Add Wi-Fi and BLE coexist
2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5
riscv/esp32c3: Add esp32c3 BLE driver
2021-06-28 23:14:30 -05:00
Michal Lenc
b36171026e
arch/arm/src/imxrt/imxrt_flexpwm.c: fix mistake in submodules address offset
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Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-28 09:03:06 -05:00
Virus.V
8452c571ec
risc-v/bl602: BLE firmware adapts to the new framework
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583
risc-v/bl602: Support AP and STA as independent network interface device
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Michal Lenc
addfe182ae
arch/arm/src/imxrt: added support for FlexPWM driver
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Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-26 09:58:52 -05:00
Abdelatif Guettouche
553f070357
arch/xtensa/esp32: Remove up_textheap_init function since it's not
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needed anymore.
Decouple the IRAM heap from the text allocator since that heap can
still be used as a generic pool of memory.
Implement the up_extraheaps_init function to initialize all of the
additional heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
add18b9592
arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not
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needed anymore.
Implement the up_extraheaps_init function to initialize all separate
heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
fc9c320bd8
arch/arm/cxd56xx: Remove the up_textheap_init function since it's not
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needed anymore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
0a4982a80e
Introduce ARCH_HAVE_EXTRA_HEAPS, this config is going to be used for
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chips that have multiple separate heaps.
For now it's used to enable APIs to initialize the different heaps
during the start sequence but can be extended for other purposes that
manage those heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Gustavo Henrique Nihei
db18a12844
xtensa/esp32: Move RTC WDT deinit after initial setup
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Gustavo Henrique Nihei
8c70e4f1c1
xtensa/esp32: Fix RTC watchdog timer deinit at startup
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Write protection must be disabled before performing changes to the WDT
registers. Furthermore, the routine was resetting the wrong field from
the RTC WDT register.
The RTC_CNTL_WDT_FLASHBOOT_MOD_EN field relates to Flash Boot Protection
and it is enabled by the 1st stage bootloader. The 2nd stage bootloader
takes care of disabling it.
Then the 2nd stage bootloader enables the RTC WDT for checking the
startup sequence of the application image.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Xiang Xiao
ae9b5fd306
Replace mktime with timegm in rtc and fs driver
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since kernel component should use UTC instead local time
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icf939e1ab0af8e577105f539d2553bc67b3b3d10
2021-06-23 13:43:32 -03:00
Abdelatif Guettouche
60da4317b9
arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
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consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
bdbc9ef04f
arch/risc-v/esp32c3_rtc_heap.c: Correct the name of the procfs info
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variable.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
55a210d305
arch/xtensa/esp32_textheap.c: When allocating text prioritize alloacting
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from the RTC heap. If that's not available fall back to the IRAM heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1e49f2929f
arch/xtensa/src/esp32: Extract the IRAM region as a separate heap.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94
arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.
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This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904
arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a
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buffer comes from the RTC Slow memory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84
xtensa/esp32_aes.c: Use the same output when testing the AES driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0
arch: esp32: Replace getcoreid with the latest esp-idf's
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Summary:
- I noticed that the getcoreid macro in the latest esp-idf
is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-21 06:21:39 -05:00
Alexander Lunev
f7c8875fd7
sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53);
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corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
2021-06-21 02:47:46 -05:00
Liu Han
2dd081ed7d
risc-v/esp32c3: Support ESP32-C3 SHA accelerator
2021-06-21 02:41:53 -05:00
chenwen
8648970994
esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten
2021-06-19 08:00:35 -03:00
chenwen
ee3350ed1d
risc-v/esp32c3: Disable Wi-Fi reconnect by default
2021-06-19 08:00:35 -03:00
chenwen
c3792f0aae
xtensa/esp32: Support ESP32 RTC driver
2021-06-18 22:01:34 -05:00
Xiang Xiao
ab974edc84
sched: Identify the stack need to free by TCB_FLAG_FREE_STACK
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instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f
Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Abdelatif Guettouche
79e9347551
arch/risc-v/esp32c3/esp32c3_modtext.c: Prioritise allocation from the
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RTC heap when available.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
f54804bafc
arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
7198b3ef4b
risc-v/esp32c3/esp32c3_soc.h: Add a function to check if a pointer is
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within the RTC RAM range.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Daniel P. Carvalho
91e82d1597
Changed the STM32 Analog Comparator driver.
2021-06-18 00:50:24 -05:00
Sara Souza
00edeee1ff
xtensa/esp32: Adds I2C Bit banging reset
2021-06-18 00:48:27 -05:00
Masayuki Ishikawa
83ac6cd399
arch: xtensa: Remove ISYNC from xtensa_compareset()
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Summary:
- According to the Xtensa ISA document, this ISYNC instruction
between WSR SCOMPARE1 and S32C1I is unnecessary
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Masayuki Ishikawa
2d016f8d21
arch: xtensa: Fix the PS register handling
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Summary:
- I noticed that DEBUGASSERT sometimes happens in nxsem_wait()
when testing Wi-Fi with esp32-devkitc:wsifi_smp
- The call stack was not from an interrupt handler and actually
g_current_regs[] were correct, even though asserted with
(up_interrupt_handler() == false)
- Finally, I found that we need to call rsync after we set
a new value to the PS register which is described in the
Xtensa document.
- This commit fixes this issue
Impact:
- All xtensa architectures
Testing:
- Tested with esp32-devkitc:wifi_smp and esp32-devkitc:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Sara Souza
8f59054ef2
risc-v/esp32c3: Adds I2C RESET support via hardware.
2021-06-16 21:22:26 -05:00
Michal Lenc
6dc3c3d1b2
arch/arm/src/imxrt: fix nxstyle warnings and errors
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Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-16 21:22:03 -05:00
Michal Lenc
7bcd50955f
arch/arm/src/imxrt: add missing clock to imxrt_xbar.c and fix usage of imxrt_enc.c while debug option is enable
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Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-16 21:22:03 -05:00
Janne Rosberg
673f9519eb
risc-v/mpfs: add dma support
2021-06-16 12:22:54 -05:00
Eero Nurkkala
502210e98c
riscv/mpfs: add i2c reset handler
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Add reset functionality into the mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-16 12:31:36 -03:00
Liu Han
04c805207a
risc-v/esp32c3: Support ESP32-C3 efuse
2021-06-16 09:35:09 -03:00
retogaeh
f109a96ad2
Update arch/arm/src/stm32h7/stm32_adc.c
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Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
2021-06-16 04:58:06 -07:00
GAEHWILER Reto
b9fba3edae
stm32h7 fix adc port to handle overrun and the DR's fifo, adapt adc driver
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* port didn't know about data-register fifo
* port didn't handle overrun condition
* driver could get stuck if interrupts were skipped due to saturation
2021-06-16 04:58:06 -07:00
Virus.V
69fce77718
risc-v/bl602: update firmware to fix undefined up_irq_* symbols when linking
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-15 23:25:16 -05:00
Dong Heng
60fb1adaca
riscv: Add inline IRQ process functions
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Remove functions from RISC-V chips.
2021-06-15 23:25:16 -05:00
Xiang Xiao
2e49e1bc5c
mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE
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since the old design reuse BIOC_FLUSH for
MTD device which make some confusion
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-15 13:26:45 -03:00
Sara Souza
2a7b97c0cd
risc-v/esp32-c3: Adds I2C polled support
2021-06-15 10:51:18 -05:00
Daniel P. Carvalho
4b351fc447
Adds PWM example to nucleo-g431kb board.
2021-06-14 18:45:04 -03:00
Liu Han
8eaaf6d462
risc-v/esp32c3: Support ESP32-C3 RSA accelerator
2021-06-14 15:03:11 -03:00
Yuichi Nakamura
9b8e81ebc1
arm/rp2040: Fix warnings when UART console is not used
2021-06-14 09:05:19 -03:00
Yuichi Nakamura
b860e3c4ad
arm/rp2040:USB device controller support
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Summary:
- Add Raspberry Pi Pico (RP2040) USB device controller support.
- Confirmed that CDC/ACM, MSC and these composite device are working.
- The current implementation have an unresolved issue and some workaround
for USB MSC SCSI driver is required.
See the comment in the patch "usbmsc: Add USBMSC_NOT_STALL_BULKEP for RP2040 workaround".
Impact:
- RP2040 only
Testing:
- Tested with Windows 10 and Ubuntu-18.04/20.04 as the USB host.
- Tested configurations:
- raspberrypi-pico:usbnsh
- raspberrypi-pico:usbmsc
- raspberrypi-pico:composite
2021-06-14 09:05:19 -03:00
Sara Souza
7300bc8f1c
xtensa/esp32: Adds I2C polled support.
2021-06-13 05:04:51 -05:00
Masayuki Ishikawa
bafac8b560
arch: k210: Fix stack coloring for the idle thread stack
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Summary:
- I noticed that stack coloring for the idle thread stacks does
not work due to the recent changes
- This commit fixes this issue
Impact:
- k210 only
Testing:
- Tested with both maix-bit (dev board) and QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-12 05:54:08 -05:00
Eero Nurkkala
1bce864ef7
mpfs: add i2c driver
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This adds mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00