Commit Graph

7 Commits

Author SHA1 Message Date
Abdelatif Guettouche
0f2b774dec arch/risc-v: Remove unused and undefined file section "Public Variables"
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 18:40:10 -08:00
Xiang Xiao
fe8122ee2b arch/risc-v: Remove duplicated declaration for up_irq_save and up_irq_restore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-19 08:29:42 +09:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
Gregory Nutt
9222f50e1c arch/: Make sure the up_irq_enable() is available on all architectures. I will not be able to test all of these new versions of this function so this may break things for awhile. 2018-06-06 09:25:40 -06:00
Gregory Nutt
f88a4c6ea8 arch/risc-v/src: Make code follow pattern of other architectures better. Fix some coding standard issues. 2018-06-06 07:46:50 -06:00
Ken Pettit
201a32cf8c Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it. 2016-10-16 09:47:07 -06:00