Xiang Xiao
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cde88cabcc
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Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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2020-02-23 22:27:46 +01:00 |
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Xiang Xiao
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bd4e8e19d3
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Run codespell -w against all files
and fix the wrong correction
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2020-02-22 14:45:07 -06:00 |
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Xiang Xiao
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80277d1630
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Refine the preprocessor conditional guard style (#190)
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2020-01-31 19:07:39 +01:00 |
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Gregory Nutt
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6599feb310
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Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem
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2016-12-16 17:56:22 -06:00 |
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Gregory Nutt
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cdd8dc72a5
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Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
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2016-12-16 15:36:52 -06:00 |
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Gregory Nutt
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d4ad5f04d3
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Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come.
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2016-12-16 14:13:09 -06:00 |
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Gregory Nutt
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0a96f3a8c8
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ESP32: Fix some compilation issues
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2016-10-26 12:50:10 -06:00 |
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Gregory Nutt
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650757bbf0
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ESP32: Add GPIO support
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2016-10-26 12:11:24 -06:00 |
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Gregory Nutt
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b8462d3e04
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ESP32: Need to take priority into account when allocating CPU interrupts
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2016-10-25 16:27:58 -06:00 |
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Gregory Nutt
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fef7b414c5
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Add logic to attach peripheral interrupt sources to CPU interrupts
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2016-10-25 15:19:29 -06:00 |
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Gregory Nutt
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6756b44dc3
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ESP32: Add framework to assign a a peripheral to a CPU interrupt
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2016-10-25 13:16:05 -06:00 |
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Gregory Nutt
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2a59205ffa
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ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding.
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2016-10-25 12:02:53 -06:00 |
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