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9100 Commits

Author SHA1 Message Date
ziggurat29
2fe0565437 added support for HSE and MSI clocks, and auto trim of MSI to LSE (needed for USB). 2016-04-29 22:13:32 -05:00
ziggurat29
31870b22f5 booboo in config sanity check; wasn't preventing insanity 2016-04-29 07:29:17 -05:00
ziggurat29
31e7f6fd00 add configuration options to allow SRAM2 to be used for heap, or not at all, and to zero-init it on OS start, or not at all. 2016-04-26 10:12:13 -05:00
ziggurat29
1218ee5f51 bug in binding peripheral to dma channel; inverted sense of a bitmask 2016-04-25 10:27:02 -05:00
ziggurat29
8d4dccb3b9 add DMA support to QSPI; tested. Updated Kconfig to more cleanly present the options and defaults. 2016-04-24 16:28:30 -05:00
ziggurat29
0f8dc3e7b4 fixed missing DMA peripheral selection and some header defines, updated various comments to be accurate 2016-04-24 16:23:47 -05:00
Gregory Nutt
aed10e0e49 Cosmetic changes from last PR 2016-04-23 12:51:46 -06:00
Gregory Nutt
0d3a0bf603 Merged in ziggurat29/nuttx/stm32l4_qspi_004 (pull request #5) 
add QSPI memory mapped mode support.  tested.  QSPI may enter and exit memory mapped mode; while in effect, other operations (e.g. command, memory) will fail with -EBUSY.
 2016-04-23 12:46:19 -06:00
ziggurat29
8c0c70ab12 add QSPI memory mapped mode support. tested. QSPI may enter and exit memory mapped mode; while in effect, other operations (e.g. command, memory) will fail with -EBUSY. 2016-04-23 11:54:03 -05:00
Marco Krahl
8b36a83df1 stm32: fix wrong FSCM pin mapping for stm32f42x 2016-04-22 07:27:00 -06:00
Gregory Nutt
2cb52786b6 STM32F7: Add dummy stm32_spi.h header file to workaround some compilation issues. Suggest by Martin Davey. 2016-04-20 06:49:21 -06:00
Gregory Nutt
4e04b3e931 Correct configuration of GPIO pin interrupts on Kinetis K60. Fromo mrechte. 2016-04-20 06:41:51 -06:00
Gregory Nutt
b8ee28cb57 lpc4357fet256_pinconfig.h has wrong ethernet pins configuration (slow slew rate, somewhere inbuffer should be used). From Vytautas Lukenskas 2016-04-20 06:37:26 -06:00
Frank Benkert
885cd812e6 SAME70: USBHS device workaround for errata; EP7 does not support DMA on some parts 2016-04-20 06:22:04 -06:00
Gregory Nutt
8bcb5f0251 Cosmetic changes from review of last PR 2016-04-19 07:11:18 -06:00
ziggurat29
ca6cb85456 QSPI interrupt driven mode is now implemented 2016-04-19 06:55:12 -05:00
Gregory Nutt
26ba3a2b96 Cosmetic changes from review of last PR 2016-04-18 06:50:45 -06:00
Gregory Nutt
c5cce5603e Merged in ziggurat29/nuttx/stm32l4_qspi_002 (pull request #2) 
basic support for QSPI in STM32L4; verified via 'examples/media'
 2016-04-18 06:30:28 -06:00
ziggurat29
499fea73ec basic support for QSPI in STM32L4; verified via 'examples/media' 2016-04-17 21:08:25 -05:00
Gregory Nutt
aa64214877 FB: Add a display number to the framebuffer planeinfo structure 2016-04-17 10:08:27 -06:00
Gregory Nutt
46846c0c24 Framebuffer driver: Add a display number to each interface in order to support multiple displays 2016-04-14 12:23:15 -06:00
Sebastien Lorquet
bef518095f Fix the STM32L4 SPI driver. That SPI driver is quite different. They now handle frames of arbitrary size between 4 and 16 bits. It was broken before a new bit has to be set (rx fifo threshold) to handle <= 8-bit transactions. If not set, the default is 16-bit packed >=8-bit frames and the RXNE bit is never set (it is set when 16-bits are received). weird things as always. 
This also add 8-bit access routines to the data register, because a 16-bit access to the data register when the frame size is below 9 bits is interpreted as a packed dual frame exchange.
 2016-04-13 17:21:49 -06:00
Gregory Nutt
99d981c3fc Kinetis SDHC: May work queue dependencies clearer 2016-04-12 09:07:25 -06:00
Stefan Kolb
fec1931def SAMv7 Kconfig: Correct range of SAMV7_PROGMEM_NSECTORS 2016-04-11 06:21:04 -06:00
Gregory Nutt
b3a177618f Oops: Forgot to add file in previous commit 2016-04-10 09:11:50 -06:00
Sergei Ustinov
8a5bf3c230 STM32 DAC output buffers correct enable. 2016-04-10 08:51:59 -06:00
Gregory Nutt
48106e605a Merge in arch/ submodule 2016-04-10 07:49:41 -06:00
Sebastien Lorquet
8f15af280a Sort DMA by function; Fix one misnamed definition. 2016-04-04 09:49:44 -06:00
Gregory Nutt
b4fc040783 RTC: Fix some compile issues when RTC_ALARM is disabled 2016-04-04 09:24:06 -06:00
Gregory Nutt
8a076d4c09 Eliminate a warning 2016-04-04 08:30:03 -06:00
Gregory Nutt
1e4674e535 STM32 RTC alarm: Use modifyreg32 for consistency 2016-04-04 08:28:01 -06:00
Gregory Nutt
1ea7b48677 RTC lower half was missing call to F4 alarm cancel function 2016-04-04 08:23:09 -06:00
Gregory Nutt
531b9f6626 STM32 RTC alarm: remove some if 0ed out logic. 2016-04-04 08:16:53 -06:00
Gregory Nutt
19aa5880e7 STM32 RTC Alarm: Add Neil's alarm cancellation logic 2016-04-04 08:15:48 -06:00
Gregory Nutt
65dc922a2e STM32 RTC: Fix compile errors for STM32 F1 2016-04-03 13:26:29 -06:00
Gregory Nutt
a573617f33 Costmetic renaming 2016-04-03 12:38:02 -06:00
Gregory Nutt
9f0df8180a STM32 RTC: Fix some errors when RTC debug is enabled 2016-04-03 09:52:08 -06:00
Gregory Nutt
6b3b12ee0a STM32 RTC: Move the logic to set a relative alarm from the low level RTC driver up higher into the RTC device driver lower half. 2016-04-03 09:22:02 -06:00
Gregory Nutt
e904d98915 STM32 RTC: Add implementation of logic to set the alarm relative to the current time 2016-04-02 18:17:46 -06:00
Gregory Nutt
a609880839 STM32 F4 RTC: Add support for setting alarm via driver 2016-04-02 17:38:19 -06:00
Gregory Nutt
d46156c2ba Merge branch 'master' of https://bitbucket.org/nuttx/arch 2016-04-02 14:48:59 -06:00
Gregory Nutt
0fccd81eff cosmetic update 2016-04-02 14:58:01 -06:00
Gregory Nutt
29f1c90b82 Eliminate a warning 2016-04-02 14:48:51 -06:00
Gregory Nutt
9bc38d19d9 RTC: Further simplications of the RTC driver interface; Add sample implementation of alarms for F1 2016-04-02 13:54:18 -06:00
Gregory Nutt
5fdefa1aad Minor cleanup of STM32 alarm stuff 2016-04-02 13:11:57 -06:00
Gregory Nutt
476301e5a4 STM32: Adapt the lower half RTC driver to the new, simplified interface 2016-04-02 12:58:47 -06:00
Neil Hancock
5ac54013d2 STM32 F4: Add a custom RTC driver 2016-04-02 10:46:10 -06:00
Aleksandr Vyhovanec
472115eda9 ARMv7-M: Add support for the IAR compiler 2016-04-02 08:14:09 -06:00
Gregory Nutt
bd2da2f543 ARMv7-M: Add toolchain option to select the IAR tools. Move ARMv7-M assembly language into a gnu/ subdirectory. Makefile selects iar/ or gnu/ directory based upon tool configuration 2016-04-02 07:53:52 -06:00
Aleksandr Vyhovanec
29ab0fb991 STM32: Add support for the IAR compiler 2016-04-02 06:58:55 -06:00
Frank Benkert
2234d7d8e5 SAMV7: USBHS: make the last patch also working for non-control-endpoints 2016-04-02 06:12:27 -06:00
Gregory Nutt
02978c797a i.MX6: Straighten up some glock gating 2016-04-01 14:52:17 -06:00
Gregory Nutt
84b399136e GIC: Level or edge sensitive interrupt? 2016-04-01 13:26:57 -06:00
Gregory Nutt
f698f3dcbe ARMv7-A GIC: Fix another initialization errors 2016-04-01 08:53:43 -06:00
Gregory Nutt
ddc1b88027 ARMv7-A GIC: Fix some initialization errors 2016-04-01 08:40:51 -06:00
Gregory Nutt
855c9a5225 ARMv7-A GIC: Move debug logic to a separate file; fix some errors in debug logic. 2016-04-01 06:58:49 -06:00
Gregory Nutt
37cacc6178 ARMv7 GIC: Fix some formatting errors in GIC debug output 2016-03-31 18:26:15 -06:00
Gregory Nutt
70683d08bc i.MX6: Add GIC debug output 2016-03-31 17:25:04 -06:00
Frank Benkert
d1065e876f SAMV7: USBHS: Reset the TXIN bit not before new data was written or all requests are completed. 2016-03-31 14:20:36 -06:00
Sebastien Lorquet
6d96f24d98 Enable RNG interrupts only when needed. 2016-03-31 13:43:00 -06:00
Gregory Nutt
29cae97367 i.MX6: Fix several problems with peripheral pin configuration 2016-03-31 13:36:06 -06:00
Gregory Nutt
9a9566faba i.MX6 Add more debug instrumentation; Fix setting of CCM register. 2016-03-31 10:49:35 -06:00
Gregory Nutt
756e6050e4 ARMv7-A: Need to set bits in the ICDDCR to enable forwarding of interrupts 2016-03-31 09:18:55 -06:00
Gregory Nutt
12064b276a ARMv7-A: Fix an error in GIC initialization 2016-03-31 08:05:12 -06:00
Gregory Nutt
9b81319fb1 i.MX6: OCRAM should be cacheable 2016-03-31 07:25:30 -06:00
Gregory Nutt
eb6fbc3059 Trivial changes from review of last PR 2016-03-30 14:44:29 -06:00
Gregory Nutt
8b1bcecbb1 Merged in ziggurat29/arch/stm32l4_rtc_001 (pull request #61) 
Stm32l4_rtc_001
 2016-03-30 14:32:47 -06:00
ziggurat29
624e6c1ebe correct #define errors in the 'debug output' and 'alarms' options code paths 2016-03-30 15:25:43 -05:00
Gregory Nutt
05fe9cb393 i.MX6: Fix UART baud rate calculation 2016-03-30 13:54:56 -06:00
ziggurat29
600a9b6981 basic RTC functionality implemented 2016-03-30 14:46:36 -05:00
Gregory Nutt
84f2fcfa80 i.MX6: Fix a few UART and GPIO initialization problems. 2016-03-30 12:31:49 -06:00
Gregory Nutt
8df80e6615 Kconfigs: All RNG selections also must select ARCH_HAVE_RNG 2016-03-30 07:56:03 -06:00
Gregory Nutt
6e000dc4fa i.MX6: Need to mapping OCRAM before enabling MMU because the page table lies in OCRAM 2016-03-29 17:51:58 -06:00
Gregory Nutt
426a6dae74 i.MX6: Fix missing DRAM mapping 2016-03-29 17:16:46 -06:00
Gregory Nutt
679a26cdf8 Update some comments 2016-03-29 15:35:47 -06:00
Gregory Nutt
1c56b8dd87 Update some ARM registers for Cortex-A9 2016-03-29 11:47:35 -06:00
Michael Spahlinger
940075f629 SAMV71/SAME70: Error in UART1 Pinmapping corrected 2016-03-29 07:25:37 -06:00
Dave
f9c2f70b36 STM32L4 PWR: Fix reversed parameters in putreg32() 2016-03-29 07:19:00 -06:00
Sebastien Lorquet
8fdef878ba Minor optimization to PR #60 2016-03-29 07:13:24 -06:00
Gregory Nutt
446618a644 Misc. trivial changes from review of last PR 2016-03-27 13:15:49 -06:00
Gregory Nutt
2a54bf91e5 Merged in ziggurat29/arch/stm32l4_lse (pull request #60) 
Stm32l4_lse support
 2016-03-27 13:06:55 -06:00
Gregory Nutt
267e20c729 PM: Add domain to all PM interfaces. Internal PM data structures now handle multiple PM domains. 2016-03-27 13:01:32 -06:00
Gregory Nutt
32acc35c88 PM: Add activity domain to all PM callbacks 2016-03-27 11:18:54 -06:00
ziggurat29
5bd7b7b54c add support for LSE oscillator configuration; requires also initial support of PWR control block 2016-03-27 12:07:47 -05:00
ziggurat29
cc53b25dbd fix typos in names of some LSE-related constants 2016-03-27 10:48:02 -05:00
ziggurat29
860a139ba0 trivial; update stm32l4 readme indicating things recently completed 2016-03-26 11:58:30 -05:00
Gregory Nutt
a52f638d7e Eliminate a warning 2016-03-25 14:59:53 -06:00
Gregory Nutt
03a31fca25 Misc costmetic changes from review of last PR 2016-03-25 14:35:35 -06:00
ziggurat29
c856bbb264 support RNG on STM32L4. add support for SAI1PLL and SAI2PLL. fix some errors in defines and configs. 2016-03-25 11:31:23 -05:00
Sebastien Lorquet
b2e7f63a7b Fix for bad type in stm32l4_spi.c 2016-03-24 08:18:30 -06:00
Gregory Nutt
ad611e2cca Merged in paulpatience/nuttx-arch (pull request #58) 
STM32 DAC: Fix DMA support for STM32F2xxx and STM32F4xxx
 2016-03-20 15:33:55 -06:00
Paul A. Patience
2f187f8714 STM32 DAC: Fix DMA support for STM32F2xxx and STM32F4xxx 2016-03-20 17:26:40 -04:00
Gregory Nutt
748edc0445 Fix a error in the previous commit 2016-03-20 14:23:45 -06:00
Gregory Nutt
e0249bd025 STM32L4: Fix incorrect and conflicting definitions for STM32L4_NGPIOS and STM32L4_NGPIO_PORTS. Now there is only STM32L4_NPORTS. 2016-03-20 14:12:07 -06:00
Gregory Nutt
f7d3b8147f Rename CONFIG_NET_MULTICAST to avoid name conflicts 2016-03-20 13:14:36 -06:00
Gregory Nutt
47b36e9de4 i.MX6: Fix uninitialized variable warning in GPIO logic 2016-03-19 13:59:50 -06:00
Gregory Nutt
2a15f73fd3 SAMV7 USB: Eliminate a warning 2016-03-17 17:43:29 -06:00
Gregory Nutt
0ff29023f1 SAMV7 USB: Fix a DMA related issue. When DMA completes with NBUSYBK greater than zero, need to way for NBUSYBK interrupt. 2016-03-17 17:43:29 -06:00
Gregory Nutt
bd846c2e72 All architectures: Register the schedule note driver if enabled 2016-03-17 17:00:59 -06:00
Gregory Nutt
b1c09dc0c5 i.MX6: Hmm.. I think the i.MX6 Solo Lite has global and private timers. Note cleare from the reference manual 2016-03-16 10:54:55 -06:00
Gregory Nutt
e1ff2af690 All i.MX6 family members have GIC 390; SoloLite does not seem to have MPCore timers 2016-03-14 13:41:53 -06:00
Gregory Nutt
dcc93a7a44 Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
Gregory Nutt
41b3af52b7 i.MX6: Revamp GIC initialization logic; add missing register bit definitions and initialization of GIC control register for secure cases 2016-03-13 10:12:45 -06:00
Gregory Nutt
411cf0ba1f SMP: Add per-CPU initialization logic 2016-03-13 07:16:26 -06:00
Gregory Nutt
6288e381ee Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake. 2016-03-12 15:22:45 -06:00
Gregory Nutt
8ad1188fe5 i.MX6: Finish initial cut at all SMP support 2016-03-12 13:23:49 -06:00
Gregory Nutt
9addc363f5 i.MX6 no longer depends on EXPERIMENTAL 2016-03-12 11:46:53 -06:00
Gregory Nutt
11f3554153 i.MX6: Kconfg needs to autoselect ARCH_HAVE_TRUSTZONE 2016-03-12 11:40:27 -06:00
Gregory Nutt
cbe7321508 i.MX6: Finish GIC initialization 2016-03-12 11:38:16 -06:00
Gregory Nutt
08fa7a0c6b Rename CONFIG_SAMA5_HAVE_TRUSTZONE to CONFIG_ARCH_HAVE_TRUSTZONE; Eliminate CONFIG_SAMA5_SECURE; Add CONFIG_ARCH_TRUSTZONE_SECURE 2016-03-12 10:53:22 -06:00
Gregory Nutt
a1ee5ae6e5 EFM32 Serial: Fix typo in initializer. Noted by Pierre-noel Bouteville 2016-03-12 08:53:41 -06:00
Gregory Nutt
4d484399a9 ARM: Remove some obsolete and incorrect conditional compilation 2016-03-11 12:42:58 -06:00
Michael Spahlinger
faa0c4f1ca SAMV7: MCAN: Correct typo in MCAN0 configuration 2016-03-11 12:30:57 -06:00
Gregory Nutt
4e07680554 TLS: Forgot to add a file before last commit 2016-03-11 12:30:04 -06:00
Gregory Nutt
87e7e135ba i.MX6: GIC decode and prioritization logic 2016-03-11 09:49:00 -06:00
Gregory Nutt
bc0fb5453a i.MX6: A little more GIC initialization logic 2016-03-11 09:00:49 -06:00
Gregory Nutt
1909dc8239 TLS: Move up_tls_info() to an inline function. Simplify TLS implementation. 2016-03-11 07:17:02 -06:00
Gregory Nutt
78e4ca2bc7 ARM: Partial implementation of TLS 2016-03-10 19:29:21 -06:00
Gregory Nutt
5445a1af83 Add a common ARM implementation of up_tls_info() 2016-03-10 18:10:17 -06:00
Gregory Nutt
a9b880a02b STM32L4: Fix a small error that prevent a clean compilation 2016-03-10 15:58:08 -06:00
Gregory Nutt
3d6519a223 Implement Cortex-A9 up_cpu_index() using the MPIDR register. Thanks Alan. 2016-03-10 14:02:58 -06:00
Sebastien Lorquet
1e5c4a83de Add stm32L4 I2C driver 2016-03-10 11:00:41 -06:00
Gregory Nutt
8e66043d7a Rename current_regs in STM32L4 for consistency with other platforms 2016-03-10 10:08:40 -06:00
Sebastien Lorquet
f4f03e6f02 Add port to the stm32L4 2016-03-10 09:59:16 -06:00
Gregory Nutt
a94febb551 MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq() 2016-03-10 08:37:34 -06:00
Gregory Nutt
5c75f83b55 ARMv7-A GIC: Add definitions for shared interrupt IDs 2016-03-10 07:13:40 -06:00
Gregory Nutt
4a8ac55c9d All SAM TWI: g_twiops should be both static and const 2016-03-09 18:11:55 -06:00
Gregory Nutt
400aead74a i.MX6: Add definitions for private processor interrupt IDs 2016-03-09 18:11:28 -06:00
Gregory Nutt
51be83aa3a ARM: Fix missing header file. Update comments in all *_irq.c files. 2016-03-09 15:08:58 -06:00
Gregory Nutt
4d4f54a789 Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
Gregory Nutt
7b0a696498 i.MX6: Add a system timer based on the i.MX6 GPT 2016-03-09 12:16:44 -06:00
Gregory Nutt
725e6878c4 i.MX6: Finish bit definitions in GPT header file 2016-03-09 09:31:36 -06:00
Gregory Nutt
80dce6dba1 i.MX6: Add incomplete GPT header file 2016-03-09 09:08:01 -06:00
Gregory Nutt
613786ff3d ARMv7-A: Add global timer header file 2016-03-09 08:36:22 -06:00
David Sidrane
a2052d006c Fix what I believe to be typos in SAMV7 timer 2016-03-08 17:26:01 -06:00
David Sidrane
72eef9f628 Ensure that CONFIG_ARMV7M_STACKCHECK works on the samv7 2016-03-08 17:22:07 -06:00
Gregory Nutt
85a7ca1ddd i.MX6: Fill in some 'Missing logic' that depended on CCM definitions. Correct confusion with boot media configuration. 2016-03-08 16:49:09 -06:00
Gregory Nutt
145853a930 i.MX6: Complete CCM header file 2016-03-08 13:54:43 -06:00
Frank Benkert
73de0d9114 SAMV7: TWIHS: Correct Error Handling 2016-03-08 06:47:22 -06:00
Frank Benkert
945e137382 SAMV7: TWIHS: Correct timeout calculation; correct some issues with Multi-Message-Transfer 2016-03-08 06:44:41 -06:00
Gregory Nutt
f46298105a i.MX6: Add skeleton clockconfig file. Fix some naming problems. Add some warnings. 2016-03-07 16:14:13 -06:00
Gregory Nutt
0d7edfd370 i.MX6: Add CCM header file 2016-03-07 15:01:38 -06:00
Gregory Nutt
3b1812b50f i.MX6 UART: Update periperal clock logic; Remove use of UART bits from i.MX1 that don't exist in i.MX6 2016-03-07 14:08:53 -06:00
Gregory Nutt
912008a883 i.MX6: Finish off some missing IOMUXC register bit definitions 2016-03-07 12:22:27 -06:00
Gregory Nutt
012f1c0e90 i.MX6: Some fixes for compiling imx_lowput.c. Still some missing clocking definitions. 2016-03-07 09:02:29 -06:00
Gregory Nutt
a67de9ce24 i.MX6: Add imx_lowputc.c; repartition some serial logic 2016-03-07 08:21:03 -06:00
Gregory Nutt
1992d57294 i.MX6: Add pin multiplexing header file 2016-03-06 21:30:37 -06:00
Gregory Nutt
dd7a4fb6a4 i.MX6: Modify encoding of GPIOs; add support for peripherals 2016-03-06 16:19:14 -06:00
Gregory Nutt
be594b8932 i.MX6 Add more IOMUX logic 2016-03-06 15:44:54 -06:00
Gregory Nutt
2b0124b9f2 i.MX6: Add a little more GPIO/IOMUX logic 2016-03-06 13:49:34 -06:00