This driver supports both eDMA3 and eDMA4 (also referred to as DMA0 / DMA1
in some contexts..)
The IP blocks are almost identical, with sufficiently minor differences
to use them via a unified driver. The price is a great amount of code
obfuscation in the hardware description layer.
The original assumption was that the interrupt numbers are divided
so that 16 pins from 1 port are handled by a single interrupt source.
So source 0 would handle pins 0-15 and source 1 would handle pins 16-31.
This assumption is wrong, each pin has two sources, thus there are two
interrupt lines for each pin.
The driver uses source 0, and leaves source 1 disabled.
Adds support for NXP i.MX9-series System-on-Module chips.
- Support for i.MX93 is added
- CPU is Cortex A55 / ARMv8.2A
- The chip also contains a Cortex M33, but no support is provided
- Supported drivers include lpuart only for now
