Commit Graph

15583 Commits

Author SHA1 Message Date
David Sidrane
8cb65d9b3b s32k1xx:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
b2b5826b80 s32k3xx:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
119bf660a4 imxrt:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
6101ebd565 imxrt:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00
David Sidrane
91034ff4d6 s32k3xx:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00
David Sidrane
7b8ea03ea3 s32k1xx:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00
GD32-MCU
6e94f7432f add gd32f470i board support 2023-10-21 11:45:03 -03:00
Simon Filgis
882afc885e channel gain switching in aefc by ioctl
Update arch/arm/include/samv7/sam_afec.h

remove "offset may be uninitialized" warning

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/samv7/sam_afec.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/samv7/sam_afec.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

remove blank line
2023-10-16 21:55:40 +08:00
TaiJuWu
1989749850 cpu_pause.c: fix typo
Signed-off-by: TaiJuWu <tjwu1217@gmail.com>
2023-10-14 00:26:31 -04:00
hujun5
061be5f18e refine: move BIT Macro to nuttx/bits.h
The BIT macro is widely used in NuttX,
and to achieve a unified strategy,
we have placed the implementation of the BIT macro
in bits.h to simplify code implementation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 14:52:56 +08:00
simbit18
f22cff9b0b arch/arm/src/mx8mp/Kconfig: Fix Kconfig style
Remove extra TABs
Add comments
2023-10-12 01:38:53 +08:00
hujun5
66fa229fcc Fix some typos in comments
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-11 08:14:49 +02:00
Lee Lup Yuen
6cad7e9582 arm, arm64, xtensa, libxx: Change sed -r to sed -E to support macOS
When we build NuttX on macOS, it shows many `sed` messages (and the build still completes successfully):

```text
$ tools/configure.sh pinephone:nsh
$ make
sed: illegal option -- r
```

This is due to the Makefiles executing `sed -r` which is not a valid option on macOS.

This PR proposes to change `sed -r` to `sed -E` because:

- `sed -E` on macOS is equivalent to `sed -r` on Linux

- `sed -E` and `sed -r` are aliases according to the GNU `sed` Manual

- `sed -E` is already used in nuttx_add_romfs.cmake, nuttx_add_symtab.cmake and process_config.sh
2023-10-10 11:36:32 +03:00
Philippe Leduc
f38cdb09b4 Add support for SPI through i.MX8MP ecspi module.
Configure SPI for Verdin evaluation board
2023-10-09 18:04:50 -04:00
Xiang Xiao
dfa0283d83 spinlock: Rename spin_islocked to spin_is_locked
align with Linux naming style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-06 20:03:19 -04:00
fengsi
7248b728bf UART needs to be disabled before changing setup 2023-10-06 20:49:26 +08:00
ThomasNS
2ffb72917d The character U+ff0c "," could be confused with the ASCII character U+002c ",", which is more common in source code. 2023-10-03 16:53:12 -04:00
raiden00pl
917fa624b9 arch/{all stm32 | all nordic | at32}: simplify the enable condition for up_perf_init 2023-10-03 12:53:10 +08:00
Carlos Sanchez
8e80d05fbb arch/arm/src/stm32h7/stm32_oneshot.c: Fix format warnings.
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-10-02 16:41:13 -04:00
Carlos Sanchez
f3576a41f5 arch/arm/src/s32k1xx: Fix warnings in PWM code. 2023-10-02 23:36:37 +08:00
Carlos Sanchez
33cfd630ad arch/arm/src/s32k1xx: Fix LPUART inversion warnings & config. 2023-10-02 23:36:01 +08:00
raiden00pl
c93c0ecd81 samv7/adc: always increase initialization counter when adc_setup called 2023-10-02 23:34:24 +08:00
raiden00pl
cf4b8dbfa3 imxrt/adc: always increase initialization counter when adc_setup called 2023-10-02 23:34:24 +08:00
raiden00pl
b7fca7ff75 at32/adc: always increase initialization counter when adc_setup called 2023-10-02 23:34:24 +08:00
raiden00pl
577bdbf1fc stm32{f7}/adc: always increase initialization counter when adc_setup called 2023-10-02 23:34:24 +08:00
raiden00pl
761bddcab8 arch: add a flag indicating that the chip doesn't support DMA transfer from/to FLASH 2023-09-29 21:04:02 +08:00
raiden00pl
20a65fa21b arch/nrf{52|53|91}: add support for up_perf 2023-09-29 19:56:21 +08:00
raiden00pl
4ea825ef9e arch/nrf{52|53|91}: fix timer for small intervals and correct CC overflow check 2023-09-29 18:21:01 +08:00
Petteri Aimonen
76f6d340ee stm32: Add architecture adjtime() support
Based on the samv7 implementation, adjusts systick period.
2023-09-29 13:03:10 +08:00
Xiang Xiao
cb11747f36 arch: add use_data to g_tcbinfo
to avoid compiler/linker remove it from the final image

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-29 08:00:18 +03:00
TimJTi
fc76b9955c Sort XDMA support for SAMA5D2 ADC&TSD 2023-09-28 09:33:35 +08:00
Daniel P. Carvalho
e45e932a8a Adds low level operations to start and stop DMA. 2023-09-28 09:32:52 +08:00
TimJTi
7c4349fa9c TSD behaviour incorrect if ADC software trigger set. Pressure scaling wrong. 2023-09-27 00:15:20 +08:00
Petteri Aimonen
d68c8ec560 stm32_eth: Fix excessively long critical section in ifdown handler
stm32_ifdown() holds critical section when calling stm32_ethreset().
That function used to call up_mdelay(10) while waiting for the ethernet
peripheral reset to complete. This resulted in excessively long
critical section time with interrupts disabled.

The actual expected delay is a few clock ticks of the 50 MHz clock domain.
This commit changes polling interval to 1us and maximum to 10us.
2023-09-26 22:13:24 +08:00
Xiang Xiao
167c4ae2a4 arch/arm: Fix error: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'}
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-26 15:03:59 +08:00
raiden00pl
ade23b92d1 arch/{nrf52|nrf53}/pwm: fix compilation for MULTICHAN not set 2023-09-24 10:32:29 +08:00
wanggang26
d827ee5ffc refine: set file mode when oflags contains O_CREAT
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-23 15:20:51 +08:00
wangming9
029bbf6bbd arch/arm: Enable FPU on qemu and goldfish platforms
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2023-09-23 08:42:00 +02:00
laoniaokkk
4256dd934f Fix onchip flash erase fail 2023-09-23 12:36:11 +08:00
wanggang26
7f5e6bd383 hostfs: mask bit fields of not support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-23 05:28:57 +09:00
raiden00pl
8833501084 arch/stm32h7/dualcore: don't use stm32_hsem interface for cores synchronisation
stm32_hsem functions can use debug messages but cores synchronisation is done when
the OS is not yet fully initialized
2023-09-22 19:46:26 +08:00
raiden00pl
0e01836f09 serial: add an option that selects uart rpmsg as console 2023-09-22 19:46:26 +08:00
wanggang26
e930476b4b enable O_CLOEXEC explicit
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-22 13:51:00 +08:00
simbit18
4f985f4367 Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-09-22 00:35:48 +08:00
raiden00pl
4c9c0c8be2 debug: add support for IPC (interprocessor communication) debug messages 2023-09-22 00:02:51 +08:00
simbit18
34bb0b6544 Fix nuttx coding style
Remove TABs
Remove spaces
Fix indentation
2023-09-21 10:03:13 -04:00
raiden00pl
dafa4e4413 arch/nrf{52|53|91}/serial: fix serial registration when ther is no console on serial 2023-09-21 20:31:03 +08:00
raiden00pl
f0155b9099 arch/nrf{52|53|91}/serial: fix warning if HAVE_UART_CONSOLE not defined
warning: control reaches end of non-void function [-Wreturn-type]
2023-09-21 20:31:03 +08:00
raiden00pl
3e79d21100 arch/arm: fix undefined reference to arm_serialinit when RTT console used 2023-09-21 20:30:27 +08:00
TimJTi
b406a30398 Fix historic %08x style printf format warnings 2023-09-21 09:04:07 +08:00