1 Gbit W25Q01JV flash uses two 512 Mbit dies. This requires specific
operations in the driver in order to support the entire 1 Gbit region.
This commit adds dual die support for W25Q01JV flash.
Generally the driver has to switch active dies when die specific read from
status register is required (therefore before read, write, erase and when
checking if write status register was successful).
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
W25QXXXJV_WRITE_STATUS_2 register uses just first byte therefore all
operations has to be done in priv->cmdbuf[0]. Previous priv->cmdbuf[1]
caused QuadSPI mode not being enabled.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Certain variants of the W25QxxxJV Quad SPI NOR flash ICs have the Quad
SPI mode disabled after reset. As the w25qxxxjv driver is operating the
device in Quad SPI mode, make sure it gets enabled if required during
device initialization.
Signed-off-by: Michael Jung <michael.jung@secore.ly>
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Misc changes made following recommendatinos of tools/nxstyle.
Author: kyChu <hello.kychu@gmail.com>
drivers/mtd/w25qxxxjv.c: Add QSPI-based Winbond NOR FLASH driver
drivers/mtd/Kconfig: include w25qxxxjv mtd driver to menuconfig
mtd/mtd.h: add function prototype of w25qxxxjv_initialize
