Namely these defconfig files:
boards/sim/sim/sim/configs/mtdpart/defconfig
boards/sim/sim/sim/configs/mtdrwb/defconfig
boards/sim/sim/sim/configs/rpproxy/defconfig
boards/sim/sim/sim/configs/rpserver/defconfig
boards/sim/sim/sim/configs/tcpblaster/defconfig
Because the recent versions of macOS is 64-bit only and thus
incompatible with CONFIG_SIM_M32=y.
The following defconfig files are left intact as these configs
are important for them:
boards/sim/sim/sim/configs/loadable/defconfig
boards/sim/sim/sim/configs/module32/defconfig
Because:
* A raw binary doesn't make sense for sim, where ./nuttx is
a host OS executable.
* It breaks test builds on macOS, where native objcopy
is not available.
* The appropriate size of stack varies among archs.
E.g. for 64-bit sim, 2048 is way too small, especially when the task
happens to use host OS functionalities.
I plan to allow an arch provide its own default.
* I plan to use this to replace hardcoded "STACKSIZE = 2048" in APPDIR.
This reverts commit b9ace36fcc.
This change was added by PR 625 but has a serious logic flaw. It removes all occurrences of INCDIROPT and replaces it with a definition in tools/Config.mk:
else ifeq ($(WINTOOL),y)
DEFINE = "$(TOPDIR)/tools/define.sh"
INCDIR = "$(TOPDIR)/tools/incdir.sh" -w
This logic flaw is the Config.mk is included in all Make.defs files BEFORE WINTOOL is defined. As a result, the definition is wrong in many places when building under Cygwin with a Windows native toolchain.
Necessary for dlfcn etc on ESP32, which has separate memory regions
for instruction and data.
known issues/todo
* consider something similar to dual heaps for PROTOECTED
* consider to adapt binfmt as well
boards/z80/ez80/z20x/configs/w25boot/defconfig: Increase size of serial Tx buffer.
boards/z80/ez80/z20x/src/w25_main.c: Add some fflush() in necessary places. Greatly improves the usability of the UI.
boards/z80/ez80/z20x/README.txt: Trival update to README
drivers/serial/serial.c and tcdrain.c: Correct some typos.
- boards/z80/ez80/z20x/scripts/z20x_*.linkcmd: Reduce from 4 to 1 wait state. That i sufficient because of the slow clocking of the eZ80F92
- boards/z80/ez80/z20x/src/w25_main.c: Replace CRC algorithm with simple, less time consuming check sum.
- boards/z80/ez80/z20x/configs/nsh: Rename the nsh_ram configuration to just nsh
- boards/z80/ez80/z80x/configs/hello: Add simpler program to make debugging the loader easier.
I skipped the following files because they were not simple.
I'll create separate PRs.
arch/xtensa/src/esp32/esp32_cpustart.c
arch/xtensa/src/common/xtensa_abi.h
boards/xtensa/esp32/esp32-core/include/board.h
Also, I skipped the following files and directories because
they looked too huge and/or foreign.
arch/xtensa/include/esp32/tie.h
arch/xtensa/include/xtensa/xtensa_corebits.h
arch/xtensa/src/esp32/hardware/
arch/xtensa/include/esp32/tie-asm.h
arch/xtensa/include/esp32/core-isa.h
arch/xtensa/include/xtensa/core.h
I also fixed a few "is is" style typos when unwrapping long lines.
arch/z80/src/ez80/ez80_timerisr.c: Correct a mismatch between the programmed reload value and the timer input clock frequency.
arch/z80/src/ez80/ez80f92.h: Correct error in timer input clock divider: Bits 2-3, not bits 3-4.
boards/z80/ez80/z20x/src/w25_main.c: Correct an uninitialized return value; private function was not declard static.
boards/z80/ez80/z20x/src/w25_main.c: (1) Correct size comparison typo: Should have been >= not != (2) Fix sizeof(): Was ugetting the sizeof the pointer instead of the sizeof the pointed at structure. (3) Improve some comments.
boards/z80/ez80/z20x: Increase RX buffer size to 4Kb, reduce BAUD to 2400 in w25boot configuration
arch/z80/src/ez80/ez80_serial.c: Reduce Rx FIFO trigger level for eZ80F92 to 1 so that will respond more quickly to incoming data.
boards/z80/ez80/z20x/src/w25_main.c: Improve user interface.
There is still an error occurring while downloading Intex HEX files to FLASH. That is unrelated to this and appears to be a problem libs/libc/hex2gbin/lib_hex2bin.c
fix the following warning:
chip/sam_allocateheap.c:120:8: warning: #warning "CONFIG_MM_REGIONS < 3: NFC SRAM not included in HEAP" [-Wcpp]
120 | # warning "CONFIG_MM_REGIONS < 3: NFC SRAM not included in HEAP"
| ^~~~~~~
chip/lpc17_40_allocateheap.c:176:6: warning: #warning "CONFIG_MM_REGIONS > 1: This configuration has no available AHB SRAM Bank0/1" [-Wcpp]
176 | # warning "CONFIG_MM_REGIONS > 1: This configuration has no available AHB SRAM Bank0/1"
| ^~~~~~~
chip/stm32l4_allocateheap.c:141:4: warning: #warning "CONFIG_MM_REGIONS large enough but I do not know what some of the region(s) are" [-Wcpp]
141 | # warning "CONFIG_MM_REGIONS large enough but I do not know what some of the region(s) are"
| ^~~~~~~
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
