The current EasyDMA implementation will fail if a transfer of over
255 bytes is requested with no warning.
Also we do not set the RX and TX transfer lengths to 0 if the
buffer is NULL which can cause data to be written to the old
address as well as cause unexpected transaction lenghts.
Example:
transfer 1:
rx_len = 10
rx_buff != NULL
tx_len = 10
tx_buff != NULL
transfer 2:
rx_len = 2
rx_buff != NULL
tx_buff == NULL
Total transaction length for the second would be 10 because it
would still be using the old rx length of 10 and would
corrupt data in the old rx buffer.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.
KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
This commit exends systimer options for nRF52 arch. It is possible
to use ARM SysTick either for tickless or non-tickless mode. Also,
it is possible to use the RTC peripheral for tickless mode. This
also re-enables support for WFI/WFE sleep if RTC is used, since
this counter continues to run in this mode (in contrast to SysTick).
Summary:
- I noticed that ldrex/strex on cxd56xx have an issue
- The issue is still under investigation
- This commit introduces a custom testset to avoid the issue
Impact:
- Affects cxd56xx in SMP mode if it is enabled
Testing:
- Tested with spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
After previous commit, add -fvisibility=hidden, we don't need
worry about depended libxx.so callback to nuttx symbol in SIM.
So most of the symbol in nuttx-names.in can be remove.
But we still need some symbol replacement for host code.
Host code should call host API if access HOST sth, for example:
open, close, accept, printf...
Signed-off-by: ligd <liguiding1@xiaomi.com>
should use syslog in kernel
RP check failed because host code call host API has
style AaaBbb, so, ignore the RP check
Change-Id: Iad3468dae2cd07e6dd92874c5e6d38d9018bee6c
Signed-off-by: ligd <liguiding1@xiaomi.com>
Summary:
- I noticed that ostest sometimes stops with DEBUGASSERT
- Finally I found a bug that cpu1 can not disable interrupt
- This commit initializes nvic to fix this bug
Impact:
- Only affects cxd56 in SMP mode
Testing:
- spresense:smp and spresense:wifi_smp with DEBUG_ASSERTIONS=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
## Summary of changes
The pthread_cond_* API is also present as part of libfs.a and we want
to avoid colisions and link with the correct implementation.
Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
## Summary of changes
On OSX with CONFIG_SMP=y the semaphore which notifies that the CPU is
initialised, is not created and the up_cpu_start() returns with error
from sem_init(). This patch fixes the problem by using pthread_cond_t
signalling mechanism which is supported on Mac.
Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
arch/arm/src/stm32/stm32_lowputc.c:
* stm32_lowsetup(): Ensure the USART is disabled before attempting
to configure it because some register bits cannot be modified
otherwise. This solves an issue that was encountered when a
serial bootloader did not perform a full teardown/cleanup before
launching NuttX.
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code
Impact:
- Should have no impact because the logic is the same for SMP
Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
