This makes the user interface a little hostile. People thing of an MTU of 1500 bytes, but the corresponding packet is really 1514 bytes (including the 14 byte Ethernet header). A more friendly solution would configure the MTU (as before), but then derive the packet buffer size by adding the MAC header length. Instead, we define the packet buffer size then derive the MTU.
The MTU is not common currency in networking. On the wire, the only real issue is the MSS which is derived from MTU by subtracting the IP header and TCP header sizes (for the case of TCP). Now it is derived for the PKTSIZE by subtracting the IP header, the TCP header, and the MAC header sizes. So we should be all good and without the recurring 14 byte error in MTU's and MSS's.
Squashed commit of the following:
Trivial update to fix some spacing issues.
net/: Rename several macros containing _MTU to _PKTSIZE.
net/: Rename CONFIG_NET_SLIP_MTU to CONFIG_NET_SLIP_PKTSIZE and similarly for CONFIG_NET_TUN_MTU. These are not the MTU which does not include the size of the link layer header. These are the full size of the packet buffer memory (minus any GUARD bytes).
net/: Rename CONFIG_NET_6LOWPAN_MTU to CONFIG_NET_6LOWPAN_PKTSIZE and similarly for CONFIG_NET_TUN_MTU. These are not the MTU which does not include the size of the link layer header. These are the full size of the packet buffer memory (minus any GUARD bytes).
net/: Rename CONFIG_NET_ETH_MTU to CONFIG_NET_ETH_PKTSIZE. This is not the MTU which does not include the size of the link layer header. This is the full size of the packet buffer memory (minus any GUARD bytes).
net/: Rename the file d_mtu in the network driver structure to d_pktsize. That value saved there is not the MTU. The packetsize is the memory large enough to hold the maximum packet PLUS the size of the link layer header. The MTU does not include the link layer header.
Add support for STM32F746G-disco board SDRAM
* add support for STM32F746G-disco board SDRAM
* changed fb config to use SDRAM and fixed compilation
Approved-by: GregoryN <gnutt@nuttx.org>
lpc17: Removed duplicate configuration variable definitions from Kconfig: CONFIG_USBHOST_BULK_DISABLE, CONFIG_USBHOST_INT_DISABLE, and USBHOST_ISOC_DISABLE. These are global USBHOST configurations and are all defined in drivers/usbhost/Kconfig.
lpc17: Correct scope of naming of configuration variables: CONFIG_USBHOST_TDBUFFERS->CONFIG_LPC17_USBHOST_TDBUFFERS, CONFIG_USBHOST_TDBUFSIZE->CONFIG_LPC17_USBHOST_TDBUFSIZE, and CONFIG_USBHOST_IOBUFSIZE->CONFIG_LPC17_USBHOST_IOBUFSIZE
lpc17: Correct scope of naming of configuration variables: CONFIG_USBHOST_NEDS->CONFIG_LPC17_USBHOST_NEDS and CONFIG_USBHOST_NTDS->CONFIG_LPC17_USBHOST_NTDS
lpc17: Correct scope of naming of configuration variable: CONFIG_USBHOST_OHCIRAM_SIZE->CONFIG_LPC17_OHCIRAM_SIZE
stm32f7:I2C reset Configure I2C pins as GPIO output
Pins were reset to inputs in the deinit. This resets
them to outputs.
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/imxrt: Fix some first time compile issues.
arch/arm/src/imxrt: This brings the RTC implement to code complete but still untested.
arch/arm/src/imxrt: Add some RTC initialization logic.
arch/arm/src/imxrt: Flesh out most of the RTC driver lower half and LPSRTC support.
arch/arm/src/imxrt: Some inital, partial implementation of the HPRTC and LPSRTC.
arch/arm/src/imxrt: Add HPSRTC/HPRTC file framework (no logic, just skeleton files).
arch/arm/src/imxrt: Add HPRTC header file.
Some initial configuration logic for SNVS LPRTC and HP RTC.
are not allocated just after g_instack_alloc but these values show the addresses for interrupt stack of each CPU. So to set the stack
pointer based on these variables, temporal register has to be used.
stm32f7: Fix compile error caused by intentional use of fall through
Approved-by: Sebastien Lorquet <sebastien@lorquet.fr>
Approved-by: GregoryN <gnutt@nuttx.org>
A few bugfixes in initial testing on the i.MX6. Behavior seems a little more stable, but there are still memory corruption issues. Also print CPU number on assertion.
Add a file missed in the last big commit.
arch/arm/src/armv7a and imx6: Add support for per-CPU IRQ and FIQ interrupt stacks (bugfix). Add support so that up_assert will print the correct interrupt stack on an assertion (FIQ stack is still not printed).
arch/arm/src/lc823450: Combine the content of smp_macros.h into chip.h. Add support so that up_assert will print the correct interrupt stack on an assertion.
arch/arm: Remove support for CONFIG_ARMV7M_CMNVECTOR. It is now the only vector support available. Also remove CONFIG_HAVE_CMNVECTOR. That no longer signifies anything."
arch/arm/src/stm32: This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
arch/arm/src/lpc17xx: This commit removes support for the dedicated vector handling from the LPC17xx architectures. Only common vectors are now supported.
arch/arm/src/kinetis: This commit removes support for the dedicated vector handling from the Kinetis architectures. Only common vectors are now supported.
Squashed commit of the following:
sched: Rename all use of system_t to clock_t.
syscall: Rename all use of system_t to clock_t.
net: Rename all use of system_t to clock_t.
libs: Rename all use of system_t to clock_t.
fs: Rename all use of system_t to clock_t.
drivers: Rename all use of system_t to clock_t.
arch: Rename all use of system_t to clock_t.
include: Remove definition of systime_t; rename all use of system_t to clock_t.
Squashed commit of the following:
arch/arm/src/stm32f7: Some minor changes for clean compilation of LTDC.
arch/arm/src/stm32f7: Add overly support for LTDC driver header file.
arch/arm/src/stm32f7: Add overly support for LTDC driver file.
arch/arm/src/stm32f7: Add overly support for DMA2D driver header file.
arch/arm/src/stm32f7: Finishes overly support for DMA2D driver.
arch/arm/src/stm32f7: Partial overly support in DMA2D driver (a lot more to be donw)
arch/arm/src/stm32f7/chip: Clone overlay DMA2D register definitions from F4
arch/arm/src/stm32f7: Clone overlay configuration from stm32 F4
stm32f7: serial: Fix ioctl TIOCSSINGLEWIRE
The TRM notes that UE must be disabled in order to write HDSEL in
USART_CR3. This was not being done, so calls to TIOCSSINGLEWIRE were
silently failing.
This change checks the state of UE in USART_CR1, clears the UE bit
before writing HDSEL, then re-enables it if neccesary.
Approved-by: GregoryN <gnutt@nuttx.org>
LTDC fixes
* stm32_ltdc: Allows to use ltdc without overlay support
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32: Removes overlay dependency when LTDC is enabled
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32: Allows to configure initial chromakey for LTDC layer
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32_ltdc: Fixes another compiler warning when dma2d is disabled
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32_ltdc: Checks for register reload is done before continued
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32f429i-disco: Fixes eliminated register control by compiler optimization
When reading 1 byte from the SPI device the clock must be enabled and
immediately disabled. This section has been optimized by the compiler (-O2) to a
missing active spi clock. A subsequently block read failed because of missing
response from the spi device. This has been lead to a broken display
initializing.
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Fixes compiler errors when using LTDC and DMA2D
* stm32: ltdc and dma2d are are depends on FB_OVERLAY support
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32_dma2d.h: Makes interface available when FB_OVERLAY is enabled
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32_ltdc: Fixes compiler error when blit support is disabled
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32f429i-disco: Updates lvgl board example
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
* stm32f429i-disco: Updates nxwm board example
Still nxwm_main is missing.
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Signal handlers maybe run with interrupts enabled or disabled, depending on how the task the received the signal was blocked. (i.e.: If sem_wait() is called, then we disable interrupts, then block the currently running task). This could be dangerous, because user code would be running with interrupts disabled.
This change forces interrupts to be enabled in up_sigdeliver() before executing the signal handler calling up_irq_enable() explicitly. This is safe because, when we return to normal execution, interrupts will be restored to their previous state when the signal handler returns.
Squashed commit of the following:
arch/arm/src/stm32/stm32f10xxf30xx_flash.c: Re-implemented Dmitriy Linikov's change to support multi-banked FLASH on the STM32 F1 parts AFTER separating the FLASH support by architecture and implementing more standard base+offset register addressing. Now the change goes in rather cleanly.
arch/arm/src/stm32/stm32f10xxf30xx_flash.c: Use base + offset address to simplify implementation of dual bank flash.
Squashed commit of the following:
arch/arm/src/stm32/stm32f10xxf30xx_flash.c: Be consistent in file naming.
arch/arm/src/stm32l10xxf30xxx_flash.c: Separate STM32F10xx and STM32F30xx FLASH logic into a separate file.
arch/arm/src/stm32l20xx40xxx_flash.c: Separate STM32F20xx and STM32F40xxFLASH logic into a separate file.
arch/arm/src/stm32l15xx_flash.c: Separate STM32L15xx FLASH logic into a separate file.
Kinetis UART must be placed in 9 bit mode (M=1) with when 8 bit
data with parity is required. If left in 8 bit mode (M=0) with
parity then D7 of the TX/RX register becomes parity bit. Hence
what is called 9-bit or 8-bit Mode Select is a misnomer.
8 bit mode when parity is enabled is realy 7 bit with parity.
Previous BRFA was not cleared and or-ed into new BRFA, hence
buadrate was wrong. Where Baud Rate Fractional Divisor (BRFD)
UART baud rate = clock / (16 * (SBR + BRFD))
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Add cache operations to permit the Ethernet driver to work with the D-Cache enabled, at least in write-through mode.
Author: Jake Choy <jakearcx@gmail.com>
arch/arm/src/imxrt: The Ethernet driver is now functional, at least with the D-Cache off. The final fix was for the reference clock that needs to be forced to provide and input (SION).
Author: Gregory Nutt <gnutt@nuttx.org>
Fix trivial coding standard issue.
configs/imxrt1050-evk: Correct CONFIG_RAM_SIZE in all configurations (5Kb not 5Mb). I don't believe that CONFIG_RAM_SIZE is used at all in the i.MX RT so this is as grievous an error as it seems. Also enabled built-in applications in all NSH configurations.
arch/arm/src/imxrt/imxrt_enet.c: Trivial and cosmetic.
Cosmetic update to comments.
arch/arm/src/imxrt/imxrt_enet.c: Oops.. put the PHY interrupt init hooks in the wrong place. That is a one-time initialization but imxrt_initphy() is called on each ifup.
arch/arm/src/imxrt/imxrt_enet.c: Add hooks for board-specific PHY initialization (not yet needed, but there when needed).
Remove dangling white space at the end of lines
arch/arm/src/imxrt/Kconfig: Add option for board-specific PHY initialization.
configs/imxrt1050-evk/src: Add basic logic to support PHY interrupts. Incomplete.. needs additional support in imxrt_enet.c to 1. call to initialize PHY interrupt features, and 2. IOCTL commands to access PHY registers.
configs/imxrt1050-evk/README.txt: Trivial update.
configs/imxrt1050-evk/netnsh/defconfig: Disable LED support because pins conflict with PHY. Enable device statists. Enable NSH ifup and ifdown commmands
arch/arm/src/imxrt: Use macros in imxrt_periphclks.h vs. direct CCM CCGR accesses in Ethernet driver.
arch/arm/src/imxrt: Misc changes for a clean compilation of Ethernet deriver. configs/imxrt1050-evk/netnsh: Add an NSH configuration for testing Ethernet.
Author: Jake Choy <jakearcx@gmail.com>
arch/arm/src/imxrt: Initial WIP Ethernet driver.
arch/arm/src/imxrt: May eDMA channel linking a configuration option. Add support to select the DMA channel priority and pre-emption controls.
arch/arm/src/imxrt: Update some HowTo comments in the eDMA header file.
arch/arm/src/imxrt: Fix a logic error in parmater passing. Caller does not know actual channel number when setting up linked channel, only the channel handler.
arch/arm/src/imxrt: Fixes for clean eDMA driver build with Scatter/Gather enabled.
arch/arm/src/imxrt: Fixes for clean eDMA driver build with Scatter/Gather disabled.
arch/arm/src/imxrt: Add flags to DMA configuration to control transfer setup. Remove some user interfaces that are inconsistent with modular design.
arch/arm/src/imxrt: Update DMA channel interrupt handler.
arch/arm/src/imxrt: Add implementation of eDMA imxrt_dmach_start().
arch/arm/src/imxrt: Add implementation of eDMA imxrt_dmach_setup().
arch/arm/src/imxrt: Add eDMA imxrt_tcd_chanlink().
arch/arm/src/imxrt: Add eDMA imxrt_dmach_getcount; free allocated TCDs automatically when the DMA completes or is aborted.
arch/arm/src/imxrt: Add structures to support list of TCDs for Scatter/Gather DMA.
arch/arm/src/imxrt: Add eDMA imxrt_dmach_initconfig().
arch/arm/src/imxrt: Add eDMA imxrt_tcd_instantiate().
arch/arm/src/imxrt: Replacing some of the logic cloned from SAMv7 XDMAC with eDMA logic from NXP sample code. I am thinking that the eDMA is too complex to force into the same pattern as for other MCUs.
arch/arms/src/imxrt/imxrt_edma.c: Add support for in-memory TCDs.
arch/arm/src/imxrt/chip: Add an in-memory representation of the TCD in imxrt_edma.h
configs/stm32f4discovery/include/board.h: Add SPI DMA pins definitions to get CS43L22 audio DAC working
configs/stm32f4discovery/audio: Add board configuration for CS43L22 audio example
configs/stm32f4discovery: Update README
As with the MCU temperature and VREFINT measurement, this patch requires user to enable the corresponding channel first. For Vbat channel the ioctl cmd is IO_ENABLE_DISABLE_VBAT_CH, and its arg should be a pointer to bool which must be true to enable and false to disable the Vbat channel.
Moreover, since Vbat input contains a built-in voltage divider, it is highly suggested to disable Vbat input channel after measurement is done in order to prevent battery drain through the divider.
commit 7fd1f0d78546fa0315f4077b779efdd884e5bd53
Author: William Douglas <william@rocklandscientific.com>
Date: Tue May 15 13:19:31 2018 -0700
Add support for the second SDMMC device.
The second SDMMC device was already supported but
the clock was never enabled. This fixes that.
configs/freedom-k28f: Add button and LED support.
arch/arm/src/kinetis: Fix a couple of additional compile problems.
arch/arm/src/kinetis/chip and configs/freedom-k28f: Add things needed for a successful build. Still need board LED definitions.
Squashed commit of the following:
arch/arm/src/kinetis: A fixes from first (unsuccessful) attempt to build the Freedom-K28F configuration.
configs/freedom-k28f: Add basic board support for Freedom-K28F. Initial commit is basically just the Teensy-3.x brought up to date and with name changes.
imxrt_gpioirq.c
- Add check for interrupt mask register before dispatching ISR. The GPIO_ISR bits are set independent of the GPIO_IMR bits.
imxrt_irq.c
- fixed a range check for extint in function imxrt_irqinfo().
Squashed commit of the following:
arch/arm/src/kinetis: Add K28F memory map.
arch/arm/src/include/kinetis and src/kinetis: Add basic chip features and interrupt-related definitions for the K28F
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
Fix some spacing
arch/arm/src/tiva: Verify that the EEPROM driver at least builds.
arch/arm/src/tiva: Move unused function added to tm4c129_syscontrol.c to tiva_eeprom.c where it is actually used.
arch/arm/src/tiva: Reorganize EEPROM register definitions so that the file organization is more like other platforms.
arch/arm/src/tiva: Trying to resolve EEPROM register addressing. Still some issues.
arch/arm/src/tiva: Ran uncrustify on tiva_eeprom.c
arch/arm/src/tiva: EEPROM driver is a little closer to coding standard. Still a way to go.
Author: Shirshak Sengupta <sgshirshak@gmail.com>
arch/arm/src/tiva: Implemented EEPROM driver in compliance with MTD driver as provided by NUTTX for TM4C1294. The EEPROM driver needs to be initialized by calling the function tiva_EEPROMInit The EEPROM driver currently supports only two functionalities - read bytes(multiple of 4) and write bytes (multiple of 4). Note - Rest of the features of EEPROM will be implemented in the future.
kinetis usb device fixes
* kinetis:usb device use correct CONFIG OTG control
* kinetis:usb device fix interrupt storm when cable is disconnected
The DM, DP state were incorrect because the pulldowns were not
enabled.
Also the pending asynchronous resume interrupt needed to be
re-armed after the suspend is in effect. This is now done in
the isr.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
include/nuttx/wireless/ieee80211: Cosmetic, coding standard changes from review of last merge.
drivers/wireless/ieee80211: Cosmetic, coding standard changes from review of last merge.
configs/photon: Cosmetic, coding standard changes from review of last merge.
arch/arm/src/stm32: SDIO changes from last review: Fix a few long lines and other coding standard issues; Make additions for SDIO card support dependent on a configuration option.
Author: hhuysqt <hyq9606@126.com>
Return IEEE 802.11 MAC address just as ethernet does
Modifyed bcmf_board_setup_oob_irq declaration
Modified OOB ISR function types
Add some logic according to WICED SDK
Bug fixed: data_offset counts in 4-bytes
Add BCM43438 logic for future developement
Add tips on using telnet
Use SDIO in-band interrupt instead of OOB interrupt, because Photon seems to unconnect the OOB interrupt line...
add SDIO in-band interrupt logic
Squashed commit of the following:
arch/arm/src/stm32: Add Kconfig options needed by the HCI UART. Various fixes to finally get a clean error free compile with no unexpected warnings.
arch/arm/src/stm32: In HCI UART, use spin_lock_irqsave() instead of enter_critical_section() whenever possible.
arch/arm/src/stm32: In HCI UART, fix up naming of configurations so that they are unique. Still needs Kconfig settings. Modify logic so that there can be multiple HCI UARTs, some supporting DMA and some not.
arch/arm/src/stm32: Integrate watermarks and software Rx flow control into the HCI UART driver.
arch/arm/src/stm32: Eliminate some HCI UART UART configuration options. Per the HCI UART spec, the link will b 8 data bits, no parity, 1 stop bit... Always.
arch/arm/src/stm32: Trivial cleanup
arch/arm/src/stm32: Fixes most initial compilation issues STM32 HCI UART driver. Still need to set up USART configuration parmeters for HCI UART
arch/arm/src/stm32: Completes first cut at STM32 HCI UART driver.
arch/arm/src/stm32: Completes most of read logic for HCI UART. Still needs to be able to block if no read data is available. Still missing write and flush logic.
drivers/wireless: Remove txenable from HCI UART methods. arch/arm/src/stm32: Reorganize some structures in HCI UART.
arch/arm/src/stm32: Still messaging the HCI uart driver.
arch/arm/src/stm32: Some trivial renaming.
arch/arm/src/stm32: A little more HCI-UART logic.
arch/arm/src/stm32: Initial setup to support HCI-UART. Little more than the serial driver with some name changes and a few things removed.
This port was the joing effort of Janne Rosberg, Ivan Ucherdzhiev, and myself. I give credit to Ivan for the kill because he is the one to held on to the end.
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
configs/imxrt1050-evk/scripts: Add section to linker script to handle the case where RAMFUNCs are enabled. RAMFUNCs appear to be enabled in the default configuration ... they probably should not be enabled.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: imxrt_lowputc.c is finished. Now everything needed for the initial port is done and ready for testing.
arch/arm/src/imxrt: Add logic to imxrt_lowputc.c. Still incomplete.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: Add serial support. configs/imxrt1050-evk: Add linker script.
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Add initial cut at imxrt_allocateheap.c
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arm/arm/src/imxrt: Completes all definitions for PADMUX, CTLMUX, and IOMUX_INPUT and mapping tables on imxrt_gpio.c and imxr_iomuxc.c.
arch/arm/src/imxrt/chip: Add definitions for IMXRT_PADCTL and IMXRT_PADMUX registers. Only the IMXRT_INPUT definitions in this commit.
arch/arm/src/imxrt/chip: Add more IOMUXC register definitions.
Author: Gregory Nutt <gnutt@nuttx.org>
configs/imxrt1050-evk: Add STRIP definition to Make.defs.
arch/arm/src/imxrt: Bring in i.MX6 memory configuration settings.
arch/arm/src/imxrt: Remove call to non-existent imxrt_gpioinit() from imxrt_start.c.
arch/arm/src/imxrt: Bring in incomplete imxrt_iomuxc.c file from i.mx6.
arch/arm/src/imxrt: Add first cut at GPIO interrupt logic.
arch/arm/include: Add definitions to support a second level of GPIO pin interrupts.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_wdog.c/.h
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Port SAMv7 interrupt logic to imxrt_irq.c.
arch/arm/src/imxrt: More clarification of the start-up memory map.
arch/arm/src/imxrt: Some mostly cosmetic clean-up to the imxrt_start.c file that was so rudely taken from the SAMv7.
arch/arm/src/imxrt: Add imxrt_start.c. Initial commit is the the SAMv7 startup logic with name changes.
Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
arch/arm/src/imxrt: Adds a few IOMUXC register definitions.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_clockconfig.c/.h
configs/imxrt1050-evk: Add clock configuration definitions to board.h
arch/arm/src/imxrt: Fix CCM register name; Fix doubly defined in LPUART bit field.
arch/arm/src/imxrt: Add analog defines to CCM register definition header file.
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/imxrt: Bring in GPIO C files from i.MX6. Things are in disarray now because that GPIO logic depends on IOMUXC logic which is not yet in place.
arch/arm/src/imxrt: Add a few more GPIO definitions to make the header file compatible with i.MX6
arch/arm/src/imxrt/chip: Add GPIO register definition file.
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add DCDC register definitions.
arch/arm/srch/imxrt: Add CCM register bit definitions
Author: Gregory Nutt <gnutt@nuttx.org>
Purely cosmetic
arch/arm/src/imxrt: Add system reset controller register definition header file.
Embarassingly trivial change left in compiler.
arch/arm/src/imxrt: Finishes i.MX RT1050 LPUART register definition header file.
arch/arm/src/imxrt: Beginning of an i.MX RT1050 LPUART register definition header file.
Some trivial things
Author: Janne Rosberg <janne.rosberg@offcode.fi>
arch/arm/src/imxrt: Add imxrt_wdog.h
arch/arm/src/imxrt: Add initial imxrt_ccm.h
Author: Gregory Nutt <gnutt@nuttx.org>
Trivial update to README.
arch/arm/src/imxrt: The i.MX Rt implements 4 bits of interrupt priority, not two. Thanks, Janne.
arch/arm/src/imxrt: Fix some initial compile issues. Still a long way from complete, but there is a buildable environment now for the imxrt1050-evk.
configs/imxrt1050-evk: Add an initial NSH configuration for testing.
configs/Kconfig: Hook the i.MX RT 1050 board configuration into the NuttX configuration system.
configs/imxrt_evk: Add the framework for i.MX RT 1050 board support.
arch/arm/src/imxrt: Bring in a few more files from LPC54xxx.
arch/arm/src/imxrt: Bring in imxrt_clrpend() from the LPC54xxx.
arch/arm/src/imxrt: Bring in Cortex-M7 SysTick setup from the SAMv7.
arch/arm/src/imxrt: Add a few easy files.
arch/arm/src/imxrt/chip: Add memory map header files.
arch/arm/src/imxrt: A few basic files to start the port to the i.MX RT 1050.
Squashed commit of the following:
Remove final references to CC3200 from the repository.
arch/arm/include/tiva: Remove all CC3200 support.
arch/arm/src/tiva: Remove all CC3200 support.
configs/cc3200-launchpad: Remove the board support directory.
Change all Sony related copyright to conform with our company's internal rules.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/stm32/lowputc: fix uart glitch when lowputc is enabled
Calling up_lowputc() when a character is in the shift register results
in corrupted character on stm32f1xx and stm32f205 cores.
TC status bit ensures that up_lowputc() waits for an on-going
transmission to complete before writing in TDR.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
stm32f33xxx_adc.c: fix bug in RCC reset logic that resets ADC1 configuration when both ADC1 and ADC2 are in use
Approved-by: Gregory Nutt <gnutt@nuttx.org>
lc823450 dvfs auto
* arch/arm/src/lc823450: Fix up_enable_irq() timing for I2S.
In previous commit, I2S IRQ might be sometimes assigned to CPU1
when CONFIG_SMP=y. This change fixes this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Refactor timer driver.
Introduce lc823450_timer.h and move lc823450_timerisr.c to
lc823450_timer.c Add MTM timer APIs for DVFS. Introduce
up_rtc_gettime() for CONFIG_RTC_HIRES.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Introduce idle time calculation in DVFS
Also, DVFS autonomous mode based on CPU idle time is supported.
NOTE: voltage control is still disabled.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/lc823450-xgevk: Update defconfigs
Enable RTC_HIRES instead of RTC_DATETIME (audio/rndis)
Disable TCP_WRITE_BUFFERS and change SCHED_LPWORKPRIORITY (rndis)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/lc823450-xgevk: Update README.txt
Update SMP and DVFS related part
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Author: Juha Niskanen <juha.niskanen@haltian.com>
Date: Mon Feb 19 15:03:17 2018 -0600
drivers/mtd: mtd_config.c: Add still more error handling (to detect bad underlying flash implementations)
drivers/mtd: mtd_config.c: Remove MTD_ERASE that was erasing data block instead of erase block. This is a partial revert of 4f18b4. Reported-by: Pascal Speck <iktek01@yahoo.com>
arch/arm/src/stm32l4: stm32l4_flash: change flash programming to use page buffer for unaligned writes.
is not done or done after PLL configuration, the STM32 fail to continue boot
operation if the frequency if greater than 24MHz. This common t add this operation according to the board variable STM32_SYSCLK_FREQUENCY. Tested on stm32f334-disco board.
