Commit Graph

11757 Commits

Author SHA1 Message Date
David Sidrane
2f1678b7be arch/arm/src/imxrt/imxrt_periphclks.h: Ensure C++ compatibility. 2019-01-16 18:12:56 -06:00
David Sidrane
8b9014bc1d arch/arm/src/imxrt/chip/imxrt_adc.h: Fix a typo 2019-01-16 18:11:25 -06:00
David Sidrane
026feadbe3 arch/arm/src/imxrt/imxrt_lpi2c.c: I2C Reset rework 2019-01-16 18:10:13 -06:00
David Sidrane
dbd9172e57 arch/arm/src/imxrt/Make.defs: Include up_systemreset and up_stackcheck.c 2019-01-16 18:08:24 -06:00
David Sidrane
fe4ee29833 arch/arm/src/imxrt/imxrt_lpspi.c: Removed unused clock, that borked he build 2019-01-16 18:06:28 -06:00
Gregory Nutt
fee4432584 arch/arm/src/imxrt/imxrt_usdhc.c: Remove daisy selection hack 2019-01-16 18:04:51 -06:00
David Sidrane
d6fa328d27 arch/arm/src/imxrt: ADD GPIO Support Input daisy selection 2019-01-16 18:03:10 -06:00
David Sidrane
042f057463 arch/arm/src/imxrt/imxrt_usdhc.c and related board.h files: Use single define for USB pin definitions. 2019-01-16 17:49:12 -06:00
David Sidrane
b8bc611676 arch/arm/src/imxrt/imxrt_usdhc.c: Eliminate warnings. 2019-01-16 17:46:08 -06:00
David Sidrane
c38a5af732 arch/arm/src/imxrt/imxrt_serial.c: Support independent input and output flow control. 2019-01-16 17:44:39 -06:00
David Sidrane
c44c30784c arch/arm/src/imxrt/imxrt_serial.c: Fix TTYS0 defined definitions of higher numbered ports 2019-01-16 17:33:23 -06:00
David Sidrane
178ed12903 arch/arm/src/imxrt/chip/imxrt_flexpwm.h: Correct duplicated definitions 2019-01-16 17:30:32 -06:00
Petro Karashchenko
0f324d3bce arch/arm/src/am335x/am335x_timerisr.c: Switch to DMTimer2 for system tick generation. U-Boot does not enable DMTimer1ms clocks hence it is not possible to use it until implementation in am335x_clockconfig.c is ready 2019-01-16 15:09:40 -06:00
Gregory Nutt
8f800ddc4c arch/arm/src/tiva/hardware: Add CC13x0 AON WUC register definition header file. 2019-01-16 12:58:36 -06:00
Gregory Nutt
4fe9ebd5e3 arch/arm/src/tiva: Add CC13x0 AON SYSCTL header file. 2019-01-16 10:01:15 -06:00
Gregory Nutt
14b4b6abf1 arch/arm/src/tiva: Fix several compile problems with trim logic. Still many missing TI driverlib functions. 2019-01-16 09:04:49 -06:00
Gregory Nutt
d3c3904f2b Fix a trivial typo in some comments. 2019-01-15 17:15:28 -06:00
Gregory Nutt
da50ab18c9 arch/arm/src/tiva/hardware: Add (and integrate) CC13xx ADI4 AUX register definition header file. 2019-01-15 17:14:25 -06:00
Alexander Vasiliev
bac062f9c6 arch/arm/src/samd2l2/sam_i2c_master.c: Adds calculation of a timeout and disables interrupts in case of error. 2019-01-15 09:02:58 -06:00
Petro Karashchenko
937c30e57a arch/arm/src/am335x/chip/am335x_uart.h: Cosmetic changes for am335x_uart.h 2019-01-15 06:15:22 -06:00
Petro Karashchenko
dc92cd42e6 arch/arm/src/am335x: Add minimal wdog logic needed to disable the watchdog timer. Otherwise, the board is rebooted after certain time expires while NuttX is running. 2019-01-15 06:12:57 -06:00
Gregory Nutt
ac0a6ebdd9 arch/arm/src/tiva/hardware: Fix some naming used in comments. 2019-01-13 10:43:20 -06:00
Gregory Nutt
68584aa6eb arch/arm/src/tiva/hardware: Add ADI 3 REFSYS header file. 2019-01-13 10:10:00 -06:00
Gregory Nutt
7ed340c9a1 arch/arm/src/tiva: Fix some errors in macro names. 2019-01-12 16:30:21 -06:00
Gregory Nutt
7369105daf arch/arm/src/tiva/hardware: Add ADI 2 REFSYS header file. 2019-01-12 11:32:35 -06:00
Gregory Nutt
c3df1b23d3 arch/arm/src/tiva: Fix a few of the many CC13xx compile problems. There are many more. 2019-01-12 09:20:45 -06:00
Gregory Nutt
5299e87b2c Squashed commit of the following:
arch/arm/src/tiva/cc13xx:  Trim code now kind of looks like NuttX code.  But does not yet compile.

    arch/arm/src/tiva/cc13xx:  The first few, feeble steps toward getting the overall trim files compatible with the requirements of the NuttX coding standard.

    arch/arm/src/tiva/cc13xx:  Replace last of TI hardware access macros with NuttX hardware access macros.

    arch/arm/src/tiva/cc13xx: Change TI HWREGB to NuttX getreg8 or putreg8 in trim logic.

    arch/arm/src/tiva/cc13xx: Change TI HWREGBITW to NuttX getreg32/putreg32 sequence in trim logic.

    arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h:  Completes the DDIO OSC header file.

    cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h:  Updated, but still not finished.

    arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h:  Add DDI0 OSC header file.  Still a work in progress. Does not yet conform to the NuttX coding standard.

    Change _M and _S to _MASK and _SHIFT.

    Some minor improvements.

    Clean up typos in some comments.

    Run all new files against tools/indent.sh

    arch/arm/src/tiva/cc13xx:  Bring in trim files from SDK.  Convert to C-style comments, lowercase hex contants.  Remove Windows-style line endings.
2019-01-12 08:43:45 -06:00
raiden00pl
f8c18e09e9 Merged in raiden00/nuttx_lora (pull request #811)
stm32f0l0: fix GPIO EXTI lines assignment for STM32 M0

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-12 07:59:31 +00:00
Petro Karashchenko
95f6c13c61 With these changes, I am able to access NSH on Beaglebone Black.
I still observe data abort crash if I compile the code with optimization enabled.

The next steps are to investigate the optimization issue and add Watchdog module. Currently, NSH does not run for a long time ;)

  arch/arm/src/am335x/am335x_irq.c:  Correct interrupt processing routine
  configs/beaglebone-black/nsh/defconfig:  Enable debug compilation options. Otherwise data abort crash is observed
  arch/arm/src/am335x/am335x_lowputc.c and arch/arm/src/am335x/chip/am335x_uart.h:  UART-related cosmetic changes
  arch/arm/src/am335x/am335x_timerisr.c:  Make sure that Timer 1 interrupts are disabled before any access to peripheral registers
2019-01-09 16:21:20 -06:00
raiden00pl
9194c68f23 Merged in raiden00/nuttx_lora (pull request #810)
stm32f0l0: SPI and GPIO EXTI support

arch/arm/src/stm32f0l0: add support for GPIO EXTI

configs/nucleo-l073rz: support for nrf24l01

configs/b-l072z-lrwan1/include/board.h: add note about onboard Murata CMWX1ZZABZ-09 module and definitions for available peripherals

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-09 20:38:00 +00:00
Jussi Kivilinna
d7f1dc56cf STM32F7 and L4 I2cC: Use clock_t for ticks instead of uint32_t to hold system time. 2019-01-09 07:28:34 -06:00
Gregory Nutt
a7f75b4ee8 Revert "arch/: Fix an error found in build testing. The protoype of mpu_log2regionfloor() changed; an additional parameter was added. However, none of the calls to mpu_log2regionfloor() were updated to pass the new, additional parameter."
Commit 8b63d02309 was reverted.  This related commit must now also be reverted to avoid compilation errors.

This reverts commit e8270defc9.
2019-01-08 15:21:29 -06:00
Gregory Nutt
c59ccd4083 arch/arm/include/amm335x: Trivial, cosmetic changes after review 2019-01-08 08:15:04 -06:00
Petro Karashchenko
0f38c331e7 arch/arm/include/amm335x: Add header files needed for build. 2019-01-08 08:06:26 -06:00
Gregory Nutt
b4f488e8bf Revert "arch/arm/armv7-m: MPU: mpu_log2regionceil needs take into account the offset too"
Masayuki Ishikawa reports that this commit breaks ALL PROTECTED mode builds.

It violates the basic requirements of the use of the MPU in protected mode.  Those basic requirements are:

1. The MPU region must be aligned to the base address of the memory region being mapped (it may NEVER extend before the memory region).  That is, the following MUST always be zero:

   (base & ((1 << l2size) - 1))

2. The MPU region must never extend beyond the end of the memory region.  That is, the following must be true:

   size >= (1 << l2size)

This reverts commit 8b63d02309.
2019-01-08 07:46:19 -06:00
lihaichen
8e7f8bbde3 Merged in lihaichen/nuttx/stm32_tim (pull request #806)
fix stm32 tim bug

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-07 13:53:02 +00:00
Petro Karashchenko
a0ba6a12a4 arch/arm/src/am335x/chip/am3358_memorymap.h: Code cleanup for beaglebone black port
arch/arm/src/am335x/am335x_irq.c: Uncomment code for interrupt enable/disable
2019-01-06 14:24:39 -06:00
Petro Karashchenko
1727e47d2e Initial changes for BeagleBone Black board support (TI AM335x family based on Cortex-A8)
Squashed commit of the following:

Author: Gregory Nutt <gnutt@nuttx.org>
    Many small changes related to coding style.

Author: Petro Karashchenko <petro.karashchenko@gmail.com>
    configs/beaglebone-black:  Adds initial support for the BeagleBone Black board.
    arch/arm/src/am335x:  Adds initial support for the TI AM355x family.
2019-01-06 09:05:38 -06:00
Petro Karashchenko
5e48ca91fc arch/arm/src/armv7-a/mmu.h: Fix some typos; Use TLBIMVA vs TLBIMVAAIS to invalidate the Cortex-A8 cache. 2019-01-06 07:49:21 -06:00
Petro Karashchenko
dff605a5b8 arch/arm/src/armv7-a/arm_mmu.c: Fix end address calculation for mmu_invalidate_region() API 2019-01-06 07:38:04 -06:00
Ken Pettit
a97c4d8644 drivers/net/telnet.c: Add NAWS and poll interface to telnet for screen size negotation used with termcurses.
arch/arm/src/samv7/sam_serial.c: Fix case where TTYS0 is not defined.
2019-01-05 12:14:05 -06:00
Masayuki Ishikawa
f1c806526f Merged in masayuki2009/nuttx.nuttx/lc823450_spif_boot (pull request #801)
lc823450 spif boot

* arch/arm/src/lc823450: Add support for SPI flash boot

    Also, remove unnecessary code for the SPI flash boot

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* configs/lc823450-xgevk: Add linker script for SPI flash boot

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-04 12:03:55 +00:00
Daniel Agar
2697b087c6 Merged in dagar/nuttx/pr-stm32_dma_v1_duplicate (pull request #800)
stm32_dma_v1.h remove duplicate DAC DMA defines for CONFIG_STM32_STM32F30XX

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-03 18:26:21 +00:00
Daniel Agar
3b55f35bb3 Merged in dagar/nuttx/pr-stm32f7_SPI_DMA_per_bus (pull request #798)
stm32f7 enable separate DMA per SPI configuration

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-02 18:50:40 +00:00
Gregory Nutt
a0a537a9f0 arch/arm/src/bcm2708 and arch/arm/include/bcm2708: Remove all support for the BCM2708/2835. This was added only for support of the Pi Zero board which was previously removed. The support was minimal and unverified. The removed files can still be found in the Obsoleted directory. 2019-01-02 12:15:07 -06:00
Gregory Nutt
1a85105d19 arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_ddi0_osc.h: Add DDIO OSC header file. 2019-01-02 10:12:10 -06:00
raiden00pl
a20e874883 Merged in raiden00/nuttx_pe (pull request #796)
arch/arm/src/stm32: unified naming for DAC interfaces

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-02 12:12:28 +00:00
Lwazi Dube
53ce088a54 arch/arm/include/tiva and src/tiva: Improve GPIO interrupt support by removing unnecessary, hard-coded per-MCU defines and using the existing Kconfig configuration options instead. 2018-12-31 07:19:30 -06:00
Gregory Nutt
c4dfb76b0d Fix some warnings found in build testing. 2018-12-30 16:05:28 -06:00
Gregory Nutt
b7c274c1ed arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c: Fix some errors I made in reviewing last patch 2018-12-30 13:09:18 -06:00
Lwazi Dube
9eefcf0cf4 arch/arm/src/tiva/common/lmxx_tm4c_gpioirq.c: Fix tiva gpio interrupts 2018-12-30 13:04:18 -06:00
Alan Carvalho de Assis
9fc4e6b0c4 arch/arm/src/samd2l2/sam_i2c_master.h: Export sam_i2c_master_initialize(int bus) to be used by board config. 2018-12-30 11:16:47 -06:00
Gregory Nutt
a01865ba0b arch/arm/src/tiva/hardware: Correct a misconception in CC13x0, CC13x2, and cc6x2 DDI header files. 2018-12-29 09:36:10 -06:00
Alexander Vasiliev
b02380c704 arch/arm/src/samd2l2, configs/samd20-xplained, samd21-xplained, saml21-xplained: Fix SAMD2L2 arch to use calibrated oscillator value. Now SAMD20 and SAMD21 should work fine without external crystal. Note that SAML21 Xplained board has an external crystal and doesn't need this change, unless you don't want to use the crystal. 2018-12-29 08:36:50 -06:00
Gregory Nutt
dffcddd82d arch/arm/src/tiva/hardware: Add CC13x0, CC13x2, and cc6x2 DDI header file. 2018-12-29 08:16:09 -06:00
Gregory Nutt
efb7ba7bea Add some conditional compilation to logic added with commit 1cf992ed04 to better 'idiot-proof' the LM3S support. 2018-12-28 19:08:17 -06:00
Lwazi Dube
1cf992ed04 arch/arm/src/tiva/: Add support for LM3S9B92 2018-12-28 16:03:25 -06:00
David Sidrane
24db683368 arch/arm/src/imxrt/chip/imxrt106x_pinmux.h: Add FLEXCAN3 to pinmux 2018-12-28 15:08:20 -06:00
Gregory Nutt
0047992349 arch/arm/src/tiva/hardware/cc13x2_cc26x2/: Add AON PMCTL header file. 2018-12-28 10:25:40 -06:00
Gregory Nutt
bd21176f8c arch/arm/src/tiva/hardware/: Add CC13x0, CC13x2, andd CC26x2 AON RTC header files. 2018-12-27 12:14:24 -06:00
Alexander Vasiliev
cdd42f6e5d arch/arm/src/samd2l2/chip: Adds a complete ADC header file for SAMD21 and a partially complete ADC header file for the SAML21. 2018-12-26 08:42:36 -06:00
Gregory Nutt
6fad6607bf arch/arm/src: Masayuki Ishikawa's change to go_os_start() should be applied to all MCU-specific start-up functions that support go_os_start(). 2018-12-25 08:14:55 -06:00
Masayuki Ishikawa
c5c8c3aab9 Merged in masayuki2009/nuttx.nuttx/fix_lc823450_start (pull request #793)
Fix lc823450 start

* arch/arm/src/lc823450: Use CONFIG_STACK_COLORATION instead of CONFIG_DEBUG_STACK

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch/arm/src/lc823450: Fix go_os_start() in lc823450_start.c

    I found a bug in go_os_start() that it returns immediately
    because it does not compare r1 to zero. This commit fixes
    this bug. Also, this commit fixes its description.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-25 13:58:43 +00:00
Gregory Nutt
6f418dd9f3 arch/arm/src/tiva/hardware/: Add VIMS header file. 2018-12-24 12:01:16 -06:00
Gregory Nutt
379a3b4bd5 arch/arm/src/tiva/hardware/: Add AON IOC header file. 2018-12-24 09:22:41 -06:00
Gregory Nutt
1b8a2aed08 arch/arm/src/samd5e5/sam_i2c_master.c: Alexander Vasiliev's fix to the SAMD21 I2C Master (commit b1110ba91c) should probably also be applied to the SAMD51 I2C Master which is identical. 2018-12-22 08:07:07 -06:00
Alexander Vasiliev
b1110ba91c arch/arm/src/samd2l2/sam_i2c_master.c: Corrects behavior of the I2C_M_NOSTART flag. Also adds a release a bus on RXNACK and corrects typo priv->flags to msg->flags as priv->flags is never set. 2018-12-22 08:03:29 -06:00
Gregory Nutt
86508a0e85 arch/arm/src/stm32/chip/stm32_dma_v1.h: Fix error: extra tokens at end of #undef directive [-Werror] 2018-12-20 12:35:55 -06:00
Gregory Nutt
101740a626 arch/arm/src/stm32/chip/stm32_dma_v1.h: Add missing DMA channel configuration. arch/arm/src/stm32/stm32_adc.c: Fixes a typo. 2018-12-20 10:56:42 -06:00
Gregory Nutt
9c5d0003aa arch/arm/src/stm32f0l0: Bring in missing RCC file. Now there are two files implementing stm32_clockonfig(). Yech. ./setenv.sh Also fixes several compile issues. The STM32L0 boards now compile and link without error. 2018-12-20 08:37:09 -06:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00
Mateusz Szafoni
5130f366e2 arch/arm/src/stm32: Add support for DMA v1 CSELR support. 2018-12-19 09:28:30 -06:00
Sebastien Lorquet
a7257eff52 This change:
- Avoids the use of up_aesinitialize() entirely, which resolves dependency problems, because this function does not make sure that an actual hardware aes implementation was made available: each SoC is now responsible to ensure the AES hardware is initialized before first use. This applies to lpc43xx, stm32 and sam34.
    - Remove definitions of the NEVER used aes_init and aes_update operations. The new AES API will be more suitable.
    - Change the unusual naming in stm32 (avoiding possible naming clashes)
    - Change the unusual naming in sam34 (avoiding possible naming clashes)
    - Add some FAR to pointers and enforce the 80 col limit in stm32 and sam
2018-12-19 08:42:48 -06:00
Gregory Nutt
db24306435 arch/assertion logic: Fix additional places where the test for an IDLE task is incorrect. It is not invalid in all configurations to check for PID==0. However, the logic fixed in these places lackes sufficient intelligence to find the right stack for the CPU IDLE thread and could still show the wrong stack. 2018-12-18 17:45:46 -06:00
Gregory Nutt
ec9265aa95 arch assertions: Correct duplicated logic from commit dbf01d12b7. Checking for PID == zero is not a valid way to test for the IDLE task in all configurations! This is only true in the single CPU configuration. In multiple CPU configurations, there will be a separate IDLE task for each CPU with a different PID. 2018-12-18 17:35:42 -06:00
Mateusz Szafoni
a9626f3ad3 /arch/arm/src/stm32: Bring in some mostly cosmetic updates from PR783 (most of the PR is going to the stm32f0l0 directory). 2018-12-18 10:53:49 -06:00
David Sidrane
f47e0da90c arch/arm/src/stm32f7/stm32_sdmmc.c: Fix build error if CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not defined. 2018-12-18 07:40:42 -06:00
Masayuki Ishikawa
0d20c39250 Merged in masayuki2009/nuttx.nuttx/fix_lc823450_related (pull request #789)
Fix lc823450 related

* configs/lc823450-xgevk: Fix IOB params in rndis/defconfig

    These prameters work for HTTP audio streaming.

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c

    This change fixes heap size and also implements up_addregion().

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-18 05:30:31 +00:00
Lwazi Dube
cf453cb84b arch/arm/Kconfig: Fix many warnings introduced by stm32f0l0 2018-12-17 10:51:51 -06:00
Gregory Nutt
b4ab6bc7f2 Squashed commit of the following:
arch/arm/src/stm32f0l0:  Some fixes for a clean build.  Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine.  Sometimes kconfig errors are difficult to spot.  I would appreciate it anyone can spot the issue.

    arch/arm/src/stm32f0l0/hardware:  Rename the chip directory to hardware.  This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.

    configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery:  Update for all of the naming changes made in arch/arm/src/stm32f0l0

    arch/arm/include/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.

    arch/arm/src/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
2018-12-16 10:50:16 -06:00
Lwazi Dube
4a1400dc6e arch/arm/src/tiva/common/tiva_hciuart.c: Port bluetooth HCI uart interface from stm32 to tiva 2018-12-15 15:47:49 -06:00
Gregory Nutt
69940ade76 Some minor improvement to some comments. 2018-12-15 10:47:38 -06:00
Gregory Nutt
791be4566e arch/arm/src/tiva/cc13xx/cc13xx_chipinfo.c: Add chip info source file. This will be needed later in order to manage trimming and power setup. 2018-12-14 13:37:54 -06:00
Gregory Nutt
5c9e72f99d Squashed commit of the following:
arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h:  Adjust cloned CC13x9 FCFG1 header file so that it reflects reality.

    arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h:  Add CC13x0 FCFG1 header file.  Initial commit is the same as the CC13x2/CC26x2 FCFG1 header with a few name changes.

    arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_fcfg1.h:  Initial FCFG1 header file for the cc13xx/cc26xx family.
2018-12-13 12:35:39 -06:00
Marc Rosen
21328c528c drivers/mtd/at25.c: Fixed missing opening parenthesis. 2018-12-13 08:12:50 -06:00
David Sidrane
fd68d74264 arch/arm/src/stm32/Kconfig: USB Host is an option. 2018-12-12 18:27:04 -06:00
Mateusz Szafoni
400215669a Merged in raiden00/nuttx_pe (pull request #782)
arch/arm/src/stm32/Kconfig: simplify ARM core selection logic

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-12 12:33:36 +00:00
Gregory Nutt
f67e27cf76 arch/arm/src/tiva/hardware: Add CCFG register definition files. 2018-12-11 09:35:07 -06:00
Gregory Nutt
ab6b7e4c2d arch/arm/src/tiva/hardware: Add some things missed in FLASH register definition files. 2018-12-10 17:05:02 -06:00
Gregory Nutt
c8fe96e2d6 arch/arm/src/tiva/hardware: Add CC13xx FLASH header file. 2018-12-10 14:32:21 -06:00
Gregory Nutt
eb015e10d5 Fix some warnings found in build testing. 2018-12-09 18:14:25 -06:00
Gregory Nutt
c125f65d81 arch/arm/src/tiva: Fix another Tiva-related error found in build testing. 2018-12-09 14:06:45 -06:00
Gregory Nutt
9d74e87167 arch/arm/src/tiva: Fix more Tiva-related errors found in build testing. 2018-12-09 14:00:44 -06:00
Gregory Nutt
31cf8c67a0 arch/arm/src/tiva: Fix an error found in build testing. 2018-12-09 13:48:53 -06:00
Gregory Nutt
b2664c3650 arch/arm/src/tiva: Flesh out a little more of the GPIO interrupt logic 2018-12-09 13:35:42 -06:00
Gregory Nutt
eaf62096ee Squashed commit of the following:
arch/arm/src/tiva:  Add GPIO IRQ stubs for clean compile

    arch/arm/src/tiva/cc13xx:  Add build framework for CC13xx GPIO interrupts.  Change prototypes of some GPIO IRQ interfaces so that the function prototype is common between LM3S, LM4F, TM4C, and CC13xx.
2018-12-09 11:20:14 -06:00
Mateusz Szafoni
b3b53a6dd4 Merged in raiden00/nuttx_pe (pull request #779)
Master

configs/nucleo-f334r8: add example for the SPWM generation (custom STM32 PWM usage)

arch/arm/src/stm32/stm32_pwm: fix compilation errors if the upper-half PWM logic is not enabled

include/nuttx/drivers/pwm.h: remove dependency on CONFIG_PWM for the upper-half PWM header. This allows compilation for the lower-level PWM drivers even if the upper-half PWM logic is not used.

arch/arm/src/stm32/stm32_tim.c: fix compilation error if there is no TIM8

configs/nucleo-f334r8/highpri: remove the upper-half ADC from configuration

configs/nucleo-f302r8/highpri: remove the upper-half ADC from configuration

configs/stm32f429i-disco/highpri: remove the upper-half ADC from configuration

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-09 16:31:57 +00:00
Gregory Nutt
29b9b3b68b Squashed commit of the following:
arch/arm/src/tiva:  Add CC13xx GPIO driver plus various fixes for clean compilation.

    arch/arm/src/tiva/ and configs/launchxl-cc1312r1:  Make type of the GPIO pin configuration an abstract type so that CC13xx MCUs can share the same GPIO function prototypes and usage model.
2018-12-09 09:06:57 -06:00
Gregory Nutt
7113cef6b7 Squashed commit of the following:
arch/arm/src/tiva:  Add CC13xx logic to enable power domains needed by peripherals and to enable clocking to peripherals.

    arch/arm/src/tiva:  Rename some header files so that they are unique in order to avoid including the wrong file.  Fix various compile issues found during some initial trial builds.

    arch/arm/src/tiva:  Add CC13xx clock enable and power enable macros that are backward compatible with lm/tm4c macros.
2018-12-09 07:03:10 -06:00
Mateusz Szafoni
b9a1969122 *Merged in raiden00/nuttx_pe (pull request #778)
Improvements in STM32 ADC

arch/arm/src/stm32/stm32_adc.c: start conversion on startup is now possible if TIM triggering selected. This can be useful to start ADC TIM conversion for ADC IPv2 when opening ADC device.

arch/arm/src/stm32/stm32_adc.c: fix compilation errors for chips with one ADV TIM

configs/nucleo-f303re: refresh ADC example

configs/nucleo-f334r8: refresh ADC example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-09 00:09:01 +00:00
Ouss4
ed08cbc7f7 STM32 I2C (alternate): Remove the extra NONE event from the trace dump output. 2018-12-08 13:06:47 -06:00
Ouss4
af11d47b01 STM32F3 and STM32F4 I2C: Remove the extra NONE event from the trace dump output. 2018-12-08 13:04:46 -06:00
Ouss4
5de4fef4f2 arch/arm/src: In most I2C drivers, correct upper index value in I2C trace dump. Eliminates the extra NONE event from the trace dump output. 2018-12-08 12:49:58 -06:00
Gregory Nutt
a2a7b1d664 arch/arm/src/tiva: Add CC13xx PRCM support library. 2018-12-08 12:35:15 -06:00
Gregory Nutt
6371b970f9 arch/arm/src/tiva/hardware: Finished CC13xx PRCM register definition header files. 2018-12-07 17:08:57 -06:00
Gregory Nutt
a47224723e arch/arm/src/tiva/hardware: WIP CC13xx PRCM header files. 2018-12-07 08:00:19 -06:00
Gregory Nutt
931a0dc8f4 STM32F7 and STML4: Ooops removed a little too much in the last commit. 2018-12-06 13:50:04 -06:00
Gregory Nutt
5832c150d7 arch/arc/src: Remove all driver-specific logic to set the interrupt priority. There is no good reason to change the interrupt priority unless you just want to debug a difficult problem. OR is you want to use high priority interrupts. In that case the specific interrupt priorities will need to be set by board-specific logic. 2018-12-06 13:34:41 -06:00
Mateusz Szafoni
ca4ef377fb Merged in raiden00/nuttx_pe (pull request #776)
arch/arm/include/stm32/chip.h: fix typo

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-06 17:52:11 +00:00
Gregory Nutt
16291c8965 arch/arm/src/tiva/Make.defs: Yet another problem found in build testing. The CC13xx changes really shook up the Tiva builds. 2018-12-06 08:59:41 -06:00
Gregory Nutt
5502ca9efb arch/arm/src/tiva/lm: Fix an improperly named header file. 2018-12-06 08:52:17 -06:00
Gregory Nutt
619998e32d arch/arm/include/tiva/tm4c_irq.h: Fix a typo introduced in recent changes. Found in build testing. 2018-12-06 08:42:24 -06:00
Gregory Nutt
44b57a2932 arch/arm/src/tiva/hardware: Correct an error in header guard definitions found in build testing. 2018-12-06 08:30:50 -06:00
Gregory Nutt
2c2db2d780 arch/arm/src/tiva/hardware: Correct some include paths found in build testing. 2018-12-06 08:22:51 -06:00
Gregory Nutt
d68bff3256 arch/arm/src/tiva: A few more changes to get past pin definition compile problems. 2018-12-06 08:09:15 -06:00
Dave Marples
df2241f816 This commit changes the lazy and non-lazy exception handler to remove a couple of cpsid instructions from them on ARMv7-m. If my understanding is correct then these interrupt manipulations aren't doing anything anyway because prioritization stops secondary interrupts arriving and, even if they did work, they would have introduced race conditions for the period of time between the interrupt arriving and further interrupts being disabled. 2018-12-06 07:20:21 -06:00
Gregory Nutt
0a8aa537a2 arch/arm/src/tiva/cc13xx/cc13xx_gpio.h: Add CC13xx GPIO encoding file. 2018-12-05 17:42:50 -06:00
Gregory Nutt
dcf4b4b689 STM32H7 and STM32L4: Applied David Sidrane's I2C to:
arch/arm/src/stm32h7/stm32_i2c.c
   arch/arm/src/stm32l4/stm32l4_i2c.c

Those easy because F7 patch applied with no problem (after changing path and file names appropriately).  The patch could not be appleed to the following.  The logic is different.  I don't know if a similar change is needed there or not.

   arch/arm/src/stm32/stm32f30xxx_i2c.c
   arch/arm/src/stm32/stm32f40xxx_i2c.c
   arch/arm/src/stm32/stm32_i2c.c
   arch/arm/src/stm32/stm32_i2c_alt.c
   arch/arm/src/stm32f0/stm32f0_i2c.c
2018-12-05 15:38:42 -06:00
David Sidrane
f43451b7df Merged in david_s5/nuttx/master_f7_i2c (pull request #774)
stm32f7:i2c out of bounds access on priv->msgv

Error in if statment. It was checking for msgc > 0.
   If message count is 1, only index 0 is valid on
   priv->msgv. There for random values in memory were
   used to set next_norestart.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 21:24:59 +00:00
Gregory Nutt
d830b323dd arch/arm/src/tiva: Starting to work through alternate function pin configuration and GPIO interrupts for C13xx. Works a lot differently than the LM and Tiva parts. 2018-12-05 15:17:22 -06:00
Gregory Nutt
051e37bce2 arch/arm/src/tiva/hardware: Add CC13xx IOC register definitions. 2018-12-05 13:02:29 -06:00
Gregory Nutt
cdb6e16ad3 arch/arm/src/tiva: Add cc13xx startup logic, rename up_lowsetup->tiva_lowsetup, fixes to cc13xx GPIO header files, break up tiva_timer.h to support future cc13xx timer register definitions, cc13xx has no sysctl block. 2018-12-05 10:08:34 -06:00
Mateusz Szafoni
428b625428 Merged in raiden00/nuttx_pe (pull request #773)
arch/arm/include/stm32/chip.h: remove redundant STM32 family definitions. It is already done in arch/arm/src/stm32/Kconfig

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 11:46:36 +00:00
Gregory Nutt
7aaa5a800d arch/arm/src/tiva: Remove option CONFIG_TIVA_BOARD_CLOCKCONFIG. It is not used and unnecessary. Fix some naming. up_clockconfig() is inappropriate. Change tiva_clockconfig() to tiva_clock_reconfigure() then we can change up_clockconfig() to tive_clock_configure(). 2018-12-04 18:15:46 -06:00
Gregory Nutt
9a68127e3e arch/arm/src/tiva: Remove CONFIG_TIVA_BOARD_EARLYINIT. The option is no long meaningfule. Also set the CC13xx SYSCLCK freqency to a fixed 48MHz. 2018-12-04 17:20:25 -06:00
Gregory Nutt
3d23c68c05 arch/arm/src/tiva: Add GPIO header files. Reoganized tiva_gpio.c so that we can also handle the cc13xx GPIO which is very different. 2018-12-04 13:16:52 -06:00
Gregory Nutt
4d2c47a01d arch/arm/src/tiva/hardware: Break up tiva_gpio.h and place in MCU-specific sub-directories. This necessary to later develop Simplelink-specific GPIO header files. 2018-12-04 10:21:19 -06:00
Gregory Nutt
b2013df856 /arch/arm/src/tiva/hardware: Add CC13x0 and CC13x2 UART header files. 2018-12-04 08:40:29 -06:00
Gregory Nutt
c9ca9ced72 arch/arm/src/tiva/hardware: Move UART header files into sub-directories to make space for the SimpleLink UART header files. 2018-12-04 07:44:24 -06:00
Gregory Nutt
7d8f6625e3 arch/arm/src/tiva: Use naming sysctrl vs syscontrol be better match TI documentation. Combine hardware/cc13x2_cc26x2_v* directories. 2018-12-04 07:32:53 -06:00
Juha Paalijärvi
1afe4676e2 arch/arm/src/stm32f0/stm32f0_clockconfig.c: Fixes the problem in GPIO port clocks. Only port A clock was enabled although the comment states otherwise. 2018-12-04 06:50:32 -06:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Gregory Nutt
8aeeb1d8d3 arch/arm/src/stm32/stm32_adc.c: Eliminate a new warning found in build testing 2018-12-03 14:49:49 -06:00
Gregory Nutt
a641cb2ad8 configs/launchxl-cc1312r1/: Add a configuration for the LAUNCHXL-CC1312R1 board. This is a very stripped down configuration. It was needed to support verifiction of the CC13xx configuration logic and will be needed to support completion of the CC13xx port. 2018-12-03 13:25:31 -06:00
Gregory Nutt
8983f1c82e STM32F7, STM32H7, and STM32L4: Port Dave Marples STM32 fix to other STM32 spi drivers 2018-12-03 13:24:42 -06:00
Gregory Nutt
ee058683c6 arch/arm/src/tiva/hardware: Bring in memory map header files for the CC13x0 and CC13x2. 2018-12-03 09:10:05 -06:00
Gregory Nutt
ffc7dbf36b arch/arm/include/tiva: Add support for cc13xx interrupts. arch/arm/src/armv7-m: Add FPB header file. 2018-12-03 07:26:02 -06:00
Dave Marples
ff508f9b12 arch/arm/src/stm32/stm32_spi.c: Correct some compile problems introduced with 8328539534. 2018-12-03 07:15:40 -06:00
Mateusz Szafoni
db799e857c Merged in raiden00/nuttx_pe (pull request #772)
arch/arm/src/stm32/stm32_adc.c: refactor adc_reset. It should be easier to maintain this code if it's divided into smaller functions

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 18:34:02 +00:00
Gregory Nutt
ab974488d5 arch/arm/src/tiva/hardware: Remove annoying warnings 'No flash dimensions defined for selected chip.' 2018-12-02 07:58:12 -06:00
Dave Marples
8328539534 drivers/spi/Kconfig and include/nuttx/spi/spi.h: Extend the HW features supported by SPI. It now supports a deffered DMA trigger hardware configuration. arch/arm/src/stm32/stm32_spi.c: Implements the new deferred DMA trigger feature. 2018-12-02 07:30:55 -06:00
Mateusz Szafoni
d2b98cc150 Merged in raiden00/nuttx_pe (pull request #771)
Use STM32 DMA IP core version instead of chip family names and some minor improvements

arch/arm/src/stm32/chip/stm32_adc.h: raise error if two IP cores seleceted

libs/libdsp/Kconfig: cosmetic change

arch/arm/src/stm32/Kconfig: hide TIMER menu, HRTIM menu and USB Host debug menu if peripherals not enabled

configs/stm32f429i-disco/highpri/defconfig: fix configuration warning

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 11:49:25 +00:00
Mateusz Szafoni
7c77eb738e Merged in raiden00/nuttx_pe (pull request #770)
configs/nucleo-f207zg, configs/nucleo-f103rb: add ADC and PWM examples; arch/arm/src/stm32_adc.c: there is no DMA CFG bit for the basic IPv1 ADC

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-02 01:24:36 +00:00
Gregory Nutt
f0e6e06a37 Squashed commit of the following:
arch/arm/src/tiva/hardwar:  Move LM3S and LM4F include files to hardware/lm/ sub-directory.  Move all TM4C header files files to hardware/tm4c/ sub-directory.

    arch/arm:  Add basic configuration/build support for CC13xx parts.  Conditioned on EXPERIMENTAL.
2018-12-01 12:22:05 -06:00
Gregory Nutt
e7e54ccbf7 Re-arranging some Tiva directories to simply forthcoming SimpleLink port
Squashed commit of the following:

    arch/arm/src/tiva/Make.defs:  Trivial change to conditional VPATH.

    arch/arm/src/tiva:  Move LM3S and LM4F source files to lm/ sub-directory.  Move all TM4C source files to tm4c sub-directory.

    arch/arm/src/tiva and configs/:  Change include patch from chip/ to hardware/ in all Tiva files includes.

    arch/tmp/src:  Rename chip/ subdirectory to hardware/.  This is a better name since it does not conflict with other directory names and, well, we are going to be change a lot of the Tiva directory structure in the next few commits.
2018-12-01 09:29:47 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Alan Carvalho de Assis
3271049a9d arch/arm/src/armv7-m/itm.h: Fix missing space causing macro issues 2018-12-01 06:12:29 -06:00
Gregory Nutt
05b6a19a81 arch/arm/src/max326xx/max32660/max32660_spim.c: Add support for low-level register I/O debug output. Fix some backard clrbit/setbit arguments to the modifyreg function. SPI transfer still stalls. 2018-11-30 16:44:48 -06:00
Gregory Nutt
67f196fcf8 configs/max32660-evsys: Added support for an SPI-based micro-SD card. Does not yet work (SPI hangs with no data transferred). 2018-11-30 15:12:38 -06:00
Gregory Nutt
86a67fa3e8 Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_spim.c:  SPI0 master mode support is complete (sans DMA and completely untested).  configs/max32660-evsys/src:  Add framework for SPI support.

    arch/arm/src/max326xx/max32660/max32660_spim.c:  Fleshes out some of the data transfer logic.  More needs to be done.  Also removes leveraged DMA support.  It will be a long time (if ever) before DMA is supported.  No point in dragging all of that bogus logic around.
2018-11-30 12:48:46 -06:00
Gregory Nutt
6d285cfed1 arch/arm/src/max326xx/max32660: Fix some confusion. SPI0 and SPI1 are not the same type of peripheral. SPI0 is SPI17Y; SPI1 is SPIMMS. Add basic SPI0 interrupt handling logic. 2018-11-29 18:32:40 -06:00
Gregory Nutt
9203815e4c arch/arm/src/max326xx/max32660/max32660_spim.c: Add a little more SPI logic. Still not complete. 2018-11-29 15:38:13 -06:00
Gregory Nutt
0841602739 Beginning of an SPI driver for the MAX32660. Incomplete. Does not even compile correctly yet.
Squashed commit of the following:

    arch/arm/src/max326xx/max32660/max32660_spim.c: A few updates tot he SPI master driver.  Still incomplete and does not even compile.

    Update some comments

    arch/arm/src/max326xx:  Clean up some general build issues.  Still STM32 code posing as MAX32660.

    arch/arm/src/max326xx:  Starting SPI driver.  Initial commit is just the STM32 SPI driver with name changes.
2018-11-29 12:12:56 -06:00
Gregory Nutt
8a99b5969e arch/arm/src/max326xx: Fixes UART interrupt problems. With these changes, the NSH configuration appears stable and is no longer conditioned on EXPERIMENTAL. 2018-11-29 07:50:45 -06:00
Gregory Nutt
1710b96388 arch/arm/src/max326xx/max32660/max32660_serial.c: Using wrong register to check interrupt status. Still problems; I think we are not getting FIFO interrupts. 2018-11-28 17:44:20 -06:00
Gregory Nutt
a6682a9bef Squashed commit of the following:
arch/arm/src/max326xx and configs/max32660-evsys/src:  Fix some issues with GPIO setup of output pins.  Correct polarity of on-board LED output.  The on-board LED is now functional.

    arch/arm/src/max326xx: WFI instruction in IDLE loop seems to interfere with stability.  Commented out for now.  Needs to be investigated further.
2018-11-28 11:20:31 -06:00
Gregory Nutt
5da7dbaf98 rch/arm/src/max326xx/max32660/max32660_lowputc.c: Fix typo revealed only when flow control is enabled. 2018-11-27 17:49:44 -06:00
Gregory Nutt
d164a2cf5b Squashed commit of the following:
arch/arm/src/max326xx:  Fixes for GPIO configuration problems and serial driver problems.  I now get the NuttShell prompt (if I also band on ENTER to force all of the characters out).  Progress, but not yet ready.

    configs/max32660-evsys:  Support CONFIG_BOOT_RUNFROMISRAM=y.
2018-11-27 16:50:59 -06:00
Gregory Nutt
0820d0659b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_clockconfig.c: Fix an error in a register name.

    arm/src/max326xx/max32660:  Fix a few new compilation errors when DEBUG is enabled.
2018-11-27 14:47:49 -06:00
Gregory Nutt
c82032ba62 arch/arm/src/armv7-m: Make naming used in ARM register definition files a little more compatible with naming used in other header files. 2018-11-27 10:36:40 -06:00
Gregory Nutt
6435d6b952 configs/stm32f4discovery/src/stm32_critmon.c: include dwt.h, don't define DWT_CYCNT inline. 2018-11-27 09:39:09 -06:00
Gregory Nutt
da379a5c97 arch/arm/src/stm32f7/stm32_sdmmc.c: Fix a pre-processor error found in build testing. 2018-11-25 15:54:51 -06:00
Gregory Nutt
0af39e1493 arch/: Update all _exit() implementations for all architectures so that they correctly called the scheduler instumentation layer for the new task that runs when the old one exits. This missing instrumentation was confusing the Critical Section Monitor logic with uses this instrumentation to track the state of critical sections. 2018-11-24 18:20:57 -06:00
Gregory Nutt
6d9103b01a A few trivial changes from review of last PR. 2018-11-23 17:44:46 -06:00
Mateusz Szafoni
fc46135ebc Merged in raiden00/nuttx_pe (pull request #767)
Improvements in STM32 ADC, minor changes in STM32 PWM, DMA, HRTIM and add some highpri ADC examples

arch/arch/src/stm32/stm32_adc: fix RCC reset logic

arch/arch/src/stm32/stm32_adc: move sample time change functions to low-level ADC ops

arch/arch/src/stm32/stm32_adc: configurable ADC DMA mode (one shot mode, circular mode)

arch/arch/src/stm32/stm32_pwm: remove llops_get interface. We can use structure casting to get pwm low-level ops

arch/arch/src/stm32/stm32_pwm: add timer enable/disable and frequency update to low-level ops

arch/src/arm/stm32: remove redundant stm32f33xxx_dma.c

arch/arm/src/stm32/stm32f40xxx_dma.c: add interfaces to interact with highp priority DMA interupts

arch/src/arm/stm32/stm32_hrtim: do not enable timers on startup if option from Kconfig selected and add interface to enable/disable timers

arch/src/arm/stm32/stm32_hrtim: fix some warnings

configs/nucleo-f334r8/highpri: update configuration due to changes in stm32_adc

configs/stm32f334-disco/buckboost: update configuration due to changes in stm32_adc

configs/nucleo-f334r8/highpri: add support for ADC injected sequence, add triggering from TIM1

configs/nucleo-f302r8/highpri: add high priority ADC interrupts example

configs/stm32f429i-disco/highpri: add high priority ADC interrupts example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-23 23:33:45 +00:00
Gregory Nutt
1b63f66106 arch/arm/src/max326xx/max32660/max32660_clockconfig.c: Fix a logic error. Move logic that disables clocks to the end of the configuration. They might be needed by the previous clock configuration. 2018-11-22 15:01:18 -06:00
Gregory Nutt
22de66d553 arch/arm/src/max326xx/max32660/max32660_wdt.c: Fix alarm delay calculation. 2018-11-21 17:54:36 -06:00
Gregory Nutt
9ca2cde234 arch/arm/src/max326xx: Fix some misthinking in the last commit. 2018-11-21 15:23:05 -06:00
Gregory Nutt
c7cb4fa594 arch/arm/src/max326xx: Add missing function to get the alarm time. 2018-11-21 15:06:02 -06:00
Gregory Nutt
49ed9cac86 arch/arm/src/max326xx: Work-in-progress RTC driver for the MAX32660 2018-11-21 12:31:15 -06:00
Gregory Nutt
09f4dee6bc All network drivers! Change pre-processor logic that selects the high priority work queue or gives preferential treatment to the high priority work. All network logic must run on the low priority work queue! Or suffer the consequences. 2018-11-21 07:57:26 -06:00
Gregory Nutt
b69957ef5f arch/arm/src/max326xx/max32660/max32660_wdt.c: Another design simplication. 2018-11-21 06:57:29 -06:00
Gregory Nutt
2797d5fc49 arch/arm/src/max326xx/max32660/max32660_wdt.c: Design fixes to watchdog timer. 2018-11-20 17:38:00 -06:00
Gregory Nutt
84e6510de5 arch/arm/src/max326xx: Add the first, untested cut of an watchdog timer driver. 2018-11-20 17:13:35 -06:00
Bob Feretich
c6851201c0 This commit adds a new function arch_invalidate_dcache_by_addr(). It takes the same parameters as arch_invalidate_dcache(), but performs invalidation of only the lines in cache that need to be invalidated. This new function could be used as a a direct replacement for arch_invalidate_dcache().
The user of this invalidation are mmcsd_sdio currently.  The mmcsd_sdio driver makes calls for dcache invalidation through the chip specific architecture function SDIO_DMARECVSETUP(). I changed the arch/arm/stm32f7 chips to use arch_invalidate_dcache_by_addr() instead of arch_invalidate_dcache().

This commit includes additional changes to mmcsd_sdio.c.  I created SDIO_DMADELYDINVLDT() (DMA delayed invalidate) to invalidate store-into mode dcaches after the DMA transfer.  I have been using SDIO_DMADELYDINVLDT() for several weeks now and it has fixed the problems that I previously reported regarding non-cache aligned buffer invalidation errors (for my store-through dcache). However, it does not permit use of unaligned DMA buffers for store-into mode dcaches.

SDIO_DMADELYDINVLDT() is a NoOp unless the chip specific Kconfig file selects CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT. I have modified all the stm32f7 chips to select it.
2018-11-20 14:03:42 -06:00
Gregory Nutt
bdb60ac2f7 arch/arm/src/stm32/stm32_adc.c: Very mysterious. Several configurations now fail to build stm32_adc.o. This chante avoids those build failures, yet I see no code changed in recent months that should affect this. Any insights anyone? 2018-11-20 12:29:37 -06:00
Gregory Nutt
37f994207d arch/arm/src/max326xx/max32660: Some rather minor updates from comparison of my board port with logic provided by Maxim Integrated. 2018-11-20 12:02:15 -06:00
Gregory Nutt
86d7f39a42 arch/arm/src/max326xx: Rename the chip subdirectory to hardware. The include paths were getting too mind boggling with two directories named chip. Should do this for the other architectures as well. 2018-11-20 11:20:58 -06:00
Gregory Nutt
b9903dc8c8 arch/arm/src/max326xx: Finish DMA implementation. Clean up compile issues when DMA, GPIO interrupts are enabled. 2018-11-20 11:14:11 -06:00
Gregory Nutt
7a45fc6f1c arch/arm/src/max326xx: Add framework for MAX326XX standard DMA support. 2018-11-20 08:09:03 -06:00
David Sidrane
e73228395f Merged in david_s5/nuttx/master_imxrt_headers (pull request #763)
imxrt:Add ADC chip header

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-20 00:24:58 +00:00
Gregory Nutt
03cd52a5a2 arch/arm/include/max326xx: Add missing MAX32660 interrupt vectors. arch/arm/src/max326xx: Add missing MAX32660 GPIO interrupt handler. 2018-11-19 18:02:57 -06:00
Gregory Nutt
7854a18ece arch/arm/src/max326xx: Finish of the serial driver. Add support for the MAX626xx instruction cache. 2018-11-19 14:36:32 -06:00
Gregory Nutt
34123867c9 arch/arm/src/max326xx: Fleshes out logic in max32660_lowputc.c 2018-11-19 13:02:49 -06:00
Gregory Nutt
1d2a69539b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_serial.c:  Add a mostly commented out serial driver.  With this, we can accomplish a complete build with many warnings for 'Missing logic'
    configs/max32660-evsys/src/max326_button.c:  Add support for the on-board button.
    arch/arm/src/max326xx:  Add a mostly empty max326_lowputc.c file mostly so that we can get further in the compilation.  Fixed several more compile errors revealed by this.
    arch/arm/src/max326xx:  Add peripheral clock control header file.
2018-11-19 10:47:28 -06:00
Eduard Niesner
b905888d2c arch/arm/src/stm32f7: Ported the QEncoder from F4 to F7 2018-11-19 07:51:41 -06:00
Lwazi Dube
9d0740e069 After commit 51b78034ac, my tiva console does not work - enter key produces garbage characters. This commit fixes the problem for me. 2018-11-18 18:03:39 -06:00
Gregory Nutt
dd3361a175 arch/arm/src/max326xx: Add more clock configuration options. 2018-11-18 17:54:01 -06:00
Gregory Nutt
fe0209eec2 arch/arm/src/max326xx: Add initial clock configuration logic. Needs verification. 2018-11-18 16:41:07 -06:00
Gregory Nutt
054db14dd2 arch/arm/src/max326xx: Add GCR register definition header file. Some feeble clock configuration progress. 2018-11-18 13:06:24 -06:00
Gregory Nutt
169198ff38 arch/arm/src/max326xx/max32660: Add GPIO driver and GPIO interrupt support. 2018-11-18 11:22:51 -06:00
Zou Hanya
74cd8a53d5 Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>

    A few trivial updates from review of changes.

    Remove references to NRF52-PCA10040 from documentation.  Replace with NRF52-generic.

    Remove configs/nrf52-pca10040/  Replaced with configs/nrf52-generic.

Author: Zou Hanya <hanyazou@gmail.com>

    Improve LED handling #if~#endif in nrf52_autoleds.c and nrf52_userleds.c

    Add Adafruit Feather nRF52 board LED support

    Add Adafruit Feather nRF52 board

    Add nrf52-generic

    Replace 'pca10040' with 'generic'

    Copy from nrf52-pca10040 to nrf52-generic
2018-11-18 07:51:24 -06:00
Gregory Nutt
d2da0be4ee arch/arm/src/max326xx/chip: Add MAX32660 pin multiplexing header files. 2018-11-17 16:47:54 -06:00
Gregory Nutt
8e18e8ae54 arch/arm/src/max326xx: Get's past a few initial compile problems. Still a long road ahead. 2018-11-17 15:36:40 -06:00
Gregory Nutt
6d5c1ec64f arch/arm/src/max326xx: Add encodings that will be needed for GPIO pin configurations. 2018-11-17 15:01:21 -06:00
Gregory Nutt
61fd244fd3 Add support for the Maxim Integrated MAX32660-EVSYS board.
Squashed commit of the following:

    arch/arm/src/max326xx and configs/max32660-evsys/nsh/defconfig:  Work out some issues related to MAX326xx configuration.

    configs/max32660-evsys:  Add unverified board support framework.
2018-11-17 13:24:09 -06:00
Anthony Merlino
4d574e7a60 Merged in antmerlino/nuttx/stm32f2-write-protect (pull request #762)
arch/arm/stm32: stm32_flash_writeprotect supported the same for STM32F20XX as STM32F4XXX

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-17 17:29:29 +00:00
Gregory Nutt
a427a40bd0 arch/arm/src/max326xx/chip: Add MAX32660 SPIMSS register definition header files. 2018-11-17 11:21:29 -06:00
Gregory Nutt
1527720be9 arch/arm/src/max326xx/chip: Add SPI register definition header file. 2018-11-17 10:47:57 -06:00
Gregory Nutt
854f171c66 arch/arm/src/max326xx/chip: Add I2C register definition header file. 2018-11-17 09:19:17 -06:00