* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer
* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2
* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly
* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling
* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure
* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method
* arch: x86_64: Fix C alias of page table and GDT/IST
* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup
* arch: x86_64: Consolidate MSR definition in arch/arch.h
* arch: x86_64: Edit the way of handling GDT/IST in C into structures
* arch: x86_64: Correct the starting point of isr/irq stack
* arch: x86_64: Update up_initialize.c with the new initializing procedure
* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT
* arch: x86_64: Overhual of interrupt initialization procedure
* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]
* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure
* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug
* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot
* arch: x86_64: Correctly apply license header, comment and format code
* arch: x86_64: properly send a SIGFPE on floating point error
* arch: x86_64: Remove unused variable in up_restore_auxstate
* arch: x86_64: properly trash the processor with an infinite loop
* arch: x86_64: Fix typo in ISR handler causing ISR not handled
* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path
* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE
* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method
* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support
* arch: x86_64: update defconfigs
* arch: x86_64: rename qemu as qemu-intel64
* arch: x86_64: update Board readme
Kconfig files. Repartition some functionality. Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.
arch/z80/src/ez80/ez80_i2c.h: Rename arch/z80/src/ez80/ez80f91_i2c.h. It is sharable by both ez80f91 and ez80f92.
arch/z80/src/ez80/: Add logic to perform an additional level of interrupt redirection. This is necessary because the the interrupt handling is part of the loader FLASH-based logic. In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program. See ez809f2_loader.asm and ez80f92_program.asm
boards/z80/ez80/z20x/scripts: Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now). Update file headers to use Apache 2.0 license.
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution. And 2) it is too big.
The only storage on borard is the Winbond W25 SPI-bsed FLASH. This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.
boards/z80/ez80/z20x/configs: Added w25boot configuration
boards/z80/ez80/z20x/src: Add bootloader logic, w25_main.c. Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory. Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts: Rework scripts and configuration to support a bootloader and program build. The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1)
Based on the LPC43xx USB Device driver.
* imxrt:usbotg Nxstyle fixes
Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
board/z80/ez80/*/scripts/Make.defs: Fix optimization definition use in assembly flags. It was using the compiler optimization settings instead of the assembler optimization settings. Hence, enabling optimization would could cause assembler command line errors.
arch/z80/src/ez80/Toolchain.defs: Back out some work arounds. Now compiler optimization flags can again set set without assembler command line errors.
boards/z80/ez80/z20x/README.txt: Trivial update to size/optimization discussion.
The eZ80F92 interrupt controller is very different from the eZ80F91. The eZ80F91 has:
1. Four byte interrupt vectors
2. The vector base address register is 16-bit so the vector table can lie in RAM
Whereas the eZ80F92 has:
1. Two byte interrupt vectors
2. An 8-bit vector base address
This means that the vectors must lie in the first 16-bits of FLASH and there must be a "trampoline" to get to interrupt handlers outside of the first 64-Kb of FLASH.
arch/z80/src/ez80/Toolchain.defs: Correct some CFLAGS when optimization suppressed.
arch/z80/src/ez80/Kconfig arch/z80/src/ez80/ez80_emac.c: Remove configuration option for selecting EMAC RAM address. This is duplicated and possibly conflicting. The correct address for the RAM is provided in the linker command file. The RAM should be configured once and using this single definitions.
arch/z80/src/ez80/ez80_startup.asm and arch/z80/src/ez80/ez80f9*_init.asm. Move RAM and FLAH intialization out of MCU-specific logic to common start-up logic. We cannot call any functions until SRAM is initialized and the stack is properly initialized because the return address is stored on the stack. Use internal SRAM for the IDLE stack to avoid the chicken'n'egg problem.
boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj: Discuss build environments.
These makefiles set the the ZiLOG runtime libraries for the eZ80 parts. The setup was, however, conditioned on CONFIG_ARCH_EZ80_EZ80F91 and, so, was not working for the eZ80F92 part (CONFIG_ARCH_EZ80_EZ80F92).
With this change, the z20x board FINALLY builds and links correctly with no errors.
Don't use MCU selection from compiler. It appears that we must compile ez80f92 code as ez80f91 so the comiler MCU selection is incorrect. Instead, use the selected CPU part from the configuration.
arch/z80/src/ez80/Toolchain.defs: Update some CFLAGS to match CFLAGS from ZDS-II IDE. Apparently, we must say that the CPU is an eZ80F91 event when compiler for eZ80F92.
boards/z80/ez80/z20x: Update linker scripts.
* tools/zds/zds_Config.mk: Move boards/z80/ez80/scripts/eZ80_Config.mk to tools/zds/zds_Config.mk where it can be shared by other ZDS-II platforms.
* boards/z16/z16f: Duplicate changes for new ZDS-II support from ez80
* boards/z80/z8: Duplicate changes for new ZDS-II support from ez80
* arch/z16/src/z16f/Toolchain.defs: Create required Toolchain.defs file for Z16f
There are cases that USE_SERIALDRIVER is defined but USE_EARLYSERIALINIT not defined in some configs. So use ifdef USE_EARLYSERIALINIT to include up_earlyserialinit anyway.
An error was introduced from:
commit f982ee43db
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Tue Feb 18 09:55:04 2020 +0800
drivers/serial: Remove the lowconsole driver
Replace with the syslog console driver which has more capability than lowconsole
arch/z80/arc/ez80/Toolchain.sh: Move more common toolchain definitions from Make.defs.
boards/z80/ez80/scripts/eZ80_Config.mk: Move common defines that override tools/Config.mk to this new file.
This does not solve the ez80 build problem yet but does assure that when the solution is in place, it will automatically apply to all present and future ez80 configurations.
I was over-zealous in arch/z80/src/ez80/ez80f91_handlers.asm. I added space separatros around the '+' operators. Turns out that the ZDS-II assembler can't handle the spaces in that context.
The ez80f92 is similar to the currently supported ez80f91 except that is:
1. Has no PLL and has a maximum CPU frequency of only 20MHz
2. Has no Ethernet controller
3. Timers are different
4. Has no GPIO Port A
5. Timers are different
6. It comes in a smaller package
and other small differences.
This provided the architecture (only) support for the forthcoming z20x port.
* arch/arm/src/tiva/Make.defs: Compile only when enabled by configuration CONFIG_ARM_SEMIHOSTING_HOSTFS
* arch/arm/src/common/up_hostfs.c: Remove the ifdef conditional because it's redundant with the make logic.
Largely copy-and-paste from stm32f4discovery.
Also arch/arm/src/armv7-m/mpu.h: Ensure RBAR alignment
Fix crashes on init task startup I observed on qemu-system-arm -M lm3s6965evb.
And remove syslog_init_e because all initialization is later now and we don't
distinguish the initialition phase anymore after ramlog don't need special
initialize.
Because we can get the same function by CONSOLE_SYSLOG/syslog_console_init.
BTW, it isn't a good choice to use g_ramlogfops as /dev/console since nsh
will read back what it send out which will surprise most people.
it doesn't make sense that iob initialization is in up_initialize
but other memory components initialization is called in nx_start
Change-Id: Id43aeaa995f340c5943f59a0067a483ff3ac34a2
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG. The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
Currently up_allocate_heap() assumes that g_idle_topstack points
top of the heap memory. However, g_idle_topstack pointed incorrect
address in SMP mode which resulted in heap corruption. This PR
moves g_idle_topstack at the end of .noinit to avoid this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The benefit include:
1. Simplify the implementation
2. Support both tick and tickless automatically
3. No time drift in tickless mode
4. Support critmon arch API automatically
To avoid ps generate "Segmentation fault" because do_stackcheck
check the stack color if the stack size doesn't equal zero
BTW, it is better to set idle task stack size to zero since idle
task use the host thread and the stack size from config isn't the
actual value.
The benefits include:
1. Simplify the implementation
2. Support Ctrl+C automatically
3. Support poll automatically
4. Call pm_activity automatically
5. Save one polling thread
Call xxx_timer_initialize from clock subsystem to make timer ready for use as soon as possiblei and revert the workaround:
commit 0863e771a9
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Fri Apr 26 07:24:57 2019 -0600
Revert "sched/clock/clock_initialize.c: clock_inittime() needs to be done with CONFIG_SCHED_TICKLESS and clock_initialize should skip clock_inittime() for external RTC case since the RTC isn't ready yet."
This reverts commit 2bc709d4b9.
Commit 2bc709d4b9 was intended to handle the case where up_timer_gettime may not start from zero case. However, this change has the side-effect of breaking every implementation of tickless mode: After this change the tickless timer structures are used before they are initialized in clock_inittime(). Initialization happens later when up_initialize is called() when arm_timer_initialize().
Since the tickless mode timer is very special, one solution might be to
1. Rename xxx_timer_initialize to up_timer_initialize
2 Move up_timer_initialize to include/nuttx/arch.h
3. Call it from clock subsystem instead up_initialize
Basically, this change make timer initialization almost same as rtc initialization(up_rtc_initialize).
For now, however, we just need to revert the change.
* include: Introduce elf64.h and elf.h
Added elf64.h for 64bit ELF support and moved common definitions
from elf32.h to elf.h. Also introduced Elf_xxx to be used in
common libraries such as binfmt.
* binfmt, include, modlib, module: Add support for ELF64
Elf_xxx must be used instead of Elf32_xxx to support ELF64.
To use ELF64, CONFIG_ELF_64BIT must be enabled.
* binfmt, modlib: Add support for relocate address
* arch: risc-v: Add include/elf.h
* libs: machine: Add risc-v related files.
NOTE: Currently only supports ELF64
* boards: maix-bit: Add elf and posix_spawn configurations
* boards: maix-bit: Add support for module configuration
* S32K add support for Nxp drone boards
* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
commit 39bd9ff670
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date: Wed Jan 29 00:17:05 2020 +0900
sim: Prefix symbols with _ for non-ELF
Namely for Mach-O. Leave __CYGWIN__ case as it is.
