Commit Graph

54929 Commits

Author SHA1 Message Date
hujun5
d54bc8a9f8 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused up_cpu_pausereq
reason:
  To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
  after that we need to further implement "schedlock + spinlock".
changelist
  1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
  2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
  3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
  4 change up_cpu_pause_async to up_send_cpu_sgi

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
6392d5a6b3 xtensa: Replace the implementation of up_cpu_pause
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
fbed4ece2c x86_64: we should call x86_64_restorestate/x86_64_savestate
reason:
In x86_64, g_current_regs is still used for context switching.

This commit fixes the regression from https://github.com/apache/nuttx/pull/13616

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
f5a449487c arch/intel64: colorize IDLE stack for AP cores
colorize IDLE stack for AP cores in x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
4a796c39bb xtensa: add parameters to xtensa_pause_handler
reason:
nxsched_smp_call_handler need these parameters

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
xuxingliang
5e2d205e1b sched: handle sched lock in interrupt
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-11 01:30:51 +08:00
dulibo1
755bef6c56 sched_smp:adjust the unlock order
1.nxsem_post wake up  nxsched_smp_call;
2.stack smp_call_data_s may return;
3.nxsched_smp_call_handler access call_data->lock is not safety;
so adjust the unlock order

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
e0d9cc432c arch/intel64: fix IRQ conflict with GOLDFISH
Also move MSI IRQ definition to place where other IRQ definitions are.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
4fd92edee7 sched: replace sync pause with async pause for nxsig_process
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
487fcb3bce signal: adjust the signal processing logic to remove the judgment
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
8275a846b1 arch: move sigdeliver to common code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
buxiasen
ec58a6ab25 arch: cpu pause when sigaction only necessary if tcb running
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
fad4232925 arch/x86_64/intel64/intel64_schedulesigaction.c: properly align signal handler stack for vector operations
signal handler stack must be properly aligned, otherwise vector instructions doesn't work in signal handler

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
a33528fa4a arch/x86_64/intel64/intel64_cpuidlestack.c: stack_alloc should point to stack base not stack top
stack_alloc should point to stack base not stack top

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
bbea8dcefe arch/x86_64/intel64/intel64_head.S: move initial RSP for AP cores below regs area
move initial RSP for AP cores below regs area.
otherwise IDLE thread for AP cores can be corrupted

XCP region now match regs allocation in up_initial_state()

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
Ville Juven
192dde1b58 arm64_task/pthread_start: Set sp_el0 upon starting user process
As the handling of sp_el0 was moved from the context switch routine
to exception entry/exit, we must set sp_el0 explicitly when the user
process is first started.
2024-10-11 01:30:51 +08:00
lipengfei28
7975c94d88 Kernel build: enter exception save sp_sl0,exit exception restroe sp_el0
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-11 01:30:51 +08:00
ligd
669cd3aa2c arm64: simply the vectors
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-11 01:30:51 +08:00
ligd
7cbcf82bed arm64: save FPU regs every time
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-11 01:30:51 +08:00
qinwei1
d782f6c1ac arm64: add arm64_current_el to obtain current EL
Summary
  Add a macro to obtain current execute level

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2024-10-11 01:30:51 +08:00
qinwei1
40d40015f4 arm64: refine the fatal handler
Summary
  The original implement for exception handler is very simple and
haven't framework for breakpoint/watchpoint routine or brk instruction.
  I refine the fatal handler and add framework for debug handler to
register or unregister. this is a prepare for watchpoint/breakpoint
implement

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2024-10-11 01:30:51 +08:00
likun17
068c7176bb usensor.c:fix container_of member error.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-10-11 00:52:00 +08:00
guoshichao
bb8eb9398d armv7-m/irq: fix the greenhills compiler compile error
CXX:  libcxxmini/libxx_new.cxx "/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

make[1]: *** [Makefile:69: libxx_delete_sized.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [Makefile:69: libxx_deletea_sized.o] Error 1
make[1]: *** [Makefile:69: libxx_new.o] Error 1
"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-10-10 15:31:50 +02:00
hujun5
542e46319c xtensa: g_current_regs is only used to determine if we are in irq, with other functionalities removed.
reason:
by doing this we can reduce context switch time,
When we exit from an interrupt handler, we directly use tcb->xcp.regs

before
text    data     bss     dec     hex filename
178368     876  130604  309848   4ba58 nuttx
after
text    data     bss     dec     hex filename
178120     876  130212  309208   4b7d8 nuttx

szie change -248

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-10 15:31:50 +02:00
ligd
a9df7f0d1e xtesa: fix lost save & restore states caused by merge code
this is caused by:
35c8c80a00a99ff0e19d51eaa74165bd830a36f8

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-10 15:31:50 +02:00
ligd
1fb4f8f50e arch: change nxsched_suspend/resume_scheduler() called position
for the citimon stats:

thread 0:                     thread 1:
enter_critical (t0)
up_switch_context
note suspend thread0 (t1)

                              thread running
                              IRQ happen, in ISR:
                                post thread0
                                up_switch_context
                                note resume thread0 (t2)
                                ISR continue f1
                                ISR continue f2
                                ...
                                ISR continue fn

leave_critical (t3)

You will see, the thread 0, critical_section time is:
(t1 - t0) + (t3 - t2)

BUT, this result contains f1 f2 .. fn time spent, it is wrong
to tell user thead0 hold the critical lots of time but actually
not belong to it.

Resolve:
change the nxsched_suspend/resume_scheduler to real hanppends

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-10 15:31:50 +02:00
hujun5
2f4c067c50 fix compile error:
Register: smp
Register: nsh
Register: sh
Register: getprime
Register: ostest
Espressif HAL for 3rd Party Platforms: b4c723a119344b4b71d69819019d55637fb570fd
common/xtensa_cpupause.c: In function 'xtensa_pause_handler':
common/xtensa_cpupause.c:240:3: warning: implicit declaration of function 'xtensa_savestate'; did you mean 'xtensa_setps'? [-Wimplicit-function-declaration]
  240 |   xtensa_savestate(tcb->xcp.regs);
      |   ^~~~~~~~~~~~~~~~
      |   xtensa_setps
common/xtensa_cpupause.c:243:3: warning: implicit declaration of function 'xtensa_restorestate'; did you mean 'xtensa_context_restore'? [-Wimplicit-function-declaration]
  243 |   xtensa_restorestate(tcb->xcp.regs);
      |   ^~~~~~~~~~~~~~~~~~~
      |   xtensa_context_restore

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-10 15:31:50 +02:00
Yongrong Wang
c48f158e66 arm_gicv2.c: fix armv7a compile error
/vela/nuttx/drivers/pci/pci_ecam.c:432:(.text.pci_ecam_get_irq+0x16): undefined reference to `up_get_legacy_irq'

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
7cf9b73f18 arm64 pci legacy irq do not support yet
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
1cb81f9a8f armv7a pci irq support
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
3b1870028c include/pci.h: sync the subvendor/subdevice type in id table and pci_device_s
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
f2a4d59900 pci/pci_ecam: add read_io/write_io for pci ecam
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
fb97285a36 drivers/pci: one pci device should only associate with one driver
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
dbcef4f297 drivers/pci: change all devfn type to unsigned int
Now all the type of devfn in pci framework are unsigned int

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Yongrong Wang
fe1286b44a pci.c: fix compile warning
pci/pci.c:1128:15: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~
      |                                               |
      |                                               uint32_t {aka long unsigned int}
pci/pci.c:1128:30: note: format string is defined here
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |                             ~^
      |                              |
      |                              unsigned int
      |                             %lx

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
p-szafonimateusz
87b940a611 drivers/pci_qemu_test.c: fix compiler warning
pci/pci_qemu_test.c:218:6: warning: ‘ops’ may be used uninitialized [-Wmaybe-uninitialized]
  218 |   ops->write(dev->bus, &hdr->test, num, sizeof(num));
      |   ~~~^~~~~~~
pci/pci_qemu_test.c: In function ‘pci_qemu_test_probe’:
pci/pci_qemu_test.c:286:41: note: ‘ops’ was declared here
  286 |   FAR const struct pci_qemu_test_ops_s *ops;
      |

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-10 15:31:08 +02:00
yanghuatao
52473d7fa2 toolchain/ghs: Fix ?? "trigraphs not allowed" warnings
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 263: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
                                                                    ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 264: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
                                                                   ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 266: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
                                                                               ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 267: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
                                                                                 ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 268: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
                                                                                       ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 269: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_DATA_REGISTER              7       /* (??) */

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-10-10 15:31:08 +02:00
wangyongrong
7f4f7f293d pci.c: fix pci 32bit warning
pci/pci.c:863:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  863 |       pci_write_config_dword(dev, msi + PCI_MSI_ADDRESS_HI, (mar >> 32));

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
e33bdd9e38 include/pci_regs: add PCI_STD_NUM_BARS macro
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
1407a44862 drivers/pci/pci.c: fix warning when CONFIG_PCI_ASSIGN_ALL_BUSES=n
pci/pci.c:415:34: warning: variable ‘res’ set but not used [-Wunused-but-set-variable]
  415 |       FAR struct pci_resource_s *res;
      |                                  ^~~
pci/pci.c: In function ‘pci_scan_bus’:
pci/pci.c:663:32: warning: unused variable ‘ctrl’ [-Wunused-variable]
  663 |   FAR struct pci_controller_s *ctrl = bus->ctrl;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
519c5c86aa add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
wangyongrong
1e091fb2e0 pci.c: add pci_read/write_io_qword support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
wangyongrong
db95659a9c x86_64_pci.c: x86_64_pci_read/write_io memory support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
271893ed6d rpmsgfs/rpmsgfs_client: init the priv->wait before register rpmsg callback
Should init the priv->wait before rpmsg_register_callback() because
rpmsgfs_ns_bound() may has been called before rpmsg_register_callback()
returned.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:30:41 +02:00
fangzhenwei
439c52937a rpmsgfs: add tty fd ioctl(TCGETS/TCSETS) support
rpmsgfs client ioctl support TCDRN/TCFLSH/TCGETS/TCSETS

Signed-off-by: fangzhenwei <fangzhenwei@xiaomi.com>
2024-10-10 15:30:41 +02:00
Bowen Wang
536ed46ac4 rpmsgfs_server: add error log for rpmsgfs server ept callback
Because the rpmsg_virtio will assert when endpoint callback return
error, so add more error log to the rpmsgfs server to help to locate
the root cause.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:30:41 +02:00
ligd
5613675834 rpmsgfs: remove memcpy in rpmsgfs open/close
improve the rpmsgfs performance

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-10 15:30:41 +02:00
chenrun1
3f47fd767a fs/xxfs:Replace kmm with fs heap
Summary:
  1.Add configuration to allocate memory from the specified section
  2.Replace all memory operations (kmm_) in the vfs with
    fs_heap_. When FS_HEAPSIZE > 0, memory is requested for the file system by specifying a configured heap location. By default (i.e. FS_HEAPSIZE=0) fs_heap_ is equivalent to kmm_

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-10-10 15:30:41 +02:00
chenrun1
94fe00ebec accept4:move function from net to fs
Summary:
  Implementation in accept4 is special, the requested newsock is saved as filep->priv. This will cause sock_file_close to use fs_heap_free filep->priv during close. When fs_heap is configured, the released memory will not be on fs_heap, causing a crash.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-10-10 15:30:41 +02:00
Michal Lenc
01bed328ef smartfs: add support for FIOC_FILEPATH ioctl
The FIOC_FILEPATH ioctl call is required if smartfs is to be used
together with inotify monitoring system. This implements the
call support to smartfs file system. The path to the file has to
be stored in smartfs_ofile_s structure during file open (and is freed
during close) as smartfs currently is not able to obtain the path
knowing only the file node. The full path is concatenated with the file
name and creates the full path needed for inotify to detect whether
the file is on the watchlist.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-10-10 15:30:41 +02:00