Commit Graph

21407 Commits

Author SHA1 Message Date
Masayuki Ishikawa
479dda98ed arch: Disable ARCH_HAVE_FORK for arm64 as a precaution
Summary:
- Temporarily disables ARCH_HAVE_FORK for arm64 to address a crash issue,
  as detailed in https://github.com/apache/nuttx/pull/9755.
- This is a precautionary measure until a more permanent solution is implemented.

Impact:
- Temporarily limits certain functionalities on arm64,
  but necessary to ensure system stability.

Testing:
- Successfully tested on QEMU-8.1.2.
- Note: please apply the changes from https://github.com/apache/nuttx-apps/pull/1962.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-11-16 00:35:43 -08:00
Xiang Xiao
5ca3e805b2 arch/imx6: Replace cpu_start_t with start_t
avoid the unnecessary typedef

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-16 14:35:48 +09:00
chao an
64cf63475c arch/dumponexit: unify dump on exit to common code
remove arch implement and move to common code

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-15 08:28:25 -08:00
raiden00pl
e1b947cd52 stm32/stm32_foc.c: rename some macros
change the names to be the same as for stm32f7/stm32_foc.c
2023-11-15 03:44:17 -08:00
Xu Xingliang
6e7115ca09 mm: free delay list when exceeding specified count
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2023-11-15 12:05:20 +01:00
Petteri Aimonen
6dabcd567e stm32/samv7: Update SysTick drivers to new up_adjtime() API. 2023-11-14 19:47:40 -08:00
Eren Terzioglu
4033018a72 xtensa/esp32s3: Add XTWDT support 2023-11-14 19:42:33 -03:00
raiden00pl
7d99f01cf7 drivers/foc: get hardware information via lower-half interface 2023-11-14 04:34:49 -08:00
Eren Terzioglu
d92a7011fd xtensa/esp32s3: Add RWDT support 2023-11-13 21:04:30 -03:00
raiden00pl
0e40cc2853 stm32/stm32_adc.c: protect irq_attach with refcounter
irq_attach should only be called once for ADCs that share a common interrupt handler.
We can move irq_attach to just before interrupts are enabled.
2023-11-13 21:03:36 -03:00
raiden00pl
225d5bba6e stm32/foc: add support for board-specific ioctl 2023-11-13 08:40:11 -08:00
Xiang Xiao
459f8235e4 arch/arm: Let's old arm's arm_doirq return register context like armv7-a
and remove the duplicated arm_doirq and arm_ack_irq prototype

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-13 11:41:56 +01:00
Takumi Ando
c076cb1bef rp2040: pwm: Fix errors at CONFIG_PWM_NCHANNELS=1
Perhaps it has never been tested with CONFIG_PWM_NCHANNELS=1.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-11-13 11:40:22 +01:00
Xiang Xiao
0d42f1b3cf arch/sim: Replace [enter|leave]_critical_section with up_irq_[save|restore]
since it's enough to protect per cpu data with irq disabling

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-12 18:28:05 +01:00
dongjiuzhu1
b64dd8bed0 sim/raw_gadget: let's raw_epxhandle exit when unregister usbdev
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-11-11 21:09:59 +08:00
dongjiuzhu1
839eaacbcc sim/usbdev: add clase disconnect when usbdev_unregister
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-11-11 21:09:59 +08:00
chenwen@espressif.com
b6e09955dd xtensa/esp32s3: Support multiple PHY init data bin
1. If CONFIG_ESP32S3_PHY_INIT_DATA_IN_PARTITION and CONFIG_ESP32S3_SUPPORT_MULTIPLE_PHY_INIT_DATA are enabled,
PHY initialization data (PHY initialization data is used for RF calibration) will be loaded from a partition.

2. The corresponding PHY init data type can be automatically switched according to the country code,
China's PHY init data bin is used by default, country code can be modified through the wapi command: wapi country <ifname> <country code>.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
chenwen@espressif.com
cc10c54f6c xtensa/esp32s3: Support partition and OTA device
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
Xiang Xiao
122558a1de arch/armv8-m: Fix typo error for NVIC_SYSHCON_HARDFAULTPENDED
and the comment too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-10 15:44:03 -03:00
David Sidrane
a92bd5d081 s32k1xx:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
David Sidrane
8362e3147e s32k3xx:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
David Sidrane
54b4cd3bf3 imxrt:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
Tiago Medicci Serrano
18718316dc esp32/ble: enable the BLE interrupt during a SPI flash operation
This commit sets the BLE's interrupt as a IRAM-enabled interrupt,
which enables it to run during a SPI flash operation. This enables
us to create a cache to off-load semaphores and message queues
operations and treat them when the SPI flash operation is finished.
By doing that, we avoid packet losses during a SPI flash operation.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
f94daf09b2 esp32s3/spiflash: Fix comment and remove unused variable 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
b25793ebac esp32/spiflash: Make it similar to ESP32-S3 by removing cache state 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.

It also makes the code look more similar to the ESP32-S3 SPI flash
implementation by creating a common `esp32_spiflash_init` that is
responsible to create the SPI flash operation tasks. The function
intended to initialize the SPI flash partions was, then, renamed to
`board_spiflash_init`.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
606190d9b3 esp32/ble: fix saving/restoring the interrupt status flags
Whenever we enter/leave a critical section, the interrupt status is
saved and, then, restored. However, for the ESP32's BLE adapter,
entering/leaving a critical section is done on separate functions
that need to be registered as a callback.

The status flag was being saved as a global variable. However,
calling nested enter_critical_section would overwrite this global
variable that was storing the previous flag and, when leaving the
last critical section, the restored status would be different from
the one expected. The proposed solution for this issue is to create
a global array to store the interrupt status flags for nested calls.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
c60d5c2ea1 esp32s3/wireless: Fix typo
The CPU 2 interrupt source (which is not used for anything else) is
used to off-load BLE data after a SPI flash operation.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
fae075a749 esp32/ble: Lock the scheduler before creating pinned thread
This ensures that the thread that has been just created doesn't
run before its affinity is set, avoiding it to be scheduled in the
wrong CPU core.
2023-11-10 09:11:35 +08:00
Eren Terzioglu
9997a858e2 xtensa/esp32s2: Add SPI slave support 2023-11-10 00:34:39 +08:00
Eren Terzioglu
77df430f30 xtensa/esp32s2: Add rtc heap support 2023-11-09 23:58:30 +08:00
yinshengkai
bb5b5420ae mm: record the maximum system memory usage
Add the usmblks field to mallinfo to record the maximum space allocated historically in the system

https://man7.org/linux/man-pages/man3/mallinfo.3.html#:~:text=mmap(2).-,usmblks,-This%20field%20is

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-11-09 09:08:49 +08:00
Janne Rosberg
03064b9701 sama5: add support for QSPI 2023-11-08 21:58:02 +01:00
Janne Rosberg
0f5cea7322 sama5/sam_dmac: add define for DMACH_FLAG_PERIPHISMEMORY 2023-11-08 21:58:02 +01:00
chenwen@espressif.com
5239d01dba xtensa/esp32s3: Disable psram as task stack
1. Disable psram as task stack to avoid system blocking.
2. Add some function comments.
2023-11-08 16:25:57 -03:00
chenwen@espressif.com
8d94c1b3cb xtensa/esp32s3: Support malloc from external RAM and internal RAM
Enables the allocation of the entire Userspace heap into SPI RAM and reserving the Internal RAM exclusively for the Kernel heap.
2023-11-08 16:25:57 -03:00
Niklas Hauser
660ac63b92 stm32h7/serial: Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be blocked forever
on the second transmit attempt due to waiting on the txdma semaphore.
The calling thread can then never make progress and release any
resources it has taken, thus may cause a deadlock in other parts of the
system.

The implementation differs in behavior from interrupt-driven TX and the
STM32F7 TXDMA . It should not implicitly wait on a taken semaphore but
return immediately and let the upper layers decide on what to do next.
2023-11-08 12:52:30 -05:00
simbit18
8fa6a29503 Fix Kconfig style
Remove extra TABs
Remove spaces from Kconfig
Add comments
2023-11-08 22:58:26 +08:00
liqinhui
68a0621b39 simwifi: Fix a compile error.
sim/sim_wifidriver.c:569:31: warning: implicit declaration of function ‘hex2num’ [-Wimplicit-function-declaration]
  569 |                         val = hex2num(*pos);
      |                               ^~~~~~~

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-11-08 19:32:01 +08:00
zhanghongyu
fbd0b3d1d7 cmake: move NUTTX_CHIP_ABS_DIR before common src
Some APIs are implemented both in common code and CHIP-specific code,
and the link needs to be based on the implementation in CHIP, so move
NUTTX_CHIP_ABS_DIR before common src.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-07 17:39:03 +01:00
zhanghongyu
7c322c250a sim_netdriver: some sim defconfig have problems when using the network
if the configured SIM_NETDEV_BUFSIZE < host MTU, there will be issues with access out of bounds

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-04 17:53:25 +08:00
liqinhui
2d27dc0ef0 simwifi: For scan results, parse and translate the Chinese ssid encoded by the wpa_cli.
Because there is no pre-encoding length of the ssid, the ssid including
the Chinese characters whose length is less than 32 after encoding
cann't be translated.
For example, the ssid name is `word人`. After encoding it is `world\xe4\xba\xba` and will not be decoded.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-11-03 22:29:43 +08:00
raiden00pl
24c7e355d9 arch/stm32: remove unused STM32_UART_RXDMA and STM32_UART_TXDMA flags
These flags are not used in the code.
SERIAL_HAVE_RXDMA and SERIAL_HAVE_TXDMA flags are used instead.

STM32_UART_TXDMA flag is not even defined in Kconfig
2023-11-03 22:24:31 +08:00
raiden00pl
3220a59a3e arch/stm32: STM32_FOC_G4_ADCCHAN0_WORKAROUND depend on STM32G4 2023-11-03 22:24:31 +08:00
SPRESENSE
2f5bb9200a arch: cxd56xx: Support to get gnss firmware version
Support to get gnss firmware version and fix typo.
2023-11-03 09:23:57 +01:00
Ville Juven
3f3b30e384 riscv_addrenv: Fix static page table mapping (paddr instead of vaddr)
Connecting the static page tables to each other was done with the page
table virtual address (riscv_pgvaddr) when the page table physical address
is needed.
2023-11-02 21:52:23 +08:00
Ville Juven
aacdbf2a3b risc-v/addrenv: Improve the commenting on struct arch_addrenv_s
I can never remember whether the static page table list contains the
table's physical or kernel virtual address.. Add the fact as a comment
there.

Also add the limitations that come from this static page table approach
for Sv32.
2023-11-02 21:52:23 +08:00
Ville Juven
8a2d3958e9 mm/kmap: Fix bad dependency to ARCH_VMA_MAPPING
kmap does not need ARCH_VMA_MAPPING => remove the dependency
2023-11-02 15:10:57 +02:00
liqinhui
22d11aafa2 simwifi: Transfer the special characters in ssid.
The SSID can be configured with special symbols suach as single
quotations, double quotations and backslashes, which need to be escaped.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-11-01 16:14:34 +01:00
liqinhui
c7d0b32e4f simwifi: Support that get the connected Chinese essid.
The Chinese essid obtained by wpa_cli is encoded. So, we directly use
the essid saved in wifidev.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-11-01 09:28:51 +08:00