David Sidrane
|
314dd62dd5
|
stm32f76xx77xx_pinmap.h Missed one
|
2016-10-26 21:10:59 +00:00 |
|
David Sidrane
|
0bab23fb1b
|
stm32_i2c.c Dejavu
|
2016-10-26 21:00:50 +00:00 |
|
Gregory Nutt
|
ca7ca0eb57
|
ESP32: More compilation issues
|
2016-10-26 12:59:31 -06:00 |
|
Gregory Nutt
|
0a96f3a8c8
|
ESP32: Fix some compilation issues
|
2016-10-26 12:50:10 -06:00 |
|
Gregory Nutt
|
650757bbf0
|
ESP32: Add GPIO support
|
2016-10-26 12:11:24 -06:00 |
|
Gregory Nutt
|
946045075e
|
ESP32: Remove some long lines in header file
|
2016-10-26 08:23:09 -06:00 |
|
Gregory Nutt
|
6acc831e77
|
Remove duplicate select from Kconfig
|
2016-10-26 07:00:24 -06:00 |
|
Gregory Nutt
|
2c09279343
|
ESP32: Add beginning of GPIO register definition file
|
2016-10-26 06:27:02 -06:00 |
|
Sebastien Lorquet
|
f24701f5c7
|
Merge branch 'master' into stm32l4_pinouts
|
2016-10-26 13:31:54 +02:00 |
|
Sebastien Lorquet
|
68dae715b0
|
CHxN channels are always outputs
|
2016-10-26 13:21:57 +02:00 |
|
Gregory Nutt
|
b8462d3e04
|
ESP32: Need to take priority into account when allocating CPU interrupts
|
2016-10-25 16:27:58 -06:00 |
|
Gregory Nutt
|
fef7b414c5
|
Add logic to attach peripheral interrupt sources to CPU interrupts
|
2016-10-25 15:19:29 -06:00 |
|
Marc Rechte
|
483f012600
|
Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.
|
2016-10-25 14:14:10 -06:00 |
|
Gregory Nutt
|
6756b44dc3
|
ESP32: Add framework to assign a a peripheral to a CPU interrupt
|
2016-10-25 13:16:05 -06:00 |
|
Gregory Nutt
|
d5fceadacd
|
Xtensa: Fix some compilation issues
|
2016-10-25 12:34:23 -06:00 |
|
Gregory Nutt
|
2a59205ffa
|
ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding.
|
2016-10-25 12:02:53 -06:00 |
|
Gregory Nutt
|
c457e26f2a
|
ESP32: Add UART register definition file
|
2016-10-25 08:35:07 -06:00 |
|
Gregory Nutt
|
04c6319e32
|
Merged in slorquet/nuttx/stm32l4_uarts (pull request #155)
Enable and renames for 32l4 UARTs 4 and 5
|
2016-10-25 13:09:17 +00:00 |
|
Sebastien Lorquet
|
27920eeae9
|
Enable and renames for 32l4 UARTs 4 and 5
|
2016-10-25 10:55:25 +02:00 |
|
Sebastien Lorquet
|
9be23d0c76
|
Fix i2c devices rcc registers
|
2016-10-25 10:53:24 +02:00 |
|
Max Kriegleder
|
1d50259358
|
STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR.
|
2016-10-24 16:32:10 -06:00 |
|
Gregory Nutt
|
1dabbd8489
|
Costmetic changes
|
2016-10-24 16:18:30 -06:00 |
|
Gregory Nutt
|
3d4ce55ebd
|
Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly.
|
2016-10-24 15:25:40 -06:00 |
|
Gregory Nutt
|
7b7e352d6e
|
ESP32: Add some peripheral configuration
|
2016-10-24 14:09:47 -06:00 |
|
Gregory Nutt
|
818b0171d7
|
ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency.
|
2016-10-24 07:30:11 -06:00 |
|
Gregory Nutt
|
4cf60022ca
|
Xtensa: Correct some compile issues
|
2016-10-23 16:25:55 -06:00 |
|
Gregory Nutt
|
2514ddec8b
|
Xtensa: Add NMI handler
|
2016-10-23 16:24:09 -06:00 |
|
Gregory Nutt
|
261eec110b
|
Xtensa: Mismatched #endif
|
2016-10-23 14:19:08 -06:00 |
|
Gregory Nutt
|
9a9488ae92
|
ESP32: Fix heap initialization
|
2016-10-23 14:20:03 -06:00 |
|
Gregory Nutt
|
a41c98952c
|
Xtensa: Fix some compilation issues
|
2016-10-23 13:33:48 -06:00 |
|
Gregory Nutt
|
1166d44441
|
Minor improvement to the up_irq_save() implementation
|
2016-10-23 13:37:40 -06:00 |
|
Gregory Nutt
|
6bbe55602c
|
Xtensa: Add tie.h
|
2016-10-23 13:25:41 -06:00 |
|
Gregory Nutt
|
978c788926
|
Merge branch 'esp32' of bitbucket.org:nuttx/nuttx
|
2016-10-23 11:46:04 -06:00 |
|
Gregory Nutt
|
1fcced12eb
|
Xtensa: Timer code now compiles okay
|
2016-10-23 11:31:48 -06:00 |
|
Gregory Nutt
|
2b33768d09
|
Xtensa: Revert back to some XCHAL naming
|
2016-10-23 10:39:51 -06:00 |
|
Gregory Nutt
|
bf363d103b
|
Merge branch 'esp32' of bitbucket.org:nuttx/nuttx into esp32
|
2016-10-23 10:47:31 -06:00 |
|
Gregory Nutt
|
9f06b13ffb
|
Xtensa: Add core.h header file
|
2016-10-23 10:43:16 -06:00 |
|
Gregory Nutt
|
9b5fedc81e
|
Xtensa: Add implementation of system timer; Correct CFLAGS
|
2016-10-23 10:08:38 -06:00 |
|
Gregory Nutt
|
c3d76d56bc
|
Xtensa: Fix some compilation issues
|
2016-10-23 10:06:30 -06:00 |
|
Gregory Nutt
|
09b462e419
|
Xtensa: Add region protected; Implement some missing signal handling logic.
|
2016-10-23 09:02:50 -06:00 |
|
Gregory Nutt
|
112b62a14e
|
Xtensa: Correct variou compilation issues
|
2016-10-23 08:04:57 -06:00 |
|
Gregory Nutt
|
a9a4f6384d
|
Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization.
|
2016-10-23 08:00:17 -06:00 |
|
Gregory Nutt
|
ea175cd98b
|
Xtensa: Flesh out other interrupt handlers. Suppress nested interrupts, at least for now.
|
2016-10-23 07:08:19 -06:00 |
|
Gregory Nutt
|
75df09fd40
|
Remove support for software prioritization of interrupts
|
2016-10-23 06:37:28 -06:00 |
|
Gregory Nutt
|
2c83d79465
|
Xtensa: Remove 'virtual' interrupt support
|
2016-10-23 06:24:35 -06:00 |
|
Gregory Nutt
|
23b003c649
|
Xtensa: Some things in Kconfig are really core options, not user configurations.
|
2016-10-22 12:25:56 -06:00 |
|
Gregory Nutt
|
53de345f05
|
Xtensa: Add up_cpu_index()
|
2016-10-22 09:29:15 -06:00 |
|
Gregory Nutt
|
764ef72641
|
Xtensa: Restore XCHAL_ naming convenction
|
2016-10-22 09:03:43 -06:00 |
|
Ken Pettit
|
1e40e03c7f
|
Minor RISC-V update
|
2016-10-21 17:01:40 -06:00 |
|
Gregory Nutt
|
1ea22b680d
|
Xtensa: Add timer dispatch logic
|
2016-10-21 13:23:28 -06:00 |
|
Gregory Nutt
|
3e4d2dba65
|
Merge remote-tracking branch 'origin/master' into esp32
|
2016-10-21 12:35:41 -06:00 |
|
Gregory Nutt
|
cf217c6e87
|
Xtensa: Fix a few more compilation issues
|
2016-10-21 11:24:23 -06:00 |
|
Gregory Nutt
|
c8fd15d315
|
Merge branch 'esp32' of bitbucket.org:nuttx/nuttx into esp32
|
2016-10-21 10:44:21 -06:00 |
|
Gregory Nutt
|
f07601a067
|
Xtensa: First cat at context switching functions
|
2016-10-21 10:43:59 -06:00 |
|
Gregory Nutt
|
7a007a1e8e
|
ESP32: The ESP32 Core V2 board does not have any user controllable LEDs.
|
2016-10-21 07:35:56 -06:00 |
|
Frank Benkert
|
cf5fdf1f8f
|
SAM Watchdog: Register the watchdog device at the configured device path CONFIG_WATCHDOG_DEVPATH vs. hard-coded /dev/wdt
|
2016-10-21 07:09:20 -06:00 |
|
Gregory Nutt
|
363fe19ff6
|
Xtensa: Fix some compile issues
|
2016-10-20 16:42:37 -06:00 |
|
Gregory Nutt
|
7a89808deb
|
ESP32: Add interrupt decode logic
|
2016-10-20 16:22:37 -06:00 |
|
Gregory Nutt
|
bd6633dd84
|
Xtensa: Add some data structures needed for SMP support.
|
2016-10-20 15:21:29 -06:00 |
|
Gregory Nutt
|
67c98baaea
|
Xtensa: Add a missing include file
|
2016-10-20 14:28:13 -06:00 |
|
Gregory Nutt
|
520513f456
|
Xtensa: Add interrupt decode framework
|
2016-10-20 14:34:51 -06:00 |
|
Gregory Nutt
|
ed8377af72
|
Xtensa: More interrupt-related logic
|
2016-10-20 14:28:14 -06:00 |
|
Gregory Nutt
|
9e1600b7d3
|
Xtensa: Trivial interrupt-related changes
|
2016-10-20 12:56:35 -06:00 |
|
Gregory Nutt
|
30c4a41332
|
Fix a few compile-related issues
|
2016-10-20 11:33:53 -06:00 |
|
Gregory Nutt
|
5c3afd088e
|
Xtensa: A little more interrupt handling logic
|
2016-10-20 11:44:14 -06:00 |
|
Gregory Nutt
|
d75fb34b62
|
Xtensa: Fix some xtensa_context.S assemble issues
|
2016-10-20 08:58:33 -06:00 |
|
Gregory Nutt
|
11af1fc24c
|
Xtensa: Separate context save/restore from coprocessor functions. Making to changes to interrupt handling to support NuttX.
|
2016-10-20 08:51:15 -06:00 |
|
Gregory Nutt
|
d2d60a59bf
|
ESP32: Refresh configuration; fix some compile issues
|
2016-10-19 13:58:50 -06:00 |
|
Gregory Nutt
|
dda7f4cd75
|
Trivial corrections to spacing
|
2016-10-19 14:01:51 -06:00 |
|
Gregory Nutt
|
d1562a18e6
|
Add vectors for interrupt levels 2-6
|
2016-10-19 13:58:51 -06:00 |
|
Gregory Nutt
|
291c49afc3
|
Xtensa/ESP32: Move some ESP32-specific macros from xtensa_macros.h to chip_macros.h
|
2016-10-19 11:28:42 -06:00 |
|
Gregory Nutt
|
48fb97e7b5
|
More of the same cloned typo
|
2016-10-19 10:11:45 -06:00 |
|
Gregory Nutt
|
31d5acc8a7
|
Forgot to add a file before the last commit
|
2016-10-19 10:06:07 -06:00 |
|
Gregory Nutt
|
5d56172f82
|
Merged in w8jcik/nuttx (pull request #152)
add tim8 to stm32f103v pinmap
|
2016-10-19 16:03:34 +00:00 |
|
Gregory Nutt
|
29c3acdc4e
|
Add xtensa_testset.c
|
2016-10-19 09:58:12 -06:00 |
|
Gregory Nutt
|
fb7b545637
|
Merge remote-tracking branch 'origin/master' into esp32
|
2016-10-19 09:17:07 -06:00 |
|
Gregory Nutt
|
841e1aa77f
|
Fix a cloned typo
|
2016-10-19 09:14:21 -06:00 |
|
Maciej Wójcik
|
c719a32a40
|
add tim8 to stm32f103v pinmap
|
2016-10-19 16:34:07 +02:00 |
|
Gregory Nutt
|
20fc02569f
|
Merged in david_s5/nuttx/upstream_kinetis_to_greg (pull request #151)
Upstream kinetis to greg
|
2016-10-18 22:12:08 +00:00 |
|
David Sidrane
|
c3543cf402
|
Kinetis:BugFix:i2c driver offset swapped for value in kinetis_i2c_putreg
|
2016-10-18 12:00:01 -10:00 |
|
David Sidrane
|
b29b2874fe
|
Kinetis Allow CONFIG_ARMV7M_CMNVECTOR, CONFIG_STACK_COLORATION, CONFIG_ARCH_FPU
|
2016-10-18 12:00:01 -10:00 |
|
David Sidrane
|
bce382da52
|
Kinetis Support ARMV7 Common Vector and FPU
|
2016-10-18 12:00:01 -10:00 |
|
David Sidrane
|
4de46c848d
|
Broke out DMA to use the modern Nuttx chip inclusion - still STUBS
|
2016-10-18 12:00:01 -10:00 |
|
David Sidrane
|
42ac6ecebd
|
Kinetis broke out SPI to kinetis/kinetis_spi.h
|
2016-10-18 12:00:01 -10:00 |
|
David Sidrane
|
70d5c7753e
|
Kinetis - Added missing headers
|
2016-10-18 12:00:01 -10:00 |
|
Gregory Nutt
|
8c606c4878
|
ESP32: Add more missing infrastructure
|
2016-10-18 13:18:59 -06:00 |
|
Gregory Nutt
|
6357970c5f
|
Xtensa: Fix some compilation issues
|
2016-10-18 12:38:57 -06:00 |
|
Gregory Nutt
|
503a2472e7
|
Xtensa: Add assertion logic
|
2016-10-18 12:42:57 -06:00 |
|
Gregory Nutt
|
054a1a8231
|
ESP32 Core: Refresh configuration
|
2016-10-18 09:41:16 -06:00 |
|
Gregory Nutt
|
ac97a81fb0
|
ESP32 core: Add linker script
|
2016-10-18 09:43:56 -06:00 |
|
Gregory Nutt
|
c5d14f9496
|
Xtensa: A few changes to get esp32_start.c to compile
|
2016-10-17 10:45:21 -06:00 |
|
Gregory Nutt
|
51fc3de40b
|
Xtensa: Add CPU1 start logic
|
2016-10-17 09:13:12 -06:00 |
|
Gregory Nutt
|
c1334048c5
|
Xtensa: Add initial CPU0 start-up logic
|
2016-10-17 08:15:36 -06:00 |
|
Gregory Nutt
|
0591b67c15
|
Xtensa: A few fixes for clean compile
|
2016-10-16 10:27:52 -06:00 |
|
Gregory Nutt
|
e7d791dd95
|
XTensa: Add an initial implementation of up_initialstate. Need to think through co-processor support.
|
2016-10-16 10:36:03 -06:00 |
|
Gregory Nutt
|
29ccdf350a
|
Merge remote-tracking branch 'origin/master' into esp32
|
2016-10-16 09:53:03 -06:00 |
|
Ken Pettit
|
201a32cf8c
|
Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.
|
2016-10-16 09:47:07 -06:00 |
|
Gregory Nutt
|
8c3c78f24a
|
Xtensa: Fix register usage in up_strackframe
|
2016-10-16 09:26:33 -06:00 |
|
Gregory Nutt
|
a8662c70db
|
Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up.
|
2016-10-16 07:57:16 -06:00 |
|
Gregory Nutt
|
275120a6d1
|
XTENSA: Add some context switching definitions (incomplete); ESP32: Add some dummy LED definitions
|
2016-10-15 14:57:06 -06:00 |
|