The QuickFeather board added as an initial target.
These featrues are minimally implemented:
* Clock Configuration -- All clocking registers are defined and
configuration is used to setup the HSO, M4 Core, and M4 Perif
clocks. Additionally some clock debugging is stubbed for
bringing out clock paths to IO pins.
* UART -- The lowputc as well as the serial driver is implemnted
for the single UART device. Currently the configuration is
hard coded, but uses the proper interfaces to later fill in.
* SysTick -- The system tick timer is implemented and clocking
properly. Tickless mode is not yet implemented.
* Interrupts -- The interrupt system is implemented and verified
using the UART and SysTick systems.
* GPIO -- GPIO and IOMUX systems are defined and implemented.
This is verified using the UART as well as the Arch LED
system. The GPIO interupt system is stubbed out but not
implemented.
* Arch LEDS -- The blue LED as part of the RGB LED is configured
and attached to the Arch LED system. This indicates the device
coming online as well as when a hardfault is triggered.
Applications and Testing:
* There is a nsh configuration implemented that includes debug
features as well as the ostest, getprime, and mem test.
All of these have been run and verified.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:
* Add architectural support to existing NuttX files. This
makes the STM32G474 family parts accessible to the system.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/include/stm32/stm32g47xxx_irq.h:
arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h:
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h:
arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h:
arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h:
arch/arm/src/stm32/hardware/stm32g47xxx_uart.h:
arch/arm/src/stm32/stm32g47xxx_rcc.c:
* New files required for architectural support. Note that
existing NuttX files are not modified. As such, in this
revision, the system is unaffected by their addition.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
Move the logic to get TLS information from an inline function to a normal function. For the unaligned case, it is probably too large to be inlined.
Also fixes some minor things from review of previous commits.
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check). It was really my intention to merge PR878, but I screwed that up and merged 879 instead.
This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
arch/arm/include/kinetis/kinetis_pmc.h:
* Fix several typos in comments.
* Rewrap some comment lines.
* Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
parenthesis for safety.
* Fix nxstyle complaint regarding long line.
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.
arch/arm/src/stm32h7/Kconfig:
* Add explicit support for all microcontrollers in the
STM32H7x3xx family by adding support for:
- STM32H743AG
- STM32H743AI
- STM32H743BG
- STM32H743BI
- STM32H743IG
- STM32H743II
- STM32H743VG
- STM32H743VI
- STM32H743XG
- STM32H743XI
- STM32H743ZG
- STM32H753AI
- STM32H753BI
- STM32H753VI
- STM32H753XI
- STM32H753ZI
* Fix TODO items for IO_CONFIG (all STM32H7X3XX).
* Because 100-pin parts lack GPIO ports F and G, but have
port H, create the new hidden configs STM32H7_HAVE_GPIOF
and STM32H7_HAVE_GPIOG.
* STM32H7_STM32H7X3XX:
- Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
when not STM32H7_IO_CONFIG_V (100-pin part).
- STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
IO configs except V (100-pin part), which doesn't expose
SPI5 due to pin count.
* STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
STM32H7_HAVE_GPIOG because we aren't adding more part
numbers in this family.
* Remove extraneous (duplicate) "bool" and "default n"
lines.
* config STM32H7_FMC: Fix indent (contents were indented
with spaces while rest of file uses tabs).
arch/arm/include/stm32h7/chip.h:
* Extend preprocessor logic to add support for the new
MCU part numbers.
* Expand table of differences between family members.
* Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.
* If IO config is not known, issue compile-time #error
with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
Suggested by davids5.
arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:
* When checking STM32H7_NGPIO > 5 or 6, check also
CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.
arch/arm/src/stm32h7/stm32_gpio.c:
* stm32_configgpio(): When applicable, make sure we're not
trying to configure one of the missing ports.
* Fix nxstyle complains (wrong end of line comment position
and several long lines). No functional changes.
* g_gpiobase[]: Init base address for ports F and G according to
CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.
* stm32_configgpio(): Replace complicated check with g_gpiobase[]
null check. Suggested by davids5.
* stm32_gpiowrite() and stm32_gpioread(): Add previously missing
null check of g_gpiobase[].
arch/arm/src/stm32h7/stm32_gpio.h:
* Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
compiler will prevent use of ports that do not exist on the
target MCU.
* Fix nxstyle complaints.
Documentation/NuttX.html:
* Remove copy-and-pasted anchor for stm32f76xx77xx.
* Correct link to README.txt for Nucleo-H743ZI board,
formerly on BitBucket, now on GitHub.
* Add list item for STMicro STM32H747I-DISCO board.
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
This reverts commit f735584514.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG. The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
* S32K add support for Nxp drone boards
* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c and .h files and fix it
Author: Juha Niskanen <juha.niskanen@haltian.com>
Fix typos and some incorrect comments
Author: Alan Carvalho de Assis <acassis@gmail.com>
Verify all .c and .h against nxstyle, fixed the Mixed cases
Author: Alin Jerpelea <alin.jerpelea@sony.com>
cxd56xx improvements (#48)
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
This commit fixes a compilation error that occurs when enabling the
following configuration items for stm32f7 and stm32h7 architectures:
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_IRQ=y
CONFIG_DEBUG_IRQ_ERROR=y
CONFIG_DEBUG_IRQ_WARN=y
CONFIG_DEBUG_IRQ_INFO=y
The compiler error for stm32f7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:497:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_FIRST'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_FIRST
chip/stm32_irq.c:497:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
And the compiler error for stm32h7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'stm32_dumpnvic':
chip/stm32_irq.c:164:4: warning: #warning Missing logic [-Wcpp]
# warning Missing logic
^~~~~~~
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:522:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_CRS'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_CRS
chip/stm32_irq.c:522:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
This commit replaces all STM32_IRQ_NIRQS defines with the NR_IRQS
define, which seems to be consistent with the rest of the code in
Nuttx.
Run all .c and .h files in last PR through nxstyle.
Author: macman88 <jjlange91@gmail.com>
SAME5x Ethernet Support (#25)
boards/arm/samd5e5/same54-xplained-pro/: Adds basic support for Microchip SAM E54 Xplained Pro board.
arch/arm/src/samd5e5/: Adds an Ethernet driver for the SAME5x family (based on the SAMA5 GMAC driver).
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run all .h and .c files modified in last PR through nxstyle.
Author: Minamiya_Natsuki <yukihiratype2@gmail.com>
Add FMC SDRAM for STM32H7x3 chip (#22)
* Add FMC SDRAM for STM32H7x3 chip
* Add FMC SDRAM for STM32H7x7
* Nuttx Coding Standard requires one declaration per line
* should be __ARCH_ARM_SRC_STM32H7_STM32_FMC_H
* fix bad alignment
* fix typo
* fix typo
* people can't live in furture
* fix comment line length
* fix more comment line length
* fix aligenment
* fix typo
STM32L4_NUSART was set to 4. The spec at
https://www.st.com/resource/en/datasheet/stm32l433cc.pdf states the
following on page 1:
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Stop 2 wake-up)
However it on page 49, it states:
The STM32L433xx devices have three embedded universal synchronous
receiver transmitters (USART1, USART2 and USART3).
The latter is correct.
This patch sets STM32L4_NUSART to 3.
