Commit Graph

7 Commits

Author SHA1 Message Date
Abdelatif Guettouche
f052a9b1e6 baords/xtensa/esp32/esp32-core: Update all configs to add the new region
of memory.
2020-11-06 18:36:41 -03:00
Sara Souza
ddc0d30063 xtensa/esp32: Added Userled support 2020-10-27 15:38:03 -03:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
c91db9eb40 baords/xtensa/esp32/esp32-core: Refresh all the defconfigs
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
430e2d766d boards/xtensa/esp32/esp32-core/configs: When there is no PSRAM, only one
memory region is available.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
53b975ff79 boards/xtensa/esp32/esp32-core: Add a defconfig example for the
SPIFlash.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00