zhuyanlin
ec17cad69d
arch:xtensa:include chip/irq.h instead of depend on chip config.
...
Many duplicate code when more chips add-in,
follow arch/arm/include/irq.h method, use chip/irq.h instead.
Change-Id: I42f516c1dda68e973939c669f627c457cd0bc65e
2021-08-05 10:08:48 +02:00
zhuyanlin
cec6aeb059
arch:xtensa:vector: fix typo error in level4_ventor
...
Change-Id: I66cd3ff30e50e18ed718499aef609dd7aeb82dd3
2021-08-04 20:16:41 -07:00
zhuyanlin
51d13df317
arch: xtensa: save current SP before overwrting in dispatch_c_isr.
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In levelx(2,3,4,5)_handler, first need to save sp in a12,
then after dispatch_c_isr we can restore sp from a12.
Change-Id: Idb6b64a782da866670a4db80b33435a9b63f02c3
2021-08-04 20:16:41 -07:00
zhuyanlin
4fc5b62ec3
arch:xtensa: use letter 'i' in inline assemble constraint instead of I
...
Some toolchain such as xtensa-xcc is unrecognize with constraint letter 'I',
letter 'i' is more common in GNU assembler.
Change-Id: I00f6a33fd7a5f2b95508c683e9954d402b68755f
2021-08-04 18:23:40 +02:00
zhuyanlin
9a34705b80
arch:xtensa_testset: remove include arch/spinlock.h
...
In config with no "CONFIG_SPINLOCK", include arch/spinlock.h will lead to
build error as multi definition with spinlock_t. Nuttx/spinlock.h will
include arch/spinlock.h when needed.
Change-Id: I33b48503f679ec79af3a0ef1f0fb1536aaf1ce7c
2021-08-04 18:18:11 +02:00
zhuyanlin
355133f218
arch:xtensa: add new GNU toolchain for xtensa.
...
Add support xcc,xclang GUN toolchin in xtensa,
ESP toolchain is default.
Change-Id: Id00bcf4a16c1e16862a106db32b1da3f3713a14c
2021-08-04 18:16:14 +02:00
Abdelatif Guettouche
238a96e7de
arch/esp32_cpuint.c: Simplify up_disable/enable_irq.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
4f2f2ef9fb
arch/xtensa: Get the cpu member out of the read only structure.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
239f0e257b
arch/xtensa/esp32: Keep track to which CPU the interrupt was attached.
...
This is used when dettaching.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
0ca5fb4edc
arch/xtensa/esp32: When calling up_cpu_index no need to check if in SMP
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mode. up_cpu_index already does that.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
3e44c347fd
arch/xtensa/esp32_spi&i2c: Get the CPU index when attaching an
...
interrupt.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Xiang Xiao
21b69cfd5d
Replace all __attribute__((weak)) with weak_data/weak_function
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
007adc7736
Replace all __attribute__((section(x)) with locate_data(x)
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
b3f9ffbe72
Replace all __attribute__((aligned(x)) with aligned_data(x)
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Gustavo Henrique Nihei
a7a922611b
xtensa/esp32: Enable the allocation of multiple SPI Flash partitions
...
Currently the "esp32_spiflash_alloc_mtdpart" allocates a
statically-defined partition from "offset" and "size" set via
Kconfig.
This commit changes the function interface to receive those information
as arguments, enabling the creation of multiple MTD partitions with
different offsets and sizes.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-29 20:17:13 +02:00
Sara Souza
857414e95d
xtensa/esp32: expose SPI2 as a char driver
2021-07-27 09:55:49 -07:00
Sara Souza
400d927011
xtensa/esp32s2: Disable wdt and wrap it.
2021-07-26 19:44:30 -07:00
Sara Souza
5baeb7430b
xtensa/esp32: Wrap wdt deinitialization in a function
2021-07-26 19:44:30 -07:00
Gustavo Henrique Nihei
2d676f5e46
xtensa/esp32: Enable configuration of GPIO pad's drive strength
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-26 19:37:06 -07:00
jordi
f3af6edf93
Kconfig: add quotes in source to clean warnings from setconfig
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To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
2021-07-23 02:32:19 -07:00
Abdelatif Guettouche
e85b119363
arch/: Clean what was made during context
in distclean.
...
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued. That's because `menuconfig` has a
`clean_context` on its way.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-07-21 16:52:36 -03:00
Abdelatif Guettouche
315ba8c77f
esp32_allocateheap.c: Remove the amount reserved to himem from the heap.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-07-21 08:58:18 -07:00
Alan C. Assis
011c938116
Remove xtensa_backtrace.S reference from esp32s2 as well
2021-07-20 19:30:09 -07:00
Alan C. Assis
d2eeeee262
Fix xtensa_btdump() to look at the exception frame
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Remove xtensa_backtrace_start() since it is not used anymore
2021-07-20 19:30:09 -07:00
Gustavo Henrique Nihei
df2e890cfc
xtensa/esp32: Implement MTDIOC_ERASESTATE for SPI Flash driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Xiang Xiao
98b5724b59
arch: Fix rtcb can't found error
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use the same condition check in declaration and reference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
2021-07-16 12:48:09 -03:00
Sara Souza
c7bf5c7a1d
xtensa/esp32: Make UART TX DMA depends on EXPERIMENTAL and adds caveats regarding its use
2021-07-12 21:03:06 -07:00
Sara Souza
2abeba041d
xtensa/esp32: Fixes termios issue.
2021-07-12 21:02:26 -07:00
Xiang Xiao
76cdd5c329
mm: Remove mm_heap_impl_s struct
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it's more simple to make mm_heap_s opaque outside of mm
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
2021-07-07 04:25:15 -07:00
Sara Souza
a5bf47b93e
xtensa/esp32: Fixes issue with UART 2
2021-07-05 23:20:26 -05:00
Sara Souza
d67852da4b
xtensa/esp32: Change default pins of UART2
2021-07-05 23:20:26 -05:00
Xiang Xiao
97216c220b
mm: Support malloc_size function
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and rename malloc_usable_size to malloc_size
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
b1f711f790
mm: Move procfs_register_meminfo into common place
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to avoid the code duplication and ensure the consistent behaviour
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-03 09:39:32 -07:00
Sara Souza
b45ccad6a0
xtensa/esp32: Adds support for SERIAL_TXDMA.
2021-07-01 01:50:13 -05:00
Sara Souza
87fabb2bc7
xtensa/esp32: Support to select different clock source for RTC controller and close TODOs.
2021-06-30 21:27:27 -05:00
Abdelatif Guettouche
553f070357
arch/xtensa/esp32: Remove up_textheap_init function since it's not
...
needed anymore.
Decouple the IRAM heap from the text allocator since that heap can
still be used as a generic pool of memory.
Implement the up_extraheaps_init function to initialize all of the
additional heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Gustavo Henrique Nihei
db18a12844
xtensa/esp32: Move RTC WDT deinit after initial setup
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Gustavo Henrique Nihei
8c70e4f1c1
xtensa/esp32: Fix RTC watchdog timer deinit at startup
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Write protection must be disabled before performing changes to the WDT
registers. Furthermore, the routine was resetting the wrong field from
the RTC WDT register.
The RTC_CNTL_WDT_FLASHBOOT_MOD_EN field relates to Flash Boot Protection
and it is enabled by the 1st stage bootloader. The 2nd stage bootloader
takes care of disabling it.
Then the 2nd stage bootloader enables the RTC WDT for checking the
startup sequence of the application image.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Abdelatif Guettouche
55a210d305
arch/xtensa/esp32_textheap.c: When allocating text prioritize alloacting
...
from the RTC heap. If that's not available fall back to the IRAM heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1e49f2929f
arch/xtensa/src/esp32: Extract the IRAM region as a separate heap.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94
arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.
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This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904
arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a
...
buffer comes from the RTC Slow memory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84
xtensa/esp32_aes.c: Use the same output when testing the AES driver.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0
arch: esp32: Replace getcoreid with the latest esp-idf's
...
Summary:
- I noticed that the getcoreid macro in the latest esp-idf
is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-21 06:21:39 -05:00
chenwen
8648970994
esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten
2021-06-19 08:00:35 -03:00
chenwen
c3792f0aae
xtensa/esp32: Support ESP32 RTC driver
2021-06-18 22:01:34 -05:00
Xiang Xiao
ab974edc84
sched: Identify the stack need to free by TCB_FLAG_FREE_STACK
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instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f
Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Sara Souza
00edeee1ff
xtensa/esp32: Adds I2C Bit banging reset
2021-06-18 00:48:27 -05:00
Masayuki Ishikawa
83ac6cd399
arch: xtensa: Remove ISYNC from xtensa_compareset()
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Summary:
- According to the Xtensa ISA document, this ISYNC instruction
between WSR SCOMPARE1 and S32C1I is unnecessary
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Masayuki Ishikawa
2d016f8d21
arch: xtensa: Fix the PS register handling
...
Summary:
- I noticed that DEBUGASSERT sometimes happens in nxsem_wait()
when testing Wi-Fi with esp32-devkitc:wsifi_smp
- The call stack was not from an interrupt handler and actually
g_current_regs[] were correct, even though asserted with
(up_interrupt_handler() == false)
- Finally, I found that we need to call rsync after we set
a new value to the PS register which is described in the
Xtensa document.
- This commit fixes this issue
Impact:
- All xtensa architectures
Testing:
- Tested with esp32-devkitc:wifi_smp and esp32-devkitc:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Sara Souza
7300bc8f1c
xtensa/esp32: Adds I2C polled support.
2021-06-13 05:04:51 -05:00
Xiang Xiao
c0fdddc5d7
arch: Remove all go_nx_start from chip specifc source
...
since the idle stack color is done in the common code now
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87
arch: Colorize the idle thread stack in an unified way
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
2021-06-10 06:50:41 -07:00
Xiang Xiao
6576306bca
arch: Rename xxx_getsp to up_getsp
...
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-09 10:20:02 -07:00
Xiang Xiao
5b2a17b892
Include assert.h in necessary place
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
Gustavo Henrique Nihei
0b3c2c7603
spi: Refactor SPI Slave interface prefix to sync with I2C Slave
2021-06-05 04:50:34 -07:00
Xiang Xiao
2e54df0f35
Don't include assert.h from public header file
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00
Sara Souza
7dd131b4c1
xtensa/esp32: Fixes support for HW flow control
2021-06-02 09:55:50 -05:00
Sara Souza
a54fe4ee1e
xtensa/esp32-s2: Add support for serial HW flow control.
2021-06-01 21:37:37 -05:00
Alan C. Assis
929a4a7278
Fix dangling whitespace at the end of line
2021-06-01 07:49:54 +02:00
Sara Souza
f1d653c08c
xtensa/esp32-s2: Adds support for serial driver, lowputc and termios.
2021-06-01 07:49:54 +02:00
Alan C. Assis
06795a221a
Clean ESP32S2 Xtensa files
2021-06-01 07:49:54 +02:00
Abdelatif Guettouche
fccd5fbdd2
esp32s2_allocateheap.c: Use the address of the ROM data from the ROM linker script.
2021-06-01 07:49:54 +02:00
Alan C. Assis
7767acd24a
Add initial ESP32S2 Xtensa support
2021-06-01 07:49:54 +02:00
Xiang Xiao
d7f96003cf
Don't include debug.h from public header file
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-01 06:42:02 +09:00
chenwen
1d1dd8512f
esp32&esp32c3/wifi: Support specific channel and bssid scan
2021-05-31 11:09:19 +01:00
Abdelatif Guettouche
45d01ae2a8
arch/xtensa/esp32_emac.c: Call phy_enable_interrupt correctly.
2021-05-28 20:46:27 -03:00
Abdelatif Guettouche
08aa9ce540
arch/xtensa/src/esp32/esp32_rt_timer: Fix typos and re-word some
...
comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
0f3d94e8e8
arch/risc-v/src/esp32c3/esp32c3_rt_timer.h: Add section headers.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
f24a687f8e
arch/xtensa/src/esp32/esp32_rt_timer.h: Add section headers.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Sara Souza
3144a5a272
xtensa: Fixes names of serial functions
2021-05-24 10:04:50 -05:00
Xiang Xiao
001e7c3e76
sched: Don't include nuttx/sched.h inside sched.h
...
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-24 12:11:53 +09:00
Alan C. Assis
1a84314f5d
xtensa: #ifdef SYMBOL is always true if SYMBOL defined as 0
2021-05-22 08:35:12 -05:00
jordi
ccc8c078f9
xtensa/esp32: Fix warning "is not defined"
...
Detected with "-Werror" flag
2021-05-19 20:03:03 +01:00
Chen Wen
e44ec9e48e
xtensa/esp32: Fix code nxstyle issue
2021-05-19 06:45:42 -03:00
chenwen
f7db743152
xtensa/esp32: Support auto-sleep
2021-05-19 06:45:42 -03:00
chenwen
f50160f0e1
xtensa/esp32: Support tick-less OS
2021-05-19 06:45:42 -03:00
Abdelatif Guettouche
65e9ff5a48
xtensa/esp32/esp32_start.c: Remove an old and unnecessary piece of code.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-19 03:05:52 -05:00
Sara Souza
873293cc3f
xtensa/esp32: Applies REG_MASK to extract a field value
2021-05-05 01:30:03 -07:00
Sara Souza
50daf24242
esp32/esp32-c3: Adds two helpers to extract and include a field value
2021-05-05 01:30:03 -07:00
Sara Souza
cce42d5f74
xtensa/esp32: Reorganize the pins initialization and adds showprogress in __start
2021-05-05 01:30:03 -07:00
Sara Souza
afd6b26232
xtensa/esp32: Replace serialout/in and fixes the fifo counter issue
2021-05-05 01:30:03 -07:00
Abdelatif Guettouche
e24af207f8
esp32/hardware: Include files of the same level by their names only and
...
remove unnecessary includes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-05 01:28:22 -07:00
Gustavo Henrique Nihei
f8a36f10c3
arch: Uniformize optimization flag setting across architectures
2021-04-29 19:17:16 -07:00
Alan C. Assis
0a0a034a3f
esp32: replace EPS32 typo with ESP32
2021-04-29 18:03:05 -03:00
Gustavo Henrique Nihei
91955be0e1
xtensa/esp32: Change ESP32_RT_TIMER_TASK_PRIORITY comment into help text
2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
2b179c5ab3
xtensa/esp32: Add missing default value for CONFIG_ESP32_GPIO_IRQ
2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
95a76adc90
xtensa/esp32: Uniformize Kconfig alignment and styling
2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
03c8e2d5c7
xtensa/esp32: Remove inconsistent usage of comment command
2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
4d3fa83d7a
xtensa/esp32: Remove redundant dependency
2021-04-27 20:45:28 -06:00
chenwen
666d718302
xtensa/esp32: Fix crash issue caused by null pointer operation
2021-04-27 11:00:16 +01:00
Sara Souza
0c440cfdfe
xtensa/esp32: Reorganize the timer logic for wireless use
2021-04-22 21:38:16 -05:00
Dong Heng
fecdd27df3
esp32 & esp32c3: Update Wi-Fi BT and Wi-Fi libraries to fix some issues
2021-04-22 07:34:06 -03:00
Sara Souza
f696364b6a
xtensa/esp32: Adds freerun wrapper
2021-04-21 16:37:39 -03:00
Masayuki Ishikawa
1b00e5d518
spinlock: Remove SP_SECTION
...
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
works without any problems
- So SP_SECTION should be removed to simplify the kernel code
Impact:
- None
Testing:
- Build test only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5
smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE
...
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code
Impact:
- All SMP configurations
Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-04-19 21:46:39 -05:00
Abdelatif Guettouche
c1b0ee436c
arch/xtensa/src/esp32/Kconfig: Make bank switching default to disabled.
...
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-19 07:48:35 -05:00
Xiang Xiao
2335b69120
arch: Allocate the space from the beginning in up_stack_frame
...
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0
arch: Rename g_intstackbase to g_intstacktop
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
YAMAMOTO Takashi
3806803a7a
arch/xtensa/src/esp32/esp32_user.c: Implement L16SI emulation
...
I don't know why this was not necessary before.
Probably I was just lucky about the combination of configs.
Or maybe some of recent changes happened to make the compiler
to use the instruction.
```
400d38f0 <mm_givesemaphore>:
400d38f0: 004136 entry a1, 32
400d38f3: 228c beqz.n a2, 400d38f9 <mm_givesemaphore+0x9>
400d38f5: 0228 l32i.n a2, a2, 0
400d38f7: 52cc bnez.n a2, 400d3900 <mm_givesemaphore+0x10>
400d38f9: fea0b2 movi a11, 254
400d38fc: 000306 j 400d390c <mm_givesemaphore+0x1c>
400d38ff: 00 .byte 00
400d3900: 019232 l16si a3, a2, 2
400d3903: feebe5 call8 400d27c0 <getpid>
400d3906: 0813a7 beq a3, a10, 400d3912 <mm_givesemaphore+0x22>
400d3909: 05a1b2 movi a11, 0x105
400d390c: f241a1 l32r a10, 400d0210 <_stext+0x1f0>
400d390f: ff23e5 call8 400d2b4c <_assert>
400d3912: 1288 l32i.n a8, a2, 4
400d3914: 0828a6 blti a8, 2, 400d3920 <mm_givesemaphore+0x30>
400d3917: 880b addi.n a8, a8, -1
400d3919: 1289 s32i.n a8, a2, 4
400d391b: 000606 j 400d3937 <mm_givesemaphore+0x47>
400d391e: 00 .byte 00
400d391f: 00 .byte 00
400d3920: ffaf82 movi a8, -1
400d3923: 015282 s16i a8, a2, 2
400d3926: 00a082 movi a8, 0
400d3929: 016282 s32i a8, a2, 4
400d392c: 02ad mov.n a10, a2
400d392e: feb125 call8 400d2440 <sem_post>
400d3931: 19a1b2 movi a11, 0x119
400d3934: fd4a96 bltz a10, 400d390c <mm_givesemaphore+0x1c>
400d3937: f01d retw.n
400d3939: 000000 ill
```
2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
a28de1d681
arch/xtensa/src/esp32/esp32_user.c: Fix S16I/L16LU emulation
...
I misunderstood how imm8 is used to calculate the address.
2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
51490bad55
modlib: Implement sh_addralign handling
...
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.
Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
2021-04-14 21:17:07 -05:00
Alan Carvalho
ac5fb7d701
esp32: Fix GPIO Pull-Up/Pull-Down using RTC GPIO
...
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting
pull-up/pull-down resistors. These pins are RTC GPIO pins and need
to have pull-up/pull-down configured in the RTC registers.
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-04-11 14:36:02 +01:00
Xiang Xiao
3f67c67aaf
arch: Fix the stack boundary calculation and check
...
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 08:39:54 -07:00
Xiang Xiao
0fdde5be26
arch/esp32: Fix error: Mixed case identifier found
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 12:00:06 +01:00
Gustavo Henrique Nihei
4d4250fcca
xtensa/esp32: Improve SPI polling to use the entire HW buffer
2021-04-08 23:36:28 -05:00
Matias N
ab206687bb
Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h
2021-04-07 21:27:06 -05:00
Alin Jerpelea
cb2ecefbf1
arch: xtensa: fix nxstyle errors
...
Fix for errors reported by nxstyle tool
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Matias N
d88b5aac97
esp32: move common XTAL and RUN_IRAM configs to ESP32 KConfig
2021-04-07 21:45:48 +01:00
Alan Carvalho de Assis
bac84de45f
esp32c3: Add support to RNG driver
...
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-03 07:20:03 -05:00
Alan C. Assis
18f88c35fc
esp32: Fix small typo that will trigger an error when IPv6 is enabled
2021-04-03 00:53:02 -05:00
Alin Jerpelea
778f050102
arch: xtensa: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-02 03:14:31 -05:00
Gustavo Henrique Nihei
2d0e690803
xtensa/esp32: Refactor register access functions on SPI driver
2021-04-01 17:13:55 -03:00
Alin Jerpelea
3d96d5f2ce
arch: esp32: Mixed Case identifier fix
...
Fix Mixed Case Identifier reported by nxstyle
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4e26e39ffe
arch: xtensa: Espressif Systems: update licenses to Apache
...
Espressif Systems has submitted the SGA and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Matias N
8ed2bb8eb5
esp32: remove unneeded "INFO" and "ERROR" prefixes to syslog calls
2021-03-31 07:37:18 -03:00
Matias N
a5a435e98f
esp32: remove extra initial newline on syslog call
2021-03-31 10:04:42 +01:00
Gustavo Henrique Nihei
77c5995f93
xtensa/esp32: Use essential boolean expressions on condition statements
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
5e8eb420b7
xtensa/esp32: Fix MISO/MOSI data length field configuration
...
Both fields were being configured with the total number of remaining
bytes instead of the number of bytes actually bound to DMA descriptors.
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
b4dbae1b10
xtensa/esp32: Commit setbits configuration before SPI transaction
...
The motivation is to avoid consistency issues when using Mixed Mode
(i.e. Polling and Interrupt/DMA transfers being used interchangeably)
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
4d877abf3f
xtensa/esp32: Avoid incrementing a NULL pointer for RX buffer
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
a27d5b1063
xtensa/esp32: Remove useless pointer check in SPI DMA exchange
2021-03-30 01:23:02 -05:00
Brennan Ashton
0a3b20e546
syslog: Drop extra carriage return from syslog calls
2021-03-28 21:24:00 -05:00
Gustavo Henrique Nihei
96037f01d5
xtensa/esp32: Clean up unused include headers from DMA driver
2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
d3342795a8
xtensa/esp32: Fix wrong math round operation on DMA init
2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
eb505ed866
xtensa/esp32: Fix DMA burst mode being unintendedly disabled
2021-03-26 23:39:53 -05:00
Sara Souza
59313c86d1
xtensa/esp32: Adds oneshot timer driver.
2021-03-24 16:01:26 -03:00
chenwen
f54aef9977
xtensa/esp32: Support esp32 wireless ioctl cmd
2021-03-23 16:29:52 -03:00
Abdelatif Guettouche
fcafacb9a3
esp32_allocateheap.c: Adjust the region of the heap coming from the
...
external memory when a BSS section is allowed to reside there.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
cc23bdeca4
boards/xtensa/esp32: Add a section in external memory to hold some BSS
...
data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
YAMAMOTO Takashi
37300a43a5
esp32_part_ioctl: Return -ENOTTY for unknown commands
...
It's traditional to use ENOTTY for this purpose.
Littlefs seems to rely on this behavior for BIOC_FLUSH.
Also, drop the log level.
2021-03-22 19:49:27 -07:00
Gustavo Henrique Nihei
e4efa9dfa7
xtensa/esp32: Fix interrupt flag configuration for DMA transfers
...
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
20d24fe148
xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled
...
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
27e2da33b4
xtensa/esp32: Fix buffer size word-alignment for DMA transfers
2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
bfc551484a
xtensa/esp32: Clean up esp32_dma_init code
...
Removed "isrx" parameter whose only purpose is to trigger an assertion
on DEBUG builds. Also performed a minor refactor.
2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
dc7a0b0a5c
xtensa/esp32: Use Polling instead of DMA for transfers below threshold
...
Also refactored code to remove a confusing duplicate "dma_chan" field
which had the same purpose of the "use_dma" boolean.
2021-03-19 23:13:32 -07:00
Abdelatif Guettouche
27d5c9340a
esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in
...
QEMU, the image is different.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-18 11:28:36 +09:00
Jiuzhu Dong
e96c8b9283
fs: allocate file/socket dynamically
...
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-17 06:46:42 -07:00
Dong Heng
b2f5031e96
xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence
2021-03-16 10:20:59 -03:00
Abdelatif Guettouche
28160823b6
arch/xtensa/esp32: ~6KB of memory at address 0x3ffae6f0 is not used by
...
the ROM bootloader, add that to the heap as well.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
8389e83742
esp32/memory_layout.h: Update the layout taking under consideration the
...
changes to the heap regions and to the internal heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
9cfc30fa85
memory_layout.h: Fix the start of region2 when a QEMU image generation
...
is enabled.
That region is technically part of the PRO CPU and we should be able to
allocate it early. However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU. So, when APP CPU starts
during the SMP bring up it will corrupt some data.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
7fbc350589
xtensa/esp32: Warn about unused memory regions.
...
In case CONFIG_MM_REGIONS doesn't include all the available memory
regions the user will have a warning to increase it.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
5c7d041b91
arch/xtensa/esp32: In SMP case move the internal memory to region 3.
...
Region 2 is only 15KB in SMP, so we don't have enough memory to play
with.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
cba44928d2
arch/xtensa/esp32: Part of the ROM regions in middle of DRAM are not
...
used, retrieve them as heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
a68a39c785
xtensa/esp32: Move internal heap to the beginning of region 2.
...
Internal heap was occupying the region straight after .data up to
HEAP_REGION1. The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Sara Souza
4ca0c6e3c8
xtensa/esp32: timer driver refactor
2021-03-14 20:22:36 -03:00
Alin Jerpelea
bd94263a33
arch: Makefile: Author Gregory Nutt: update licenses to Apache
...
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
Abdelatif Guettouche
7d406c9f9f
xtensa_backtrace.S: Fix the file header.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-11 21:24:01 +08:00
YAMAMOTO Takashi
16d3e787de
xtensa hostfs: Make host_stat populate st_size
...
A clumsy implementation using lseek.
This would allow more applications to use hostfs directly.
Tested lightly with CONFIG_EXAMPLES_STAT.
2021-03-10 14:15:24 +08:00
Gustavo Henrique Nihei
330eff36d7
sourcefiles: Fix relative path in file header
2021-03-09 23:18:28 +08:00
Gustavo Henrique Nihei
47cb41c92f
makefiles: Fix relative path in file header
2021-03-09 23:18:28 +08:00
Dong Heng
2f4e1c02de
xtensa/esp32: Add WPA2 Enterprise and WPA3 support
2021-03-09 11:20:34 -03:00
YAMAMOTO Takashi
e05762c488
esp32/memory_layout.h: Replace Gregory Nutt's copyright notice
...
The old copyright notice was inherited from esp32_allocateheap.c.
The new copyright notice was copy-and-pasted from sched_getcpu.c.
2021-03-05 10:15:52 +00:00
YAMAMOTO Takashi
3857d7491f
esp32: Extract memory layout definitions to a separate header
2021-03-05 10:15:52 +00:00
Gustavo Henrique Nihei
cd02fd1700
xtensa/esp32: Add support for I2C tracing
2021-03-04 22:09:37 +00:00
Gustavo Henrique Nihei
1aebe47c71
xtensa/esp32: Use OR operation when configuring pin driver
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
23f0d8c17b
xtensa/esp32: Fix default GPIO function when no option is provided
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
9c366aad94
xtensa/esp32: Allow pin to be configured as Input and Output simultaneously
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
210a77de93
xtensa/esp32: Configure GPIO as INPUT only when required
2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
f5342d00fc
xtensa/esp32: Fix Kconfig file formatting
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
984e0f0ec9
xtensa/esp32: Add missing option for I2C reset
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
79ea96a1d0
xtensa/esp32: Fix ESP32_I2C option bringing the char driver
2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
5e9e2bec32
xtensa/esp32: Change I2C SCL default pin to a valid one
...
Current default pin for I2C SCL is not available for mapping with IOMUX
peripheral.
2021-03-03 19:00:15 -08:00
Abdelatif Guettouche
77302f9d3a
xtensa/esp32: Add more flash options to esptool.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-03 18:28:18 -08:00
ligd
f9d20ea4d2
sigdeliver: fix system block when kill signal to idle in SMP
...
Bug description:
CONFIG_SMP=y
Suppose we have 2 cores in SMP, here is the ps return:
PID GROUP CPU PRI POLICY TYPE NPX STATE STACK USED FILLED COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 004076 000748 18.3% CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 004096 000540 13.1% CPU1 IDLE
nsh> kill -4 0
or:
nsh> kill -4 1
system blocked.
Reason:
In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.
Fix:
Add condition to cover saved_irqcount == 0.
Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 15:03:32 +00:00
chenwen
19627095e4
esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration
2021-03-02 18:27:20 -08:00
chenwen
516c553b97
esp32/esp32_wifi_adapter.c: Fix the issue of WiFi internal malloc from PSRAM
2021-03-02 18:27:20 -08:00
YAMAMOTO Takashi
c230edea29
esp32_ummap: write back spiram cache before calling Cache_Flush
...
This seems to fix esp32_readdata_encrypted() with spiram "buffer".
Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
2021-03-02 08:37:50 +00:00
Gustavo Henrique Nihei
ed0a1b724b
xtensa/esp32: Fix typos reported by codespell
2021-02-25 15:02:15 +00:00
YAMAMOTO Takashi
ee8cea1f4b
esp32: xtensa_user: Implement a few more instructions
...
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
2021-02-24 10:34:55 +00:00
Masayuki Ishikawa
e87d14721e
arch: xtensa: Fix stack coloring
...
Summary:
- Call up_stack_color() correctly in the up_create_stack()
- Fix nwords calculation in up_stack_color()
- Also, refactor up_stack_color()
- Fix do_stackcheck() to consider stack alignment
Impact:
- Only for CONFIG_STACK_COLORATION=y
Testing:
- Tested with esp32-devkitc:wapi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 19:05:07 -08:00
Masayuki Ishikawa
3ddfab239f
arch: xtensa: Fix a compile warning in xtensa_dumpstate.c
...
Summary:
- This commit fixes a compile warning if CONFIG_ARCH_INTERRUPTSTACK is set
Impact:
- None
Testing:
- Built with esp32-devkitc:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 09:11:27 +00:00
Masayuki Ishikawa
102adaf026
arch: esp32: Fix a memory leak when discarding a large packet.
...
Summary:
- Recently I noticed that ESP32-DevKitC-32D suddenly stops
during receiving ping packets from PC after 10-20mins
- Actually, sometimes memory leak happened when some device
sent a big broadcast packet periodically on the network
- This commit fixes this issue by calling esp_wifi_free_eb()
in the case that the packet exceeds WLAN_BUF_SIZE.
- Also, this commit applies the same logic in the case that
the Wi-Fi interface is down
Impact:
- None
Testing:
- Tested with esp32-devkitc:wapi
Suggested-by: YAMAMOTO Takashi <yamamoto@midokura.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-17 12:55:08 +09:00
YAMAMOTO Takashi
aed24f1255
esp32: Retire XTENSA_IMEM_PROCFS
...
Now /proc/meminfo has the equivalent.
2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
7bb849535c
esp32_modtext.c: Report the usage with procfs_register_meminfo
2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
c51e2a0cb3
esp32_imm.c: Report the usage with procfs_register_meminfo
2021-02-12 03:16:03 -08:00
Alan C. Assis
f56ff40101
Add esp32_gpio_matrix_in/out to replace ROM functions
2021-02-11 20:39:51 +00:00
chenwen
dcec04f5b2
xtensa/esp32: Writeback PSRAM data when mapping SPI Flash address to ESP32's address bus
2021-02-09 08:26:45 -03:00
YAMAMOTO Takashi
2220827463
esp32_allocateheap.c: Add a sanity check
2021-02-09 07:51:12 +00:00
YAMAMOTO Takashi
63c08a79be
esp32_allocateheap.c: Add a comment
2021-02-09 07:51:12 +00:00
Gustavo Henrique Nihei
a8cf8abfaa
esp32: Create chip selection config to improve capabilities refinement
2021-02-08 21:17:22 +00:00
Masayuki Ishikawa
d87f350831
arch, boards, drivers, include, sched, wireless: Change spinlock APIs.
...
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
g_irq_spin for backword compatibility (In this case, NULL must be specified)
Impact:
- None
Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-07 21:28:56 -08:00
Gustavo Henrique Nihei
29b9cf652e
xtensa/esp32: Add extern modifier to ROM function declaration
2021-02-05 14:05:44 -03:00
Abdelatif Guettouche
685c2ce506
esp32_spiflash.c: Fix preprocessor condition.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-05 12:16:55 -03:00
Alan C. Assis
c4f87977dc
xtensa/esp32: Fix cache issue detected by DEBUG_ASSERTION
2021-02-04 21:22:01 +00:00
Alan C. Assis
bf384a7e33
esp32/psram: Fix missing configs
2021-01-28 05:14:36 -08:00
Abdelatif Guettouche
82aae4deb6
esp32/esp32_wifi_adapter.c: Print debug output only when DEBUG_WIRLESS*
...
are enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-28 07:51:31 +09:00
Abdelatif Guettouche
6bc070024d
arch/xtensa/Kconfig: Reduce the default value of the internal memory.
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The static memory is now divided at almost the middle to not override
the ROM data. The old 0x28000 will take all of what's left for heap
region1.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 09:49:58 -08:00
Masayuki Ishikawa
b9d4bd0854
arch: esp32: Fix compile errors with CONFIG_SMP=y
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Summary:
- This commit fixes compile errors in esp32_spiflash.c and
esp32_wifi_adapter.c with CONFIG_SMP=y
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
+CONFIG_SMP=y
+CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+CONFIG_SMP_NCPUS=2
+CONFIG_SPINLOCK_IRQ=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-27 04:47:05 -08:00
Alan C. Assis
6a87b85285
xtensa/esp32: Add efuse driver
2021-01-26 18:23:43 -08:00
Abdelatif Guettouche
6bf826acca
arch/xtensa/src/esp32/esp32_spiflash.c: Fix the value of the page start
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address.
It was incorrectly taken from the size.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-26 15:27:16 -03:00
Xiang Xiao
94da3e4c3a
arch: Remove critical section inside up_schedule_sigaction
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since nxsig_tcbdispatch already hold it for us
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
Alan C. Assis
394cfba1d8
Fix himem debug assert error
2021-01-22 00:00:04 +01:00
Dong Heng
4bbc17454c
xtensa/esp32: Add AES hardware accelerator driver
2021-01-21 15:06:35 -03:00
Abdelatif Guettouche
c87e5965b7
xtensa/esp_allocateheap.c: Correct ROM memory boundries.
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SMP was broken because the ROM memory wasn't set correctly. Some
regions were shared with the ROM code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-21 11:13:19 -03:00
YAMAMOTO Takashi
a4a2d5ff7d
esp32_dma_init: Fix a dubious assertion
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Requiring the size to be a multiple of 3 is a very strange restriction.
It doesn't even work with the default value of SPI_SLAVE_BUFSIZE.
I guess it was a typo.
2021-01-21 10:51:46 +01:00
YAMAMOTO Takashi
8c02b366f8
esp32_free_cpuint: Fix an assertion
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The original assertion was wrong because:
* cpuint numbers for edge interrupts are not dense
(while ESP32_CPUINT_NEDGEPERIPHS is 4, EPS32_CPUINT_EDGESET is not 0xf.)
* This function is used for level interrupts too
2021-01-21 10:37:03 +01:00
Dong Heng
eb2937003b
xtensa/esp32: Fix ESP32 SPI driver issues
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1. reset SPI hardware when deinitializing
2. reset SPI priavte configuration data when deinitializing
3. free interrupt when deinitializing
2021-01-18 12:54:12 +01:00
Dong Heng
4693857b2c
xtensa/esp32: Fix ESP32 I2C driver issues
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1. when sending a message in a group fails, exit immediately
2. when catch I2C error interrupt, close interrupt
3. clear clock configuration when deinit I2C
4. free I2C interrupt when deinit I2C
2021-01-18 09:23:47 +01:00
Abdelatif Guettouche
c00141c41a
arch/xtensa/Kconfig: The ESP32 has a different numbers for vectors and
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IRQs.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-15 09:47:33 +01:00
Abdelatif Guettouche
8e4397968c
net/ & esp32/wlan: Fix some typos and nxstyle issues.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-14 07:57:27 -06:00
YAMAMOTO Takashi
ca0932f842
esp32_i2c.c: Remove useless casts
2021-01-13 11:04:59 +01:00
Xiang Xiao
0536953ded
Kernel module should prefer functions with nx/kmm prefix
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Dong Heng
7a953bb154
xtensa/esp32: Fix ESP32 SPI3 slave ops data error
2021-01-11 09:10:18 +01:00
ligd
f63db66382
mqueue: add file_mq_xx for kernel use
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Change-Id: Ida12f5938388cca2f233a4cde90277a218033645
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-01-05 02:40:43 -06:00
Dong Heng
fadae0bf39
xtensa/esp32: Fix ESP32 serial UART tx ready check error
2021-01-04 09:19:53 +01:00
Sara Souza
65f39fc0c7
xtensa/esp32: Added driver api to reload counter instantly
2020-12-28 12:08:27 +01:00
Sara Souza
6a6121378c
xtensa/esp32: Fixed wdt typos
2020-12-22 20:32:38 +01:00
YAMAMOTO Takashi
0fbfc4c44c
esp32_wifi_adapter.c: file mode for open doesn't make sense for O_RDONLY
2020-12-22 03:37:29 -06:00
Huang Qi
073912e232
Replace all wget with curl
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wget is missing from some system (like macOS and Windows native),
it's better to use curl to simplify build environment.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-12-22 03:36:10 -06:00
Masayuki Ishikawa
ec73a4e69c
arch & sched: task: Fix up_exit() and nxtask_exit() for SMP
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Summary:
- During repeating ostest with sabre-6quad:smp (QEMU),
I noticed that pthread_rwlock_test sometimes stops
- Finally, I found that nxtask_exit() released a critical
section too early before context switching which resulted in
selecting inappropriate TCB
- This commit fixes this issue by moving nxsched_resume_scheduler()
from nxtask_exit() to up_exit() and also removing
spin_setbit() and spin_clrbit() from nxtask_exit()
because the caller holds a critical section
- To be consistent with non-SMP cases, the above changes
were done for all CPU architectures
Impact:
- This commit affects all CPU architectures regardless of SMP
Testing:
- Tested with ostest with the following configs
- sabre-6quad:smp (QEMU, dev board), sabre-6quad:nsh (QEMU)
- spresense:wifi_smp
- sim:smp, sim:ostest
- maix-bit:smp (QEMU)
- esp32-devkitc:smp (QEMU)
- lc823450-xgevk:rndis
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-21 23:29:56 -06:00
Abdelatif Guettouche
81a9eb190d
arch/xtensa/src/esp32/esp32_spiflash.c: Invalidate the cache and
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writeback PSRAM data if the flash address used has a cache mapping.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-18 16:43:52 -03:00
chao.an
4a559807a5
arch/netdev: try tcp timer in every txavail call
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In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().
This patch is mainly to improve the performance of TCP handshake.
Original:
nsh> tcp_client
[ 1.536100] TCP connect start.
[ 2.000200] TCP connect end. DIFF: tick: 4641, 464ms.
[ 3.000300] TCP connect start.
[ 4.000400] TCP connect end. DIFF: tick: 10001, 1000ms.
[ 5.000500] TCP connect start.
[ 6.000600] TCP connect end. DIFF: tick: 10001, 1000ms.
[ 7.000700] TCP connect start.
[ 8.000800] TCP connect end. DIFF: tick: 10001, 1000ms.
Optimized:
nsh> tcp_client
[ 3.263600] TCP connect start.
[ 3.263700] TCP connect end. DIFF: tick: 1, 0ms.
[ 4.263800] TCP connect start.
[ 4.263800] TCP connect end. DIFF: tick: 0, 0ms.
[ 5.263900] TCP connect start.
[ 5.263900] TCP connect end. DIFF: tick: 0, 0ms.
[ 6.264000] TCP connect start.
[ 6.264000] TCP connect end. DIFF: tick: 0, 0ms.
[ 7.264100] TCP connect start.
[ 7.264100] TCP connect end. DIFF: tick: 0, 0ms.
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-18 14:16:11 +09:00
YAMAMOTO Takashi
48ba0bb30a
esp32_wifi_adapter.c: Fix a use-after-free bug
2020-12-17 03:24:15 -06:00
YAMAMOTO Takashi
75bc489e24
esp32: Fix phy_printf
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Fix the following error:
CC: chip/esp32_wifi_adapter.c
In file included from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/mm/shm.h:45,
from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/sched.h:42,
from /Users/yamamoto/git/nuttx/nuttx/include/sched.h:35,
from /Users/yamamoto/git/nuttx/nuttx/include/stdio.h:48,
from chip/esp32_wifi_adapter.c:28:
chip/esp32_wifi_adapter.c: In function 'phy_printf':
chip/esp32_wifi_adapter.c:3952:10: error: expected ')' before 'format'
wlinfo(format, arg);
^~~~~~
2020-12-17 03:24:15 -06:00
Sara Souza
1acba417c4
xtensa/esp32: enables started flag if the wdt was turned on in bootloader
2020-12-16 16:35:55 -03:00
Sara Souza
71715aaee8
xtensa/esp32: fixes enable int function and gets apb clk frequency through function
2020-12-16 10:48:02 -03:00
Sara Souza
add46d0408
xtensa/esp32: Added support for RTC WDT
2020-12-16 14:37:39 +01:00
Sara Souza
be12c79c52
xtensa/esp32: Changes in rtc driver to support rtc wdt driver
2020-12-16 14:37:39 +01:00
Abdelatif Guettouche
ecede04263
arch/*/src/Makefile: Generate dependencies for head files.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-15 21:00:52 -06:00
Xiang Xiao
625eef20f0
arch: Remove the special check for idle thread in up_use_stack
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since the idle thread don't call up_use_stack anymore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
Xiang Xiao
efee1c6ded
arch: Initialize the idle thread stack info directly
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
YAMAMOTO Takashi
cb71469f85
esp32: Fix a typo. ESP_SPIRAM_BOOT_INIT -> ESP32_SPIRAM_BOOT_INIT
2020-12-15 02:07:05 -06:00
John Bampton
ba12c6c0cf
Fix spelling
2020-12-12 19:18:08 +01:00
Sara Souza
6244924c3e
Removed initconf from esp32_wtd_ops_s
2020-12-10 20:31:15 -06:00
Sara Souza
2a9dab2e5d
xtensa/esp32: allows the rtc wdt to be configured in bootloader and used later
2020-12-10 20:31:15 -06:00
Abdelatif Guettouche
f7c5b467e1
arch/xtensa/src/esp32: Remove the EXPERIMENTAL config from the Wireless.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
56713e0304
arch/xtensa/src/esp32/Make.defs: Don't condition including the low level
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WDT driver with the upper layer driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
3ba5018b37
boards/xtensa/esp32: A bit of re-organisation in the ESP32 boards.
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Move the common files into the common directory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Masayuki Ishikawa
409c65ce0b
arch, sched: Fix global IRQ control logics for SMP
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Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
set in sched_add_readytorun(), sched_remove_readytorun() and
up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
the CPU will only hold a critical section. Thus, the issue such as
'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO
Impact:
- All SMP implementations
Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-10 08:33:42 +01:00
Abdelatif Guettouche
5d7428a385
arch/xtensa: Fix alignement when coloring and checking the stacks.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
7075c98978
arch/xtensa: Add a pseudo save area to be able to backtrace from
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interrupts
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
1f96f42f1e
arch/xtensa/include/irq.h: Reserve some space for interptee's BSA.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
368d21a0b9
arch/xtensa/src/common/xtensa_context.S: Name A3 register the usual way.
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i.e. a3 instead of r3.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
5f9d9ba44c
arch/xtensa/src/common/xtensa_context.S: Don't save CALL0 ABI
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callee-saved registers.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
716a29ebeb
arch/xtensa/src/common/xtensa_backtrace.S: Update the comments to show
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the functions in play during the backtrace.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
YAMAMOTO Takashi
58fdaa5c2d
arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a syslog format
2020-12-05 08:13:32 -06:00
Dong Heng
3bb9a42c6b
xtensa/esp32: Refactor ESP32 Wi-Fi driver
2020-12-04 09:39:11 -03:00
Alan C. Assis
3865960b89
esp32/esp32-core: Fix #ifdef warning and update MM_SECTIONS
2020-12-01 21:36:07 +01:00
Abdelatif Guettouche
298e1ddebf
arch/xtensa/src/common: Don't include ESP32 files directly, include them
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from the chip simlink.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-28 10:24:12 -03:00
Abdelatif Guettouche
967fbebcb9
arch/xtensa: Fix stack's alignment
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-28 10:24:12 -03:00
chao.an
32ba194372
style/code: remove unnecessary trailing whitespace
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N/A
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chao.an
049c991d28
style/Kconfig: remove unnecessary trailing whitespace
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N/A
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chao.an
c56785bd0d
style/Makefile: remove unnecessary trailing whitespace
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N/A
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chenwen
cb8d267230
xtensa/esp32: Announce the power management state change to feed watchdog
2020-11-25 10:53:05 -03:00
chenwen
2991418b2e
xtensa/esp32: keep cpu clock while configured cpu clock is consistent with the default
2020-11-25 10:53:05 -03:00
chenwen
39322e1158
xtensa/esp32: Get CPU frequency from the rtc register
2020-11-25 10:53:05 -03:00
chenwen
1847a67e05
xtensa/esp32: Add sleep reject reasons
2020-11-25 10:53:05 -03:00
chenwen
5c5e0494f3
xtensa/esp32: Keep VDDSDIO power on if PSRAM is enabled
2020-11-25 10:53:05 -03:00
Masayuki Ishikawa
b237748f50
Revert "arch: xtensa: Fix the pause handler for SMP"
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This reverts commit 1914aac05f
.
2020-11-25 00:02:37 +01:00
YAMAMOTO Takashi
a24f66f31f
arch/xtensa/src/esp32/esp32_spi.c: Fix a syslog format
2020-11-22 19:01:05 -08:00
YAMAMOTO Takashi
2aced358a8
arch/xtensa/src/esp32/esp32_wtd_lowerhalf.c: Fix a syslog format
2020-11-22 19:01:05 -08:00
Alan C. Assis
31c14726d5
Replace all assert() with DEBUGASSERT()
2020-11-22 07:43:04 -08:00
Alan C. Assis
3352d3863c
esp32_himem: Fix issue that was preventing to map all free memory
2020-11-22 07:43:04 -08:00
Matias N
d5b6ec450f
Parallelize depend file generation
2020-11-22 09:02:59 -03:00
Abdelatif Guettouche
fc5874ad75
arch/xtensa/src/common/xtensa_createstack.c: Fix stack alignement.
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The required stack alignement is 16 bytes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
56198992e5
arch/xtensa/src/common/xtensa_windowspill.S: Remove the #if 0 to include
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the spill function. It's now needed.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
f80ed10f97
arch/xtensa/src/esp32/chip_memory.h: Chip implementation of memory test
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functions needed by the arch.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
9d28687b6f
arch/xtensa: Print backtrace on assertions.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Masayuki Ishikawa
1914aac05f
arch: xtensa: Fix the pause handler for SMP
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Summary:
- Apply the same logic added to cxd56_cpupause.c
Impact:
- SMP only
Testing:
- Tested with esp32-core:smp (QEMU)
- Run smp and ostest
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-20 00:49:25 -08:00
Abdelatif Guettouche
79b07e6c94
arch/xtensa/src/esp32/esp32_gpio.c: Fix GPIO IRQ assert condition.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-19 07:38:59 -08:00
YAMAMOTO Takashi
b8e559bb2e
xtensa: Add _intmax_t and _uintmax_t
2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
c18f074830
xtensa: Change _int32_t from long to int to match the compiler
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PRIx32 etc is already "x" etc.
2020-11-19 00:49:56 -08:00
Alan C. Assis
50e1a49c6e
Fix the SPIRAM_BANKSWITCH that was defined incorrectly
2020-11-18 22:21:53 +01:00
Alan C. Assis
f09d103528
xtensa/esp32: Add high memory support to work with PSRAM
2020-11-18 22:21:53 +01:00
Abdelatif Guettouche
2d7e063eb0
arch/xtensa/src/esp32/esp32_tim.c: Fix build when debug is enabled.
...
A non-existent variable was used.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-17 18:46:06 -08:00
YAMAMOTO Takashi
95a3db7629
arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a type mismatch
2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
dbb81dfd5d
arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a printf format
2020-11-16 08:29:00 -08:00
Sara Souza
e6b6f06d22
xtensa/esp32: added support to automonitor by capture
2020-11-13 13:01:40 -03:00
Dong Heng
bfb5214ef8
xtensa/esp32: Add SPI Flash hardware encryption I/O support
2020-11-13 08:37:59 +01:00
Sara Souza
b9d44017cf
xtensa/esp32: Watchdog support (MWDTs)
2020-11-08 13:05:24 -03:00
Abdelatif Guettouche
2ac2ce55d2
arch/xtensa/src/esp32/esp32_allocateheap.c: Fix the memory regions with
...
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-06 18:36:41 -03:00
Alan C. Assis
2f612a2077
xtensa/esp32: Move #if defined(SPIRAM) to inside function
2020-11-06 16:19:48 +01:00
Alan C. Assis
d11f02d772
xtensa/esp32: Fix remaining SEPARATE typo
2020-11-06 16:19:48 +01:00
Alan C. Assis
6c37d9ff80
xtensa/esp32: Avoid init PSRAM when SPIRAM is not enabled
2020-11-06 16:19:48 +01:00
YAMAMOTO Takashi
6bc93b87b0
xtensa inttypes.h: Remove PRI/SCN macros for fast and least types
2020-11-05 18:49:22 -08:00
Dong Heng
483b145f3b
xtensa/esp32: Fix rt-timer issues
...
1. function "stop" should really stop repeat timer
2. delete timer really in rt-timer task to avoid resource being broken
3. timer triggers when stopping/deleting it and skip it in ISR
2020-11-04 09:24:59 -03:00
Dong Heng
b54f0edff4
xtensa/esp32: Add Partition and OTA device
2020-11-03 21:54:07 +01:00
Dong Heng
c90697f193
xtensa/esp32: SPI Flash driver uses global sem for all MTD
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Because all MTDs operate the main SPI Flash, so not only MTD internal
function should be mutex, but also MTDs should be mutex.
2020-11-03 09:04:02 -03:00
Juha Niskanen
a01a01ab45
arch: spi: fix typos and run nxstyle
...
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-31 10:40:41 -07:00
Dong Heng
a12a79fdb3
xtensa/esp32: Fix SPI master DMA RX buffer memcpy size error
2020-10-29 11:51:05 +01:00
Dong Heng
d86fd84a8e
xtensa/esp32: Add real-time timer support for WiFi
2020-10-27 10:36:34 -03:00
Abdelatif Guettouche
58655d1efd
arch/xtensa/src/esp32: SMP case of interruptstack.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
c97d11aa7b
arch/xtensa: Add the optional interrupt stack.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
9b98f20969
arch/xtensa: Fix the naming of the internal heap functions. They should
...
be prefixed by xtensa_ instead of up_.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
34ad33c8b2
arch/xtensa/Kconfig: Add help for the seperate internal heap.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
5ac5655fa4
arch/xtensa/src/esp32/esp32_spi&spiflash: Free the correct buffer.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0182e6e8bb
arch/xtensa/src/commin/xtensa_usestack&createstack.c: Set the alignment
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to be 4 bytes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
172896728f
arch/xtensa/src/esp32/esp32_spi.c: Instead of returning with no error
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code, assert the return of the imm_malloc function.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
2fa5d65355
arch/xtensa/src/common: Refactor the mm_ macros into a separate file.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a
arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7db8b920ff
arch/xtensa/src/esp32/hardware: PIN_CTRL was defined twice.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0ba0a3a092
arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
b6429a50d7
arch/xtensa/src/esp32/esp32_allocateheap.c: Delete a preprocessor
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warning that's not relevant anymore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225
arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM
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when the given buffer is from PSRAM.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b
arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
a1318926b4
arch/xtensa/esp32: Allow internal drivers and tasks' stack to be
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allocated in an internal heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Yoshinori Sugino
3ac90fca79
Remove tabs and spaces at the end of lines
2020-10-24 09:38:21 +01:00
YAMAMOTO Takashi
89c9855d7b
esp32: Fix a few #endif comments
2020-10-20 18:50:28 +08:00
Xiang Xiao
eb4121ce38
Change all 'Nuttx' to 'NuttX'
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Unify the naming convention
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
liuhaitao
d5c6bfe6cf
arch: Add custom arch chip build support
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Just like custom board build support, add custom arch chip build
support.
Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-10-20 14:48:16 +08:00
Juha Niskanen
94f0f55911
arch: serial: fix all TCGETS retrieving zero baud rate
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cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-20 14:43:19 +08:00
YAMAMOTO Takashi
60a6d9cfe5
arch/xtensa/src/esp32/esp32_wlan.c: Fix an unused var warning
...
chip/esp32_wlan.c: In function 'esp_ioctl':
chip/esp32_wlan.c:1262:30: warning: unused variable 'req' [-Wunused-variable]
struct mii_ioctl_notify_s *req;
^~~
2020-10-19 21:06:07 -07:00
chenwen
67c0af650f
xtensa/esp32: Add power management of deep-sleep
2020-10-17 19:38:14 -03:00
Alan C. Assis
3108233b8a
Remove not needed esp32_caps.h
2020-10-17 20:02:43 +01:00
Alan C. Assis
b3905e1c03
Modify the PSRAM pins config to avoid duplicating the definitions
2020-10-17 20:02:43 +01:00
Alan C. Assis
e956c3d1d3
Fix warnings and remove not used function
2020-10-17 20:02:43 +01:00
Dong Heng
a0b84ae53e
xtensa/esp32: Add ESP32 WiFi adapter and driver
2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
0345b1edf7
arch/xtensa/src/esp32/Make.defs: Download Espressif's Wireless-3rdparty
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library.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
609a5fa4f0
arch/: Add the ARCH_SRC directory to the context and clean_context
...
targets
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
286d947caf
arch/xtensa: Fix some alingments and typos in assembly code.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-11 00:53:38 +08:00
Abdelatif Guettouche
20f701f2ec
arch/xtensa/src/common/xtensa.h: Include sys/types.h to have a size_t
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definition. Otherwise the build would fail ifSTACK_COLORATION is
enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-10 00:01:17 +08:00
Abdelatif Guettouche
605a49e9af
arch/xtensa/src/esp/esp32/esp32_gpio.c: Fix the function's mask test
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condition and the functions' values.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-08 09:28:53 +09:00
Abdelatif Guettouche
0fdf9c7368
arch/xtensa/src/esp32/esp32_psram.c: Adapt configgpio to the latest
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change.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-08 09:28:53 +09:00
Masayuki Ishikawa
6232e7f84e
arch: esp32: Fix crash on startup
...
Summary:
- This commit fixes crash on startup introduced by commit 232aa62f03
Impact:
- Affects all use cases for esp32
Testing:
- Tested with esp32-core:smp with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-07 18:43:13 -03:00
Sara Souza
0faf861256
xtensa/esp32: Added Timer Support
2020-10-07 14:12:22 -03:00
Alan C. Assis
232aa62f03
Add support to PSRAM using SPIRAM interface
2020-10-07 16:55:34 +01:00
Abdelatif Guettouche
d1225f3110
arch/xtensa/src/esp32: Use the same function numbering as the TRM.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
5593683552
arch/xtensa/src/esp32/esp32_gpio.c: When configuring a pin pad, set the
...
function first, if no function was assigned, fall back to the GPIO
function.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
564237a602
arch/xtensa/src/esp32/esp32_gpio: Function "SPECIAL" doesn't exist. All
...
pads go through the same GPIO matrix to select one of the 6 possible functions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
efb2fd5e4b
arch/xtensa/src/esp32/esp32_gpio.c: GPIO20 is not available.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
caa945cb24
arch/xtensa/src/esp32: Add a way to retrieve reset cause.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
c20c8c6dd5
arch/xtensa/esp32: Implement system reset.
...
Both CPUs are soft-reset with a call to board_reset. This is actually a
Core Reset, so both cores and all registers are reset. The only
exception is RTC.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
2e4ec442ad
arch/xtensa/src/esp32/esp32_intdecode.c: Don't clear A2, the mask
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argument is passed in that register
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 07:47:06 +09:00
saramonteiro
a562fba971
ESP32: Fixed the type of cpuint variables in esp32_emac.c esp32_i2c.c esp32_spi.c esp32_spi_slave.c
2020-10-02 09:57:56 -07:00
Abdelatif Guettouche
62732dd6b8
arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of
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ESP32_NGPIOS
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
844f39fc67
arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA
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bits so that the call to up_cpu_index is only performed when SMP is
enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
769d68a762
arch/xtensa: Fix some typos and correct some comments.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-30 13:55:28 -03:00
Masayuki Ishikawa
68f102055a
arch: xtensa: Fix up_interrupt_context() for SMP
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Summary:
- Apply the same fix for Arm SMP
Impact:
- Affects SMP only
Testing:
- Tested with esp32-core:smp (qemu)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Dong Heng
a266dc9629
arch/xtensa: Fix task signal process preemption A0 modification error
2020-09-29 09:10:53 -03:00
Abdelatif Guettouche
70c1170c2e
Revert "arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when"
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This reverts commit b5d3ba64e0
.
2020-09-29 09:07:41 -03:00
Abdelatif Guettouche
a128995eab
arch/xtensa: Few typos and style fixes.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-21 19:14:19 -04:00
chenwen
64e2f102ac
xtensa/esp32: Add power management of force-sleep
2020-09-20 17:23:07 +01:00
Xiang Xiao
bf7399a982
arch: Initialize idle thread stack information
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and remove the special handling in the stack dump
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Matias N
166242c171
use "export" to expose TOPDIR to all child make instead of passing it around every time
2020-09-15 21:11:33 -07:00
Abdelatif Guettouche
d47131d8ae
arch/xtensa/src/esp32/hardware/esp32_spi.h: Remove a leftover license.
2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
55f7473ba0
arch/xtensa/src/esp32/esp32_spiflash.c: #if0-out unused functions.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
a97a9aeaf6
arch/xtensa/src/esp32/esp32_spiflash.c: File scope global variables are
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prefixed with g_
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Matias N
3d1159007f
Remove extra application of EXTRAFLAGS and KDEFINE and the arch-level
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EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.
KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
2020-09-14 13:59:57 +09:00
Abdelatif Guettouche
c27bf32ce9
arch/xtensa/src/esp32/Kconfig: Add the SPI FLASH title to make appear in
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menuconfig.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
9c0157c882
arch/xtensa/src/esp32/esp32_spiflash.c: Cosmetic changes.
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Add missing prototypes.
Fix some alignements.
Add some more comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
6b6d983650
arch/xtensa/src/esp32/esp32_spiflash.c: Don't double check for direct
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read mode.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Xiang Xiao
b0797263ca
libc/stdio: Allocate file_struct dynamically
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1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
2020-09-11 17:58:17 +08:00
Ouss4
06ca12e6b9
arch/: Trivial typos, mostly "their is" to "there is"
2020-09-09 14:09:43 -04:00
Xiang Xiao
f99719e260
Move note driver from drivers/syslog to drivers/note
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it's better to put the note transport layer into a common folder
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-07 11:54:10 +08:00
Johannes Schock
515ad1c388
Added KDEFINE (__KERNEL__) to EXTRAFLAGS for libboard, for other architectures.
2020-09-05 21:25:31 +08:00
Ouss4
3560e16ac7
arch/xtensa/src/esp32/esp32_spi.c: When the TX buffer is empty send
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something to kick off the SPI clock.
2020-09-04 17:43:51 -03:00
Masayuki Ishikawa
08c4376606
arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code
...
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code
Impact:
- Should have no impact because the logic is the same for SMP
Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-03 10:20:20 +08:00