to fix the gcov link error:
arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `gcov_error_exit':
libgcov-driver.c:(.text+0x7c): undefined reference to `_impure_ptr'
arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `get_gcov_error_file':
libgcov-driver.c:(.text+0x1e0): undefined reference to `_impure_ptr'
arm-none-eabi-ld: /home/xiaoxiang/vela/prebuilts/gcc/linux/arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m/nofp/libgcov.a(_gcov.o): in function `gcov_exit_open_gcda_file.isra.0':
libgcov-driver.c:(.text+0x660): undefined reference to `_impure_ptr'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
to generate more information for profile feedback optimization
and remove -lgcov from STDLIBS since gcc/clang will automatically
add the profile help lirary(triggered by -fprofile-generate).
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary:
- In case of SMP and ADDRENV, allocate the page table for each cpu
- Each cpu holds separated addrenv and MMU setting
Impact:
- armv7-a
Testing:
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)
Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
Note that pinmap.h, irq.h, fdcan.h still need to be updated with proper
register definitions for the FDCAN3 peripheral present in
STM32H7[2|3][3|5] MCUs
1.Remove CXX_INITIALIZE_MACHO and CXX_INITIALIZE_SINIT
2.Merge cxx_initialize_sinit.c and cxx_initialize_macho.c into cxx_initialize.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Adds stubs for up_addrenv_text_enable/disable_write. These don't have
to do anything as the ARM MMU allows setting access per mode. Currently
the settings for user .text area grants the kernel write access, but
revokes user write access.
When the .elf file is loaded from disk, the kernel must be given write
access to the allocated .text section in the task's address environment.
The access is removed after the elf is loaded and relocations are done.
NOTE:
The reason this works for the ARM implementation, is that the ARM MMU
can be configured to give write access for the privileged mode, but
revoke write access for the user mode.
Regardless, it would be smart to revoke write access even for the
kernel, when the kernel does not need it. This framework allows doing
that, if someone wishes to take up the task.
Summary:
- The stack pointer is subtracted to alloc xcptcontext area
in the __cpu?_start block
- Fix the stack coloration overrun to the previous cpu's xcpt area
Impact:
- armv7-a's smp configuration
Testing:
- smp and ostest on sabre-6quad:smp w/ qemu
Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
Summary:
- This commit adds hostfs support to nsh and nsh64 defconfigs
Impact:
- None
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds support for semihosting and hostfs
Impact:
- None
Testing:
- Tested with nsh and nsh64 (defconfig will be updated later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Mappings are done with vaddr=paddr.
- I/O space mapped with two gigapages
- Kernel space mapped to statically allocated page tables. 2MB of kernel
memory is supported.
- Page pool is mapped to the kernel space, to allow virtual memory access
for the kernel e.g. to initialize the page memory when it is allocated.
