Commit Graph

11112 Commits

Author SHA1 Message Date
Gregory Nutt
4b0327d845 arch/arm/src/lpc54/lpc54_sdmmc: Port Dave Marple's LPC43 USB DCD fix to the LPC54 with appropriate changed. 2018-10-21 17:55:51 -06:00
Dave Marples
b71e0a199a iFix the LPC4330 family SDMMC card access. Some of these fixes (e.g. DELAY register) may also be applicable elsewhere. These are _NOT_ extensively tested, but they are certainly better than the current state of the driver. The fixes, specifically, are;
* Clocks were wrongly configured - way too fast because there is no primary divider on LPC4330

This is fixed by means of changing the definitions in the board.h file. I've edited the one for the lpc4330-xplorer board because I'm actually working with Versiboard and don't want to contribute that config just yet while I've still got the drains up on it.

* The LPC43_SDMMC_DELAY register was not being set

I suspect, in the 'real world', it's possible to get away without setting this, but I've added a register definition, default value and register access macros into arch/arm/src/lpc43xx/chip/lpc43_scu.h and then used them in arch/arm/src/lpc43xx/lpc43_sdmmc.c.

* The LPC43_SDMMC_BLKSIZ and LPC43_SDMMC_BYTECNT registers had the wrong values.

The management have already implemented a rather nice block level interface for the stm32 so I've just re-used that to write to these registers as required. I'm slightly nervous that accessing the configuration registers (SCR being the prime example) which has a much smaller block size may not be being done in the right way but it does seem to work correctly, so let's assume it's all OK until someone tells me otherwise.

These fixes have been tested with DMA-based read/write on a LPC4330. Speed via nsh is pretty low but I'm assuming that's just a buffering/implementation issue for now.
2018-10-21 17:22:22 -06:00
Gregory Nutt
805c1bc2b9 Cosmetic changes for coding standard fixes. 2018-10-20 18:15:44 -06:00
Gregory Nutt
1fcd70fdb9 arch/arm/src/stm32/stm32_pwm.c: Fix a compilation error introduced in recent PR. Found in build testing. 2018-10-19 16:21:50 -06:00
Gregory Nutt
b732afc718 arch/arm/src/stm32: Costmetic changes from review of last PR. 2018-10-18 10:44:23 -06:00
Daniel Agar
cfc5b59636 Merged in dagar/nuttx/pr-stm32_dma_per_spi (pull request #736)
stm32 enable separate DMA per SPI configuration

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-18 16:36:14 +00:00
Mateusz Szafoni
6e18a32b3f Merged in raiden00/nuttx_pe (pull request #734)
stm32_pwm: break and lock configuration and some cosmetics

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-15 17:18:38 +00:00
Mateusz Szafoni
632bba3af8 Merged in raiden00/nuttx_pe (pull request #733)
Improvements in STM32 PWM low level driver

stm32_pwm: remove some impossible PWM configurations

stm32_pwm: support for complementary outputs

stm32_pwm: deadtime configuration

stm32_pwm: output polarity and IDLE state configuration

nucleo-f302r8: pwm support

stm32f429i-disco: pwm support

configs: update some configurations according to changes in STM32 PWM driver

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-14 14:08:52 +00:00
Ivan Ucherdzhiev
42f1f8898b /arch/arm/src/imxrt/imxrt_lpi2c.c: Fixes 2 bugs in the for IMXRT1050: (1) I2C time out and did not send STOP condition when sending single byte, (2) I2C could not receive bytes after repeated start. 2018-10-13 06:38:33 -06:00
Gregory Nutt
2deaab261f arch/arm/src/lpc43xx/lpc43_serial.c: Fix some minor typos in comments. 2018-10-12 17:07:04 -06:00
Dave Marples
9713e0768d arch/arm/src/lpc43xx/lpc43_serial.c: Fix copy-paste error: g_usart1port->g_uart1port. 2018-10-12 17:03:50 -06:00
Gregory Nutt
c6c9064464 EFM32, Kinetis, BCM2708: Juha Niskanen's fix of commit 4a32325e3c also applies to BCM2708, EFM32, and Kinetis. 2018-10-10 06:45:03 -06:00
Juha Niskanen
4a32325e3c stm32f0, stm32f7, stm32h7, stm32l4 serial: fix use of CONFIG_SERIAL_IFLOWCONTROL for CONFIG_SERIAL_OFLOWCONTROL 2018-10-10 06:29:29 -06:00
Juha Niskanen
167663462f arch/arm/src/stm32f7/stm32_serial.c: force invalidate of data cache after DMA re-enable when returning from low-power mode 2018-10-09 06:35:43 -06:00
Ramtin Amin
b539d04cfb drivers/wireless/ieee802.11: Add capabilility for Broadcom chips to get firmware and CLM data from a mounted file system vs. in-memory data structures. 2018-10-07 10:03:39 -06:00
Gregory Nutt
82d1c17cd8 arch/arm/src/stm32/stm32_allocateheap.c: Eliminate warning, 'CONFIG_STM32_HAVE_CCM is not defined. 2018-10-05 16:53:23 -06:00
raiden00pl
342cbe58dd Merged in raiden00/nuttx_pe (pull request #732)
configs: add support for nucleo-f302r8 board

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-05 13:02:49 +00:00
raiden00pl
2fcf682316 Merged in raiden00/nuttx_pe (pull request #731)
stm32_tim.c: don't use hardcoded UIF interrupt in some functions

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-04 16:16:54 +00:00
raiden00pl
ff0640096f Merged in raiden00/nuttx_h7 (pull request #730)
Master

* stm32h7/rcc: update rcc defs, add SPI clock configuration and some fixes in rcc

* stm32h7: initial defs for SPI

* stm32h7: initial defs for MDMA, DMA, BDMA and DMAMUX

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-04 16:16:14 +00:00
Gregory Nutt
b9823ce1d7 EFM32, STM32 (FS/HS), STM32F7, and STM32L4 OTGFS/HS: Th epin_configure() function used the same eptype as the TxFIFO number for all endpoints. This should probably be the physical EP number, not the EP type. Suggested by Key Two. 2018-10-02 10:10:56 -06:00
Dave Marples
91eb792e56 Corrections for the i.MXRT Ethernet:
(1) Now the Ethernet is completely re-initialized when an error occurs by means of taking the interface down and back up but the PHY is _not_ renegotiated for that case because that is very time consuming and an error in the Ethernet is no reflection on the state of the PHY anyway.

(2) Explicitly sets the expected PHY address to zero (this could be moved into the config) rather than searching for it which takes ages, and it's zero anyway for this board (that's the broadcast address, and anything that cannot respond on that has multiple PHYs, so that would be a new board).

(3) Allows for the renegotiation of the PHY to be optional when a reset is needed. If a non-renegotiated reset doesn't result in good comms to the PHY then it'll automatically be escalated to a renegotiated one.

(4) Only performs a reset for errors that need it (the CRITICAL_ERROR define).  The list of errors that need reset are somewhat arbitrarily chosen based on my prejudices and might need to be revisited, but certainly the jabber errors don't need reset, the partial packet is thrown away by the layer above anyway.

(5) Re-loads the multicast table on reset.

(6) Adds a bit more logging into the imxrt Ethernet module.
2018-09-28 07:25:48 -06:00
Masayuki Ishikawa
b154c81255 Merged in masayuki2009/nuttx.nuttx/lc823450_mpu_for_flat (pull request #728)
arch/arm/src/lc823450: MPU support for FLAT build

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-27 11:34:22 +00:00
Dave Marples
4eb118afd1 arch/arm/src/imxrt/imxrt_enet.c: Fix a race condition in setting up the Ethernet Tx transfer. 2018-09-26 10:59:47 -06:00
Ivan Ucherdzhiev
910e7a3899 arch/arm/src/imxrt/imxrt_lpsrtc.c: SVNC LPCR register bits 0 & 1 are NOT reserved and are, in fact, needed to enabled the SRTC. Now the SRTC is working. 2018-09-26 10:13:20 -06:00
Ivan Ucherdzhiev
955527b14f arch/arm/src/imxrt: Add LPI2C driver. 2018-09-26 07:57:45 -06:00
Dave Marples
681609ad51 arch/arm/src/imxrt/imxrt_enet.c: The board would not come up if I ran Nuttx from cold. I dumped the PHY registers to see what the differences were and the PHY was coming up in NANDTree mode. This is a mode for testing connectivity between the PHY and the MAC. Switching this mode off in the PHY registers has fixed the problem. 2018-09-25 06:52:07 -06:00
Gregory Nutt
510b0f7e07 arch/arm/src: Correct all ARMv7-M architectures. Interrupts were not be disabled correctly on power up. Writing zero to the NVIC SET-ENABLE registers has no effect. In order to disable interrupts, it is necessary to write all ones to the NVIC CLEAR-ENABLE register. Noted by David Sidrane. 2018-09-21 21:32:50 -06:00
Gregory Nutt
6632ac721e arch/arm/src/kinetis: Remove all attempts to reprioritize interrupts. 2018-09-21 13:18:29 -06:00
Gregory Nutt
2c0a0aef9f arch/arm/src/stm32f7: Remove adhoc PM interfaces and add CONFIG_PM serial suspend. 2018-09-21 06:44:23 -06:00
Masayuki Ishikawa
9a71fdc8c1 Merged in masayuki2009/nuttx.nuttx/fix_allocheap_for_lc823450 (pull request #724)
arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c

For lc823450, heap area in flat build mode must start just after
_eronly. Because bss/data area is allocated in lower address than
text area in SRAM. See ld.scripts for details. Also, this change
removes unsed up_allocateheap.c

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-21 12:22:29 +00:00
Gregory Nutt
b823fd83bd arch/arm/src/armv7-a: Replicate the same fix was previously commited for the armv7-r. 2018-09-20 21:40:29 -06:00
EunBong Song
0f18e8cc32 Merged in ebsong/nuttx (pull request #722)
Pull request for mtd/progmem refactoring.

* mtd/progmem: change up_progmem_npages to up_progmem_neraseblocks

    page is a unit for read/write operation.
    eraseblock is a unit for erase operation.
    up_progmem_npages is a little bit confusing because it returns number of
    erase blocks in flash memory. This patch changes up_progmem_npages to
    up_progmem_neraseblocks. There is no logical change.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: up_progmem_erasesize.

    Change argument name to be more readable.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: up_progmem_eraseblock

    Change up_progmem_erasepage to up_progmem_eraseblock.
    eraseblock is more readable name than erasepage.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* mtd/progmem: change up_progmem_eraseblock's return value.

    up_progmem_eraseblock erase a block. so it's better to return the erase block
    size than page size.

    Signed-off-by: EunBong Song <eunb.song@samsung.com>

* arm/cortex-r : fix wrong cp15_flash_dcache.

    change mcrne to mcr for unconditional dcache.

    Signed-off-by: sungduk.cho <sungduk.cho@samsung.com>

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-21 03:18:38 +00:00
Gregory Nutt
ed5620897f Remove a warning 2018-09-16 13:04:12 -06:00
raiden00pl
af8a002a10 Merged in raiden00/nuttx_h7 (pull request #720)
I2C support for STM32H7

* stm32h7/chip.h: update peripherals

* stm32h7x3xx_rcc.h: update definitions

* stm32h7x3xx_rcc.c: remove some unused code and configure I2C clocks

* stm32h7: add lower half I2C driver (based on F7 I2C driver)

* configs/nucleo-h743zi: add LSM303AGR and LSM6DSL configuration

* Remove whitespace

* sensors/lsm303agr.c, sensors/lsm6dsl.c: add mising include, remove whitespace

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-16 15:58:25 +00:00
Gregory Nutt
9546481054 Fix some typographical errors. 2018-09-14 06:55:45 -06:00
David Sidrane
4a1b8e5825 Merged in david_s5/nuttx/master_kinetis_i2c_reset_hf (pull request #718)
kinetis:i2c On faild reset re-init i2c and clocking

If a reset fails, we still must reinitializes the
  i2c block so that subsequent transfers will not
  cause a hardfault due to the clock being off.
  If that transfer fails it can try to reset
  again.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-11 22:14:37 +00:00
Jakob Haufe
fe4790ec18 Merged in sur5r/nuttx-nuttx/lpc43_eth_pins (pull request #717)
arch/arm/src/lpc43xx: Fix ethernet TX_EN pin definitions

TX_EN on LPC43xx can be routed via P0.1 and PC.4 in both
MII and RMII mode.

Before, P0.1 was hardcoded for MII and PC.4 was hardcoded for RMII.

Also, the definitions used inconsistent naming (TXEN vs. TX_EN).

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-10 11:56:52 +00:00
Goden Freemans
9348f600ee arch/arm/src/stm32l4: Add getstatus and getperiod method to the timer driver (includes coding standard changes made prior to commit) 2018-09-05 08:48:24 -06:00
Juha Niskanen
069e9b899c arch/arm/src/stm32f7: Port the low-level PM functions to STM32F7. 2018-09-04 07:18:12 -06:00
Gregory Nutt
152ccbd447 configs/olimex-stm32-p407/dhtxx: Fix defconfig file. It was based on an older, incompatible version of NuttX. 2018-09-03 09:42:04 -06:00
Gregory Nutt
a6f9c6215d Update some comments 2018-09-02 12:34:45 -06:00
Gregory Nutt
5c5b6ab8f6 arch/arm/src/stm32h7: Remove old references to RXDMA. Add configuration option to select the Rx FIFO threshold level. 2018-09-02 08:35:22 -06:00
Gregory Nutt
9f6383e5fd configs/metro-m4: Verify the CMCC and enable it by default in the NSH configuration. 2018-09-01 17:03:31 -06:00
Gregory Nutt
6ada0e10ba configs/metro-m4: Fix RxD PAD selection. Add a configuration option to use OSCULP32K instead of XOSC32K. 2018-09-01 14:38:19 -06:00
Gregory Nutt
1e4272a046 arch/arm/src/samd5e5: Correct some bad addresses in the memory map. 2018-09-01 11:15:16 -06:00
Gregory Nutt
e3d7fcf7ab arch/arm/src/samd5e5/sam_lowputc.c: Only the console USART was begin enabled. 2018-09-01 10:29:09 -06:00
Gregory Nutt
d88415083f Update a README. 2018-09-01 09:47:15 -06:00
raiden00pl
fa48d27c4f Merged in raiden00/nuttx_h7 (pull request #715)
stm32h7/stm32_serial.c: don't include stm32_dma.h

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-01 11:33:20 +00:00
Gregory Nutt
438f6a866b arch/arm/src/samd5e5/: Some failed attempts to get the USART SERCOM initialized. Still worthy changes although they do not solve the problem. 2018-08-31 16:18:10 -06:00
Gregory Nutt
25dce66483 arch/arm/src/samd5e5/: Combine some duplicated GCLK configuration logic 2018-08-31 13:34:34 -06:00