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4c08492c0f
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9031 Commits

Author SHA1 Message Date
Gregory Nutt
4c08492c0f i.MX6: Fix a bit setting in the timer configuration 2016-05-17 07:21:18 -06:00
Gregory Nutt
e6728bac29 Cortex-A9 GIC: Add an interface to set interrupt edge/level trigger 2016-05-16 14:42:55 -06:00
Gregory Nutt
4feeb0c2b4 Cortex-A9 GIC: Some fixes that I don't fully understand but do indeed give me serial interrupts 2016-05-16 12:50:35 -06:00
Gregory Nutt
a0cdbcb58f Update README 2016-05-16 08:44:18 -06:00
Gregory Nutt
a3f3cc12c0 Update some comments; Fix grammatic error in ChangeLog. 2016-05-13 17:36:08 -06:00
Gregory Nutt
faca2fb1e7 ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently 2016-05-13 11:39:42 -06:00
Gregory Nutt
d14d84c1a6 ARMv7M/i.MX6: Implement CPUn n=1,2,3 startup logic 2016-05-13 09:11:55 -06:00
Gregory Nutt
e5388ad127 i.MX6: Need to set VBAR register for each CPU 2016-05-12 15:32:53 -06:00
Gregory Nutt
70782b0f14 ARMv7-A i.MX6: More SMP logic. Still untested. 2016-05-12 15:04:46 -06:00
Gregory Nutt
99e695398c Rename up_boot to arm_boot 2016-05-12 13:42:49 -06:00
Gregory Nutt
ba4ae6fdc4 Cosmetic fixes to last commit 2016-05-12 13:42:48 -06:00
David Sidrane
8a4e185c84 Kconfig edited online with Bitbucket 2016-05-12 18:50:43 +00:00
Gregory Nutt
7887b2d164 i.MX6: Add SRC register definition header file 2016-05-12 12:23:07 -06:00
Gregory Nutt
c00e3e55dc Fix several places in DMA logic where a spurious semicolon causes bad conditional logic 2016-05-11 17:42:59 -06:00
Gregory Nutt
f64f7407ba SAMDL DMAC: Fix several places in DMA logic where a spurious semicolon causes bad conditional logic 2016-05-11 17:30:04 -06:00
Gregory Nutt
f07ea1bb94 SAM (all): Fix several places in DMA logic where a spurious semicolon causes bad conditional logic 2016-05-11 17:26:59 -06:00
David Sidrane
8517a303a5 sam_xdmac.c edited online with Bitbucket 2016-05-11 23:13:24 +00:00
Gregory Nutt
f69b7d41db Merged in young-mu/nuttx/developing (pull request #15) 
Fix a bug of GPIO falling-edge interrupt for tiva
 2016-05-08 01:40:56 -06:00
Gregory Nutt
5c1c5079ea Cosmetic changes from review of last PR 2016-05-08 01:40:31 -06:00
Gregory Nutt
0143b3869a Merged in ziggurat29/nuttx/stm32l4_update_rtc_impl (pull request #14) 
Stm32l4_update_rtc_impl
 2016-05-08 01:24:09 -06:00
Young
863db15b56 Fix a bug of GPIO falling-edge interrupt for tiva 2016-05-08 13:54:51 +08:00
ziggurat29
48fc8b9dd7 problem with resetting backup domain clears clocking options set up before in *rcc.c 
use INITS flag to avoid magic reg value to detect power up reset state of rtc
correct a problem clearing interrupt flags (they weren't) which prevented an alarm from ever being used more than once per reset cycle
 2016-05-07 11:35:08 -05:00
Stefan Kolb
da1fc98a51 Fix a copy and paste error concerning the CAN driver. In the file sam_matrix.h the define SAM_MATRIX_CAN0_OFFSET is set to the wrong value. 
Error is only triggered if the global variable g_mcan0_msgram is located in RAM at an address beyond 0x20400000 + 0x0000ffff. In this case all send CAN messages have the length zero and the CAN-ID is zero as well.
 2016-05-06 04:02:28 -06:00
Gregory Nutt
050f544782 Fix typo in variable name in serial BREAK logic. Review other serial implementations for similar naming problems. 2016-05-05 11:30:47 -06:00
ziggurat29
4e57c36a8c when setting an alarm, ensure that the respective alarm triggered flag is reset, because the alarms are edge-triggered interrupts 2016-05-05 11:47:58 -05:00
ziggurat29
0d659de226 fix nasty bug in ISR handler, where interrupt was not properly acknowleged (write to CR instead of ISR, as intended). Also, minor, set the LSI prescaler values more appropriately (though not critical since LSI is so low precision anyway). 2016-05-05 11:39:19 -05:00
ziggurat29
e0371de24d correct the RTC_ALRMR_ENABLE value, it needs to ignore the date/dow component since that is not set. Also, the prescaler value for HSE (which presumes 1 MHz, anyway) had transposed digits. 2016-05-05 11:28:41 -05:00
ziggurat29
67b1f89159 address thread safety in lower half driver with a driver mutex acquired/released in public api 2016-05-05 11:22:09 -05:00
ziggurat29
273680a6e9 update RTC implementation to include the various alarm related stuff recently added to STM32 arch 2016-05-05 11:16:00 -05:00
ziggurat29
dedcbeba2e add unique id function to arch, modded board to support unique id boardctl 2016-05-03 11:09:23 -05:00
Gregory Nutt
a95e426d35 Costmetic changes from last PR 2016-04-30 09:04:38 -06:00
ziggurat29
2fe0565437 added support for HSE and MSI clocks, and auto trim of MSI to LSE (needed for USB). 2016-04-29 22:13:32 -05:00
ziggurat29
31870b22f5 booboo in config sanity check; wasn't preventing insanity 2016-04-29 07:29:17 -05:00
ziggurat29
31e7f6fd00 add configuration options to allow SRAM2 to be used for heap, or not at all, and to zero-init it on OS start, or not at all. 2016-04-26 10:12:13 -05:00
ziggurat29
1218ee5f51 bug in binding peripheral to dma channel; inverted sense of a bitmask 2016-04-25 10:27:02 -05:00
ziggurat29
8d4dccb3b9 add DMA support to QSPI; tested. Updated Kconfig to more cleanly present the options and defaults. 2016-04-24 16:28:30 -05:00
ziggurat29
0f8dc3e7b4 fixed missing DMA peripheral selection and some header defines, updated various comments to be accurate 2016-04-24 16:23:47 -05:00
Gregory Nutt
aed10e0e49 Cosmetic changes from last PR 2016-04-23 12:51:46 -06:00
Gregory Nutt
0d3a0bf603 Merged in ziggurat29/nuttx/stm32l4_qspi_004 (pull request #5) 
add QSPI memory mapped mode support.  tested.  QSPI may enter and exit memory mapped mode; while in effect, other operations (e.g. command, memory) will fail with -EBUSY.
 2016-04-23 12:46:19 -06:00
ziggurat29
8c0c70ab12 add QSPI memory mapped mode support. tested. QSPI may enter and exit memory mapped mode; while in effect, other operations (e.g. command, memory) will fail with -EBUSY. 2016-04-23 11:54:03 -05:00
Marco Krahl
8b36a83df1 stm32: fix wrong FSCM pin mapping for stm32f42x 2016-04-22 07:27:00 -06:00
Gregory Nutt
2cb52786b6 STM32F7: Add dummy stm32_spi.h header file to workaround some compilation issues. Suggest by Martin Davey. 2016-04-20 06:49:21 -06:00
Gregory Nutt
4e04b3e931 Correct configuration of GPIO pin interrupts on Kinetis K60. Fromo mrechte. 2016-04-20 06:41:51 -06:00
Gregory Nutt
b8ee28cb57 lpc4357fet256_pinconfig.h has wrong ethernet pins configuration (slow slew rate, somewhere inbuffer should be used). From Vytautas Lukenskas 2016-04-20 06:37:26 -06:00
Frank Benkert
885cd812e6 SAME70: USBHS device workaround for errata; EP7 does not support DMA on some parts 2016-04-20 06:22:04 -06:00
Gregory Nutt
8bcb5f0251 Cosmetic changes from review of last PR 2016-04-19 07:11:18 -06:00
ziggurat29
ca6cb85456 QSPI interrupt driven mode is now implemented 2016-04-19 06:55:12 -05:00
Gregory Nutt
26ba3a2b96 Cosmetic changes from review of last PR 2016-04-18 06:50:45 -06:00
Gregory Nutt
c5cce5603e Merged in ziggurat29/nuttx/stm32l4_qspi_002 (pull request #2) 
basic support for QSPI in STM32L4; verified via 'examples/media'
 2016-04-18 06:30:28 -06:00
ziggurat29
499fea73ec basic support for QSPI in STM32L4; verified via 'examples/media' 2016-04-17 21:08:25 -05:00