Commit Graph

19758 Commits

Author SHA1 Message Date
raiden00pl
b01ea50e44 arch/stm32/stm32_foc.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
c563d8a993 arch/stm32/stm32_pwm.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
9a85a0959a stm32/Kconfig: remove the unnecessary option 2022-08-27 20:40:06 +08:00
Gustavo Henrique Nihei
a5fd1140cb arch/xtensa: Remove non-existent ARCH_HAVE_TESTSET support for ESP32-S2
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-27 06:14:57 +02:00
Fotis Panagiotopoulos
4b6d4de972 sim: Added gcov dump on application exit. 2022-08-26 23:58:30 +08:00
yangxuan8282
2d32ebe952 arch/arm/src/stm32f7/stm32_otghost.c: fix syslog formats 2022-08-26 20:46:50 +08:00
Gustavo Henrique Nihei
2fb8af0c20 xtensa: Refactor up_fpucmp to only consider enabled coprocessors
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
fe2d37aa33 xtensa: Fix allocation of FPU registers in exception context
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
5ed2ee85c9 arch: Improve documentation for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
e31e69aa30 xtensa: Fix comparison result for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Eero Nurkkala
71ace555f2 risc-v/mpfs: ihc: fix performance issue
nxsig_usleep() will wait for the next timer tick which is way
too much here. It's not sleeping 100 us, but rather, near 1/60 s.

This causes severe performance problems. Fix this by polling the
register for a while if the remote end is busy.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-26 02:12:26 +08:00
chao.an
9cb17841d8 net/sockopt: move BINDTODEVICE to socket level
rename the UDP_BINDTODEVICE to SO_BINDTODEVICE to follow the linux
style to be compatible with non-UDP protocol binding requirements

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-25 17:56:52 +08:00
Masayuki Ishikawa
50177dbae1 arch: common: Fix arm_allocateheap.c for BUILD_KERNEL
Summary:
- I noticed that the kernel heap area overlaps the PGPOOL
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-25 13:38:47 +08:00
Huang Qi
e4e3208180 Replace all strncpy with strlcpy for safety
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-25 13:38:36 +08:00
Gustavo Henrique Nihei
96f77cb6a6 xtensa/esp32s3: Fix alignment of FPU registers in exception context
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-25 10:07:25 +08:00
Nathan Hartman
1d622b6f79 arch/tiva: Fix typo and minor code formatting 2022-08-24 21:29:18 +02:00
chao.an
da6d526e9c arch/sim: fix visual studio Linker Tools Error LNK2019
nuttx_all.lib(up_initialstate.obj) : error LNK2019:
  unresolved external symbol '___builtin_frame_addres' referenced in function '_up_getsp'

Return stack pointer from esp

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-24 21:59:07 +08:00
Jukka Laitinen
c7a904fa12 arch/risc-v/src/mpfs: Fixes for MSSIO GPIO configurations
- Clarify the macros MSSIO_EC_DEFAULT and MSSIO_EC_USB_DEFAULT
- Remove PULLDOWN bit from MSSIO_EC_DEFAULT, it was on by accident
- Fix some EC configuration macros; DRVSTR was wrong, clean up the others
- Define GPIO_PULLUP and GPIO_PULLDOWN like on many other platforms

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-08-24 19:25:05 +08:00
chao.an
a93b703994 arch/sim/wchar_t: fix visual studio Compiler Error C2371
type of 'wchar_t' confilt with vcruntime:

C:\Program Files\Microsoft Visual Studio\2022\Community\VC\Tools\MSVC\14.33.31629\include\vcruntime.h(228,28):
  error C2371: 'wchar_t': redefinition; different basic types
D:\code\incubator-nuttx\include\sys/types.h(174): message : see decaration of 'wchar_t'

typedef wchar_t as unsigned char to compatible with vcrtuntime

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-24 16:52:03 +08:00
Eero Nurkkala
d940d55ee4 risc-v/mpfs: ihc: update vq ids
Since the commit cf22dd8 (related to OpenAMP update), the notifyid
is no longer NOTIFY_ALL, but the vq id.

Utilize the vq id now properly as it's being provided. However,
vq id 0 generates action.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-24 02:35:00 +08:00
Xiang Xiao
d22e1e1998 compiler.h: Add nosanitize_address macro
and replace all __attribute__((no_sanitize_address)) with it

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
c44a7cbf88 arch: Add ARCH_COVERAGE_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f1355680ca mm/kasan: Add MM_KASAN_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f3f1dde39b arch/sim: Assign virtio vring notifyid to RSC_NOTIFY_ID_ANY
let framework allocate the unique id for us instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:21:37 +02:00
Xiang Xiao
0334819742 net/usrsock: Change xid from uint64_t to uint32_t
by generating the new xid for each transaction

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 12:16:33 -03:00
chao.an
62977ec4e8 arch/sim: add windows host simulate support
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-23 22:04:42 +08:00
chao.an
a10add60ae sim/host: move host implement to posix directory
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-23 22:04:42 +08:00
Xiang Xiao
b60704614e arch/sim: set CMDLINE env to the argument user pass to nuttx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-22 17:53:29 +03:00
chao.an
eb9cfefc1b sched: fix visual studio compiler error
GCC __attribute__ is not fully compatible with MSVC, In the MSVC
environment the programmer typically explicitly exports function/class
symbols via the MSVC-specific __declspec(dllexport) modifier.

D:\code\incubator-nuttx\arch\sim\src\sim\up_head.c(107,15):
  error C2143: syntax error : missing ')' before '('
  [D:\code\n3\incubator-nuttx\vs2022\up_head.vcxproj]

Reference:
https://docs.microsoft.com/en-us/cpp/cpp/dllexport-dllimport?view=msvc-170

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-22 20:00:42 +08:00
yangxuan8282
8a8c268e6b arch/arm/src/stm32f7/Kconfig: add STM32F7_SYSCFG 2022-08-22 17:31:49 +08:00
yangxuan8282
78f44e7769 arch/arm/src/stm32f7/stm32_otg.h: fix stm32_otghost_initialize definition 2022-08-22 17:31:38 +08:00
Huang Qi
a06ec54cd0 debug: Introduce portion of UBSan
without UBSan
```
 text    data     bss     dec     hex filename
  85612     208  142258  228078   37aee nuttx
```

with UBSan:
```
   text    data     bss     dec     hex filename
 194290   98164  208634  501088   7a560 nuttx
```

```c
int main(int argc, FAR char *argv[])
{
  uint32_t ptr[32];
  printf("Hello, World!! %lu\n", ptr[64]);
  return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-22 13:57:29 +08:00
Masanari Iida
49c50d3bf4 arch/ceva: Add missing comma
This patch fixes following error, fond by cppcheck.

up_hardfault.c:103:0: error: failed to expand 'hfdumpreg4',
 Wrong number of parameters for macro 'hfdumpreg4'

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2022-08-20 16:37:42 +08:00
Masanari Iida
bd584332a4 rp2040: Add missing comma in rp2040_i2c_slave.c
This patch fixes missing comma, found by cppcheck.

rp2040_i2c_slave.c:259:0: error: failed to expand 'modbits_reg32',
 Wrong number of parameters for macro 'modbits_reg32'.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2022-08-20 16:37:32 +08:00
yangxuan8282
df6e3d1349 arch/arm/src/stm32f7/stm32_otghost.c: fix undeclared ret 2022-08-19 21:02:02 +08:00
Cis van Mierlo
2c42b93962 S32K1xx: Fixed PM bug for clockconfig 2022-08-19 06:01:30 -07:00
Daniel P. Carvalho
7518beee2e STM32L4 ADC: Change the way that hardware trigger configuration word for regular and injected channels are done. 2022-08-18 11:26:25 -03:00
Ville Juven
75ba9001bc risc-v/mpfs: Make entrypoint table run-time configurable
Default values still come from configuration, but this gives the option
to modify the per-hart entrypoints.
2022-08-18 21:50:53 +08:00
Michał Łyszczek
4e967c67b4 stm32wl5: fix unbuffered mode and other possible bugs
This patch fixes unbuffered mode so it actually works.

Also, patch contains fixes for possible bugs that could result in
deadlock or system hang in certain situations.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
Michał Łyszczek
cc08ae67cb stm32wl5_pwr: add support to boot second CPU (cortex-m0)
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
curuvar
74f1bfbfd7 Added support for Raspberry Pi Pico W 2022-08-17 19:03:19 -03:00
Eero Nurkkala
a1ff841ca4 risc-v/mpfs: ihc: don't use semaphores with OpenSBI vendor calls
OpenSBI vendor extension calls must not cause scheduling, as they're
part of M-mode trap handling. Thus, comment out nxsig_usleep() as
well, which is occasionally taken and crashes the system in that
case. Fix this by commenting out lines that have the potential to
cause scheduling.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-17 18:33:32 +08:00
raiden00pl
6d1646625a arch/arm/src/stm32f7: port FOC driver from arch/stm32 2022-08-15 13:39:08 +02:00
Xiang Xiao
a02101efff arch/sim: Remove up_smpsignal.o and up_touchscreen.o from REQUIREDOBJS
since it isn't required anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-15 10:41:46 +03:00
Masayuki Ishikawa
548540eb13 arch: qemu-rv: Fix high CPU usage in SMP mode
Summary:
- I noticed that QEMU shows high CPU usage if the number of
  CPUs does not match the kernel configuration. (e.g. -smp 8
  and CONFIG_SMP_NCPUS=2)
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with the following configs
  - rv-virt:smp64 (CONFIG_NCPUS=1/2/8)
  - rv-virt:nsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-13 22:41:42 +03:00
Tiago Medicci Serrano
ab60d0d3fb Framebuffer's callback buffer starts from the area being drawn.
The commit 664d45dcba updated the
behavior of the framebuffer's putarea callback enabling it to be
used to draw a particular area of the display. Previously, putarea
was only used to draw the entire area of the display. Any different
area was drawn, row by row, by putrun. Also, before checking for
which callback to call, the framebuffer driver adjusted the buffer
reference that was going to be used for calling the driver's callback
to point to the init of the relevant data. After that commit, the
framebuffer's buffer reference passed to the driver's putarea now
contains the data to draw the entire display. Unlike the previous
version of that implementation, only the putrun's callback buffer
was being referenced from the address that contains the data that
actually is being drawn.

This commit fixes it by adjusting the reference for the run buffer
passed to the putrun/putarea callback. It always starts from the
beginning of the relevant data that is actually being drawn. That is
necessary because lcddev (which uses the same LCD display driver
callbacks) actually don't allocate a buffer containing the data to
draw the whole display, so the same putarea implementation of the
LCD drivers would'n be able to work for both lcddev and framebuffer.
Also it's necessary to pass the stride argument to the LCD drivers
in order to enable them to do partial writes by calculating the
buffer offset while sending row-by-row. The stride is equal the
width multiplied by the bytes per pixel (may add some padding)
for framebuffer and is equal to the lenght of the row being drawn
(multiplied by the same BPP) for lcddev.

Why this approach?
Other possible approaches would be:
1) modify lcddev driver to translate received buffer data to a
buffer similar to the framebuffer. That wouldn't be efficient
considering memory allocation.
2) Create a new callback function. While possible, it'd be confusing
to create a different callback to draw the whole screen and another
to draw only an area of the screen. Also, these callbacks would
differ themselves only from the way the buffer is filled.
3) Simply reverting 664d45dcba would
break the usage of the putarea callback to draw an area of the
display, which would also be inefficient.

This approach is based on the Zephyr's implementation of the ST7789
driver: the buffer starts from the beginiing of the region that would
be drawn. The display device driver's putarea implementation should
check if the operation refers to a full screen/full row and implement
(if possible) a single operation to send the data to be drawn more
efficiently.

Finally, this approach requires that the drivers which implement
the putarea callback and expects the entire framebuffer buffer
to be modified. They don't need to calculate where the data begins
as the new buffer represents the data from the address that is
actually being drawn. This includes adjusting the LCD drivers
GC9A01 and ST7789 and the driver for APA102-based LED matrix display.
2022-08-13 20:36:45 +08:00
Xiang Xiao
2b37909c9e libc: Move crc8.h, crc16.h and crc32.h from include to include/nuttx
to avoid the conflict with the 3rd party library

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-13 13:28:24 +03:00
Masayuki Ishikawa
690c178e4b arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (4/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 0628019c2c
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:01:49 2022 -0700

      imxrt:Enet ensure proper dcache for Writeback mode

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
fb8562763a arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (3/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 522a949ed5
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:00:11 2022 -0700

      imxrt:enet Better interrupt state handeling

- NOTE: I also fixed typo and compile error in the above commit

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
6dfd01885d arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (2/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 81f03a9151
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Tue Mar 15 14:27:51 2022 -0700

     imxrt:ETH Add Support for ETH2

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
4e4ebba306 arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (1/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 12a515ebb6
  Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
  Date:   Thu Feb 4 11:27:09 2021 +0900

      arch: imxrt: Introduce CONFIG_NET_GUARDSIZE to imxrt_enet.c

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2 (defconfig will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Robert Middleton
5d12e350da pic32mx: add option to disable JTAG at runtime
Add a new option to optionally disable JTAG at runtime.  Defaults to enabling
JTAG at runtime as that is the state the processor comes up in.
2022-08-11 11:24:41 -03:00
Alan Carvalho de Assis
0b4ef1406d xtensa/esp32s2: Add basic support to SPI 2022-08-11 15:49:55 +03:00
Petro Karashchenko
27fe5a50c6 arch/arm/stm32f7: fix cache invalidation issue in Ethernet RX
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 03:40:25 -04:00
Petro Karashchenko
4cd7e33b8d arch/arm/samv7: fix compilation warnings
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
Petro Karashchenko
49d26e1b50 arch/arm/samv7: get TX DMA running for HSMCI interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
Ville Juven
b8b541fbf5 mpfs: Remove the ddrstorage section from the OpenSBI package
It is not really needed; g_hart_stacks is only used during SBI init as
a temporary stack area. We can use the scratch area buffers for this, as
the scratch areas define almost 4K of extra space, which is used for
exception stacks anyway.
2022-08-10 10:01:47 +03:00
David Sidrane
32c4bdb7a6 s32k1xx:LPI2C Add DMA support 2022-08-10 11:22:38 +08:00
raiden00pl
08b8234e9e arch/arm/src/stm32f7: port ADC driver from arch/stm32
This change adds support for the following features:
  - injected channels (default: 0)
  - ADC resolution (default: 12bit)
  - ADC low-level operations
  - ADC external triggers
  - custom ADC interrupts
  - ADC sample time configuration
  - configurable ADC SCAN mode (default on if DMA)
  - configurable ADC DMA mode (default: one shot mode)
  - reset the ADC block only if all ADC instances are closed
2022-08-10 02:03:51 +08:00
Ville Juven
60042fea74 risc-v: Implement riscv_sbi_set_timer
This implements riscv_sbi_set_timer. This requires the OpenSBI companion
software to work (but this is needed by the kernel mode anyways).
2022-08-10 02:02:39 +08:00
David Sidrane
4ee917c14c stm32f7:Serial Fix breakage from #6779 2022-08-09 20:18:23 +03:00
Jiuzhu Dong
fe17f747a7 fs/directory: move private directory information to filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
90db4daca9 fs/directory: update readdir interface for all filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
3a70962b7a fs/directory: use file mode to manage directory
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
094e986bbd fcntl/O_CLOEXEC: add O_CLOEXEC map for hostfs
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Ville Juven
31bb362aab risc-v: Fix kernel MMU mapping for L3 table
The L3 table address was calculated incorrectly. For every 2MiB of
mapped memory, an offset of 4KiB is needed from the base of the L3
table. The old calculation failed if paddr was not aligned to a 2MiB
boundary.
2022-08-09 23:14:46 +08:00
David Sidrane
2e7b594bf4 s32k1xx:Add s32k146 DMAMUX 2022-08-09 16:29:21 +03:00
David Sidrane
3813320c31 s32k1xx_edma:Add Looping and cleanup
s32k1xx:EDMA Use aligned_data macros

s32k1xx:EDMA CONFIG_ARCH_CHIP_S32K14x->CONFIG_ARCH_CHIP_S32K14X

s32k1xx:EDMA remove FAR keyword

s32k1xx:EDMA Fix C&P error from Kinetis

s32k1xx:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather

s32k1xx:EDMA Fix access violation

s32k1xx:dmamux fixed missing closing paren
2022-08-09 16:29:21 +03:00
raiden00pl
a05db5299e arch/arm/src/stm32f7: port PWM driver from arch/stm32
This change adds support for the following features:
  1. PWM complementary outputs
  2. interface for low-level PWM operations
  3. support for all PWM channel modes
  4. support for internal PWM channels (TIM1/TIM8)
  5. support for PWM channel polarity and IDLE state
  6. support for TRGO and BREAK
2022-08-09 12:37:49 +08:00
raiden00pl
fd02855c63 arch/stm32f7: rename PWM complementary output pins from CHxN to CHxNOUT (always output) 2022-08-09 12:37:49 +08:00
David Sidrane
050ce3e0d3 kinetis:spi remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
22580584d2 kinetis:[lp]serial remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
7a7a01153b Kinetis:edma Cleanup
Kientis:edma Cleanup

    Kinetis:EDMA Interrupt on last TCD

    Kintis:edma remove dcache operations on passed data

       Data can be chained in TCD and both read and write
       can be in the chain. So the dmach ttype is not
       relevent for all; the TCDs. Therefor we only perform
       dcache operations on internal strutures, The caller
       must perform dcache operations on their data.

kinetis:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-09 10:46:31 +08:00
Nathan Hartman
dd718e78f7 Fix typos 2022-08-07 23:33:19 +08:00
p-eaglelaw
631ae0032e fix warning 2022-08-07 13:03:39 +08:00
p-eaglelaw
702e2f3680 remove unused lib,fix according review comments 2022-08-07 01:57:02 +08:00
David Sidrane
55aaba53fc imxrt:SPI add DMA support 2022-08-06 15:32:07 +08:00
David Sidrane
fa58381e58 imxrt:serial add TX & RX DMA support
imxrt:serial ioctl should call to proper setup
2022-08-06 15:32:07 +08:00
David Sidrane
85ec2e1446 imxrt:Add LPI2C DMA 2022-08-06 15:32:07 +08:00
David Sidrane
f34acdb936 imxrt:lpi2c add parens for macros expansions 2022-08-06 15:32:07 +08:00
Peter van der Perk
22d41f6b9c LPC17xx_40xx PWM multichannel support
USB no softconnect
SocketCAN kconfig fixes
2022-08-06 15:31:38 +08:00
David Sidrane
6ab76bfc7c imrt105x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
b9a6b01e6c imrt102x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
0628019c2c imxrt:Enet ensure proper dcache for Writeback mode
Use aligned_data
   added proper handeling for Writeback
2022-08-06 15:31:23 +08:00
David Sidrane
522a949ed5 imxrt:enet Better interrupt state handeling 2022-08-06 15:31:23 +08:00
David Sidrane
1d88f8df37 imxrt:pinmux ENET2 correct ALT for GPIO_ENET2_REF_CLK2 2022-08-06 15:31:23 +08:00
David Sidrane
bced1a3cb4 imxrt:Fix Ethernet Clocking 2022-08-06 15:31:23 +08:00
David Sidrane
6a2c1fb1de imxrt:Kconfig add IMXRT_PHY_POLLING 2022-08-06 15:31:23 +08:00
David Sidrane
81f03a9151 imxrt:ETH Add Support for ETH2 2022-08-06 15:31:23 +08:00
David Sidrane
49d304257c imxrt:All boards ARCH_PHY_INTERRUPT is a board property 2022-08-06 15:31:23 +08:00
David Sidrane
3af910f8b6 imxrt:Ethernet Add LAN8742A support 2022-08-06 15:31:23 +08:00
Petro Karashchenko
b3cd9090d1 drivers/net: make sure that net driver d_buf is 16-bit aligned
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-05 22:21:37 +08:00
raiden00pl
93584f8668 arch/stm32f0l0g0: add SPI3 support (STM32G0B0 chips) 2022-08-05 13:57:56 +08:00
Xiang Xiao
c61381da56 arch/risc-v: Fix error: invalid application of 'sizeof' to incomplete type 'struct tls_info_s'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-05 08:45:11 +03:00
David Sidrane
33efeeeafd imxrt:EDMA add loop support
imxrt:edma imxrt_dmach_{xfrsetup|getcount} DMACH_HANDLE *->DMACH_HANDLE

imxrt:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-05 09:44:36 +08:00
David Sidrane
1421bc58db imxrt:Correct register usage in up_rtc_settime 2022-08-05 09:43:36 +08:00
David Sidrane
5e902861d9 imxrt:usdhc fix error when CONFIG_ARMV7M_DCACHE is off 2022-08-05 09:43:36 +08:00
David Sidrane
b9c6284750 imxrt:lowputc add extern "C" 2022-08-05 09:43:36 +08:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Xiang Xiao
8582a12388 drivers: Reorganize the power related code layout
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-04 10:28:28 +03:00
Masayuki Ishikawa
8e7752c7da arch: common: Fix up_check_tcbstack() for CONFIG_ARCH_ADDRENV=y
Summary:
- I noticed that ps shows incorrect stack usage when running
  getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
  allocates its stack in the user space that needs to be
  accessed with a correct address environment.
- This commit fixes this issue.

Impact:
- CONFIG_ARCH_ADDRENV=y only

Testing:
- Tested with sabre-6quad:knsh on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-04 11:13:16 +08:00
Eero Nurkkala
e0291b1ce8 risc-v/mpfs: usb: configure fifos properly
RX_FIFO_ADDRs and TX_FIFO_ADDR were misconfigured. These addresses
overlapped causing data corruption during high USB loads. For
example, data corruption was present during the following conditions:

  1. Composite USB driver was used (CDC/ACM + Mass storage)
  2. /dev/ttyACM0 was accessed instantly from Linux side when
     starting up.
  3. Training data was sent to /dev/ttyACM0 from NuttX from the
     very beginning periodically.

It was observed that while Mass storage was negotiating, sometimes
data sent from NuttX to Linux via CDC/ACM was corrupt, although it
was sent properly on the TX fifo.

Also, don't access TXCSRL_REG_EPN_TX_FIFO_NE_MASK for EP0 as it's
not applicable.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-03 23:44:12 +08:00
raiden00pl
981ad9fc1e arch/stm32xx/Kconfig: simplify PWM options and unify them among stm32 chips 2022-08-03 23:43:19 +08:00
raiden00pl
935f110438 arch/stm32f7/stm32_tim.c: include the missing RCC header 2022-08-03 23:42:52 +08:00
raiden00pl
47dbad0a8b arch/stm32/stm32_foc.c: fix some ADC and PWM ifdefs 2022-08-03 23:42:37 +08:00
Peter van der Perk
a6da6dcec6 LPC17_40 CAN driver SocketCAN support 2022-08-03 17:58:57 +08:00
chao.an
d501e01eef arm/backtrace: use sp unwind if FRAME_POINTER is enabled on thumb mode
GCC toolchain Bug 92172 - ARM Thumb2 frame pointers inconsistent with clang

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-03 17:58:36 +08:00
Peter Bee
f20cd0295f arch: fix typo
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-08-03 17:37:08 +08:00
ligd
8c1fd1df81 rptun: update rptun to openamp 2022.04.0
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-08-03 01:22:53 +08:00
Daniel P. Carvalho
40e6c8dca4 STM32L4 DAC: Added basic support for low level operations 2022-08-02 10:43:59 +08:00
Jari van Ewijk
a554b9ce89 NXP S32K1XX: fix LPI2C reset 2022-08-01 07:34:03 -04:00
Xiang Xiao
c26bb35843 Remove the private NULL, TRUE and FALSE macros
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-31 22:12:57 +03:00
Sergey Nikitenko
ec59125ad3 stm32wb/mbox: fixing ACL transmit buffer 2022-07-31 10:29:29 +08:00
Sergey Nikitenko
30a80a390d stm32wb/ble: disable default CPU2 host config option 2022-07-31 10:29:29 +08:00
Sergey Nikitenko
9db4caca1d stm32wb/nimble: workaround for unsupported HCI command 2022-07-31 10:29:29 +08:00
Sergey Nikitenko
cf594b2c81 stm32wb/mbox: renaming msg_buf->cmd_buf 2022-07-30 11:45:15 +08:00
Sergey Nikitenko
49af13c507 stm32wb/mbox: fixing txbuf queue 2022-07-30 11:45:15 +08:00
Michał Łyszczek
e887a4a5b7 stm32wl5: add lower half driver for IPCC
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-07-29 23:11:32 +08:00
chao.an
0d28168679 arm/allocateheap: fix multiple definition of 'up_allocate_heap'
ld: arch/libarch.a(cxd56_allocateheap.c.obj): in function `up_allocate_heap':
arch/arm/src/cxd56xx/cxd56_allocateheap.c:113: multiple definition of `up_allocate_heap'; arch/libarch.a(arm_allocateheap.c.obj):
                                               arch/arm/src/common/arm_allocateheap.c:110: first defined here

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-07-29 11:57:10 +03:00
chao.an
93f719bccb arm/hostfs: fix build warning
arch/arm/src/common/arm_hostfs.c: In function 'host_read':
arch/arm/src/common/arm_hostfs.c:156:24:
  warning: passing argument 1 of 'up_invalidate_dcache' makes integer from pointer without a cast [-Wint-conversion]
  156 |   up_invalidate_dcache(buf, buf + count);
      |                        ^~~
      |                        |
      |                        void *
In file included from arch/arm/src/common/arm_hostfs.c:26:
include/nuttx/cache.h:261:37: note: expected 'uintptr_t' {aka 'unsigned int'} but argument is of type 'void *'
  261 | void up_invalidate_dcache(uintptr_t start, uintptr_t end);
      |                           ~~~~~~~~~~^~~~~

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-07-29 08:52:59 +03:00
zhuyanlin
031c89db89 power: add PM_IDLE_DOMAIN to pm.h and remove definations
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-07-29 11:15:40 +08:00
Xiang Xiao
13a7ae3d06 arch: Call board_reset before up_irq_save and spin_trylock
since board_reset may call some kernel functions which try
to acquire the lock again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-28 08:18:24 -04:00
raiden00pl
cce7b7ada6 stm32f7: add showprogress in __start 2022-07-28 20:07:31 +08:00
Sergey Nikitenko
82ad4b0e08 stm32wb: adding BLE support 2022-07-28 15:23:34 +08:00
Sergey Nikitenko
9db6aaa5c7 stm32wb: fixing IPCC 'putreg' calls 2022-07-28 15:23:34 +08:00
Masayuki Ishikawa
1742b7f6a4 arch: risc-v: Fix warnings in common/crt0.c
Summary:
- This commit fixes warnings in common/crt0.c

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-27 23:22:23 +08:00
Jiuzhu Dong
9d4549d48b arch: limit output maximum size stackdump when sp is not within stack
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
136b1d6d42 arch: using remain to ignore invalid stack content when sp is not within stack
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
0ca02a5564 arch/xtensa: optimize stackdump
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
91d8ed319e arch/riscv: optimize stackdump
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
5c8fd46126 arch/stack: rename do_stack_check with arch prefix
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
Jiuzhu Dong
79597d0caf arch/up_stack_check: using running_task to get correct task context
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-07-27 20:48:33 +08:00
ligd
8a3683fb9f rptun: add ns_match callback to resolve rptun deadlock
thread A: accept -> net_lock -> socket_rpmsg_accept
          -> rpmsg_register_callabck -> rptun_lock
thread B: ns_bind -> rpmsg_socket_ns_bind -> get_tx_payload_buffer
          -> rptun_wait_tx -> usrsock_rpmsg_ept_cb -> usrsockdev_write
          -> net_lock -> deadlock

fix:
add ns_match callback

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-27 20:36:51 +08:00
Peter van der Perk
9e7e45df76 Evaluate n in preprocessor before masking 2022-07-25 23:47:05 +08:00
Peter van der Perk
ec118743ea NX style fixes 2022-07-25 23:47:05 +08:00
Peter van der Perk
eae3f77673 Fix wrong comment style 2022-07-25 23:47:05 +08:00
Peter van der Perk
b3590f00b3 NXStyle and preprocessor fixes
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
2022-07-25 23:47:05 +08:00
Jari van Ewijk
dd1096695d Add initial support for NXP S32K3 MCU family
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
2022-07-25 23:47:05 +08:00
raiden00pl
8eae3bb5ff stm32f0l0g0/stm32_spi.c: fix receiving data for half duplex mode 2022-07-25 23:46:33 +08:00
raiden00pl
351c9dc837 stm32f0l0g0/stm32_spi.c: remove unused spi_readbyte function 2022-07-25 23:46:33 +08:00
raiden00pl
af4d65416a stm32f0l0g0/stm32_spi.c: add missing SPI mode config and fix ifdef 2022-07-25 23:46:33 +08:00
raiden00pl
69986fad84 stm32f0l0g0/hardware/stm32_spi.h: remove unused definitions 2022-07-25 23:46:33 +08:00
raiden00pl
92b676479a stm32l4/Kconfig: add support for STM32L476JG and STM32L476JE 2022-07-23 16:51:31 -03:00
curuvar
c21c7ac8dc Added Adafruit QT Py RP2040 board.
Added ability to configure indivdual UART, SPI and I2C pin location.
2022-07-23 18:25:38 +08:00
curuvar
421b8ae3e7 Ability to use newer pico-sdk with RP2040 builds (Issue #4919) 2022-07-23 14:36:52 +08:00
Fotis Panagiotopoulos
ad7f503cfa sim: Increased priority of loop task. 2022-07-23 00:22:35 +08:00
Jouni Ukkonen
e268b23142 OpenSBI: Add configurable support for domain init
Initialize .domains_init function entry point in sbi_platform_operations when
CONFIG_OPENSBI_DOMAINS=y. In this case, the board specific code must provide
the "board_domains_init" function.

Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2022-07-22 19:00:33 +03:00
ligd
8f54f9e1c3 sim: idle pm should do PM_RESOTRE in critical section
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-22 09:06:38 +03:00
Fotis Panagiotopoulos
30f8d33bca Fixed path calculation in BBS RAM. 2022-07-22 10:59:57 +08:00
ligd
df365008b2 arm_secure_irq: fix NVIC_IRQ_DBGMONITOR un-secure set failed
NVIC_DEMCR.SDME is a read-only bit

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-22 01:48:55 +03:00
Petro Karashchenko
2291f601ee arch/arm/samv7: fix SPI 16-bit transactions in DMA mode
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-07-21 23:26:20 +08:00
Abdelatif Guettouche
ae1cbc47ef esp32&c3/Kconfig: CONFIG_ESP32(C3)_WIRELESS doesn't need to be user
selectable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
20c6996e81 esp32c3/Kconfig: Don't select options already selected.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
4ccedb176e arch/esp32: Re-organise shared functions and options for ESP32 Wireless code
- Introduce the ESP32_WIFI option to replace the broader
ESP32_WIRELESS option.  ESP32_WIRELESS is used by both WIFI and BLE.

 - Move common functions from esp32_wifi_adapter to esp32_wireless.

 - Change the order of including the external libraries to avoid undefined references.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:02:28 +03:00
Abdelatif Guettouche
770147ffe3 arch/esp32: Introduce the ESP32_RTC option.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-20 22:01:25 +03:00
Masayuki Ishikawa
06b158a490 arch: arm64: Fix warnings in arm64_cpstart.c
Summary:
- Fix warnings in arm64_cpstart.c if CONFIG_DEBUG_INFO=n

Impact:
- None

Testing:
- Tested with qemu-a53:nsh_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-19 10:49:32 +08:00
Xiang Xiao
2166c98809 Add printflike and scanflike to all printf/scanf like functions
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-18 14:14:36 +03:00
Xiang Xiao
61dff1c125 arch/arm64: Implement up_nputs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-17 17:31:19 +03:00
Xiang Xiao
aad5fbd2fb arch: Add up_nputs function to handle the non '\0' string correctly
and change up_puts as a simple macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-17 17:31:19 +03:00
Michal Lenc
4484d04a8d samv7: add RX DMA support to serial driver
This commit adds RX DMA support to serial driver. The DMA is currently
supported only for USART peripherals, not for UART. It uses two circular
buffers which size can be setup by SAMV7_SERIAL_RXDMA_BUFFER option.

The idle bus interrupt is enabled to ensures data are read even if the
buffer is not yet full. The timeout can be setup by
SAMV7_SERIAL_DMA_TIMEOUT option.

This adds support only for RX transfers.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
Michal Lenc
e3e282bd8a samv7: add DMA API for circular buffers
This commit adds functions sam_dmarxsetup_circular() and
sam_dmarxstart_circular() that create API for operating with two or more
circular buffers. This can be used for DMA operation with serial driver
or ADC where ping pong buffers are required to successfully transfer the
data at high speed.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
Michal Lenc
89a2b51b96 samv7: add RS-485 mode support to USART driver
This commit enhances SAMV7 serial driver with RS-485 mode available to
USART peripherals. The hardware automatically sets RTS pin high when
data are transfered and low then no transfer occurs. Only USART peripherals
support this mode, UART peripherals do not.

This mode can be enabled by configuration option SAMV7_USARTx_RS485MODE.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-07-16 15:39:20 +03:00
raiden00pl
8e5e6ab8cb stm32/Kconfig: stm32_i2s needs SPI_DMA enabled 2022-07-16 11:10:01 +03:00
raiden00pl
a8e7f7742c stm32f0l0g0/Kconfig: set default n for hidden options 2022-07-16 11:10:01 +03:00
raiden00pl
d307e5a7f5 stm32f0l0g0/Kconfig: hide STM32F0L0G0_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
1b45982521 stm32f0l0g0/Kconfig: remove the duplicated SPI DMA section 2022-07-16 11:10:01 +03:00
raiden00pl
e39afbf277 stm32/Kconfig: set default n for hidden options 2022-07-16 11:10:01 +03:00
raiden00pl
12273d0aa9 stm32/Kconfig: hide STM32_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
1616edbb81 stm32f7/Kconfig: hide STM32F7_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
6aef19617b stm32h7/Kconfig: hide STM32H7_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
cb94579ab7 stm32wl5/Kconfig: hide STM32WL5_SPI_DMA option and select it automatically 2022-07-16 11:10:01 +03:00
raiden00pl
3c0a3dabfc stm32f0l0g0/SPI: add support for half duplex, simplex rx and simplex tx modes 2022-07-16 02:00:53 +08:00
curuvar
d69d9eb0c9 Added I2C Slave to RP2040
Added length to I2C slave callback.
2022-07-16 01:56:52 +08:00
raiden00pl
2428438037 stm32f0l0g0/SPI: fix compilation for DMA enabled 2022-07-15 11:38:36 -03:00
raiden00pl
c7e6366e91 stm32f0l0g0/SPI: enable SPI for STM32G0 2022-07-15 11:38:36 -03:00
raiden00pl
f702c89c33 stm32f0l0g0/SPI: configure DMA support individually for each SPI 2022-07-15 11:38:36 -03:00
raiden00pl
056e11a3e5 stm32f0l0g0/SPI: only SPI1 and SPI2 are present in STM32 M0 devices 2022-07-15 11:38:36 -03:00
raiden00pl
47e29d9402 stm32f0l0g0: remove references to non-existent ADCs, only ADC1 present on STM32 M0/M0+ devices 2022-07-15 11:36:43 -03:00
Masayuki Ishikawa
82cd9b0a4a arch: arm64: Add stack coloration for SMP
Summary:
- This commit adds stack coloration for SMP

Impact:
- None

Testing:
- Tested with qemu-a53:nsh_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-15 16:16:02 +08:00
Masayuki Ishikawa
3682bcd4b3 arch: arm64: Fix do_stackcheck()
Summary:
- Since the stack coloration is done for every 32bits
  this function should be done in the same way.

Impact:
- None

Testing:
- Tested with qemu-a53:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-07-15 16:16:02 +08:00
qinwei1
e77b06721b arch: arm64: ARMv8-A support for NuttX
N/A

Summary:

Arm64 support for NuttX, Features supported:

1. Cortex-a53 single core and SMP support: it's can run into nsh shell at
   qemu virt machine.

2. qemu-a53 board configuration support: it's only for evaluate propose

3. FPU support for armv8-a: FPU context switching at NEON/floating-point
  TRAP is supported.

4. psci interface, armv8 cache operation(data cache) and smccc support.

5. fix mass code style issue, thank for @xiaoxiang781216, @hartmannathan @pkarashchenko

Please refer to boards/arm64/qemu/qemu-a53/README.txt for detail

Note:
1. GCC MACOS issue
The GCC 11.2 toolchain for MACOS may get crash while compiling
float operation function, the following link describe the issue
and give analyse at the issue:

https://bugs.linaro.org/show_bug.cgi?id=5825

it's seem GCC give a wrong instruction at certain machine which
without architecture features

the new toolchain is not available still, so just disable the MACOS
cibuild check at present

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2022-07-14 09:35:49 -04:00
Gustavo Henrique Nihei
68c722c051 xtensa/esp32: Build patched IDFBoot for Protected Mode support
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
60b7479f12 xtensa/esp32: Avoid ROM functions due to error with PIDs 2-7
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
27fc3c959d xtensa/esp32: Configure the PID controller for privilege separation
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
76acfef5ec xtensa/esp32: Add support for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 14:57:57 +08:00
Gustavo Henrique Nihei
e24621d545 arch: Convert DEBUGASSERT(false) into more intuitive DEBUGPANIC()
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-14 12:08:45 +08:00
Gustavo Henrique Nihei
8a4c9c3489 arch: Fix typo in "register" word
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-13 22:57:19 +03:00
Alan Carvalho de Assis
7d3eefbdce Review: Small improvements
Fixes suggested by Gustavo and Petro
2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1e03a70258 Add DMA support to SPI and small issues on SPI driver 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
368d65459c xtensa/esp32s3: Add DMA support to SPI 2022-07-13 14:28:36 -03:00
Alan Carvalho de Assis
1cb3c0d630 xtensa/esp32s3: Add support to Generic DMA 2022-07-13 14:28:36 -03:00
Petro Karashchenko
24abf9d5d9 arch/arm/samv7: EMAC bugfixes
1. Fix error recovery mechanism during transmission error
   handling (enable transmission at the end).
2. Fix compilation / operation with CONFIG_SAMV7_EMAC_PREALLOCATE=y
3. Enable fully configured address space for transmission queues
   to allow sending packets with length more than 976 bytes. With
   partially configured address space the AHB error is generated
   during transmission of long packets.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-07-12 18:34:37 +08:00
Eero Nurkkala
14447600ac risc-v/mpfs: usb: fix illegal reads
With faster data transfer rates, it was seen that the read
requests occasionally were issued while the USB RX operation
was actually in progress.  This patch makes sure the system
doesn't accidentally read the RX fifo while it's being filled
up, but rather, checks for the RXCSRL_REG_EPN_RX_PKT_RDY_MASK
flag.  This flag indicates the packet is ready to be read.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-07-12 18:34:28 +08:00
Gustavo Henrique Nihei
5e32aa14bf risc-v/esp32c3: Fix verification of ROM function return values
cache_dbus_mmu_set and cache_ibus_mmu_set return positive values in case
of errors, so DEBUVERIFY could never detect them since this macro checks
for negative values.
Besides, the successful execution of those functions is mandatory for
the reliable operation under Protected Mode, so the verification is
always performed, even when DEBUG is not enabled.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-12 10:56:59 +08:00
raiden00pl
5c1c18af03 stm32g0: add support for USART3 and USART4 2022-07-10 21:02:23 -03:00
raiden00pl
b179c46178 arch/stm32f0l0g0: add support for stm32l053 2022-07-09 23:37:33 +08:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
Abdelatif Guettouche
0bdf713df0 risc-v/esp32c3: Add the rest of the reset causes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-07-08 01:06:35 +08:00
Xiang Xiao
3daa18b661 arch: Remove the unnecessary #if/#endif in assert
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
Xiang Xiao
9ff0971d3f arch: Correct the order of stack related information in assert
forget to update in this patch:
commit b02db04e00
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Sun Jun 5 17:10:19 2022 +0800

    arch/assert: Keep the thread dump column order same as ps

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-07 19:25:47 +03:00
curuvar
aa6ec6518c Added ADC to RP2040 2022-07-07 12:45:28 -03:00
Gustavo Henrique Nihei
f3e8decad2 xtensa: Build sources required for supporting CONFIG_BUILD_PROTECTED
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-05 23:07:00 +08:00
Gustavo Henrique Nihei
cd1ed92844 xtensa: Build sources for supporting CONFIG_SCHED_BACKTRACE
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-05 23:07:00 +08:00
Gustavo Henrique Nihei
b9703619b5 xtensa: Unify common options within a single Make.defs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-05 23:07:00 +08:00
Huang Qi
a4e867b8d4 arch/arm/Kconfig: Add description for ARM_THUMB to make it configurable
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-07-05 19:34:18 +08:00
Xiang Xiao
fcc48c2254 arch/arm: Don't include arch/arch.h in include/irq.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
Xiang Xiao
9ab3417882 arch/risc-v: Move __XSTR, FLOAD/FSTORE and REGLOAD/REGSTORE to the right place
1.Move __XSTR from include/arch.h to include/irq.h
2.Move  FLOAD/FSTORE and REGLOAD/REGSTORE from include/arch.h to src/common/riscv_internal.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
Xiang Xiao
c20ed58879 arch: Remove the inclusion of arch/irq.h from chip/irq.h
since arch/irq.h will include chip/irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:03:47 +03:00
Alan Carvalho de Assis
922ebe5b96 Fix IOMUX function number 2022-07-01 23:34:21 +08:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
curuvar
0c3db448bb Added Adafruit Feather RP2040, Adafruit KB2040 and Added neopixel driver to support RP2040 2022-06-30 22:13:49 -07:00
Sergey Nikitenko
4285274c31 New stm32wb chip family 2022-07-01 12:13:58 +08:00
Nathan Hartman
a3688b0c3b tiva: Add UART CTS/RTS support
* arch/arm/src/tiva/common/tiva_lowputc.c
  (tiva_lowsetup):
    For each UART, if Kconfig enables RTS/CTS (e.g.,
    CONFIG_UART0_IFLOWCONTROL and/or CONFIG_UART0_OFLOWCONTROL),
    configure the corresponding GPIO(s).

* arch/arm/src/tiva/common/tiva_serial.c:
  (struct up_dev_s):
    If CONFIG_SERIAL_IFLOWCONTROL, add a bool field 'iflow'. If
    CONFIG_SERIAL_OFLOWCONTROL, add a bool field 'oflow'. This is
    inspired by the implementation for kinetis.
  (g_uart0priv, g_uart1priv, g_uart2priv, g_uart3priv, g_uart4priv,
   g_uart5priv, g_uart6priv, g_uart7priv):
    If Kconfig enables RTS/CTS for a UART (e.g.,
    CONFIG_UART0_IFLOWCONTROL thru CONFIG_UART7_OFLOWCONTROL), set
    the corresponding iflow and/or oflow flag(s).
  (up_setup):
    Check the above-mentioned iflow and oflow flags and set or unset
    the RTSEN and/or CTSEN bits in the UART's CTL register to enable
    the feature.
2022-07-01 11:52:02 +08:00
Gustavo Henrique Nihei
5ce77fad1b arch: Remove "0x" prefix preceding "%p" specifier on format string
The "p" format specifier already prepends the pointer address with "0x"
when printing.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 22:08:58 +03:00
Gustavo Henrique Nihei
ea829cf7d5 xtensa/esp32s3: Add driver for I2C peripheral in Master mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:32:17 +03:00
Gustavo Henrique Nihei
0657621848 xtensa/esp32s2: Add driver for I2C peripheral in Master mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:32:02 +03:00
Gustavo Henrique Nihei
31cddc922c xtensa/esp32s2: Sync GPIO driver implementation with ESP32-S3
Sync driver interfaces, also fixes the handling of special pin value for
esp32s2_gpio_matrix_in and esp32s2_gpio_matrix_out functions

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:10:41 +08:00
Gustavo Henrique Nihei
2d6cd7e580 xtensa/esp32s2: Fix the number of GPIO IRQs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:10:41 +08:00
Eero Nurkkala
ef28d915fe risc-v/mpfs: ihc: don't start rptun automatically
Starting the rptun with the autostart flag set will cause significant
delays at the boot, as it will wait for the master to be up. U-boot/linux
combination may take more than 10 seconds to boot to the point where the
rpmsg bus is initialized.

For now, the user needs to initialize the rptun separately, for example,
by issuing the following command:

  rptun start /dev/rptun/mpfs-ihc

This command will also block if started before the rpmsg bus master is up.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-28 11:34:38 -03:00
Ville Juven
cfebb5a5c1 risc-v: Move common memory map to its own file from riscv_internal
Move the linker defined symbols to a separate file, so they can be
accessed without pulling in everything from riscv_internal.h and
whatever it includes (e.g. syscall.h drags in a lot).
2022-06-28 14:41:56 +03:00
Huang Qi
bc8cf2c501 arch/arm/armv7-m: Fix error link argument for compiler-rt
Fix:
```
ld.lld: error: unknown argument '-/home/huang/Work/vwear/prebuilts/clang/linux/arm/bin/../lib/clang-runtimes/armv7em_hard_fpv4_sp_d16/lib/libclang_rt.builtins-armv7em.a'
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-06-28 12:38:36 +03:00
dependabot[bot]
4f8c8815d6 Spi driver for Stm32wl55
IRQ and DMA mode is not implemented
2022-06-28 10:38:03 +08:00
zouboan
fd8eaf4f42 arch/stm32_capture_lowerhalf.c: add lower half support of capture 2022-06-28 10:35:43 +08:00
Nimish Telang
4afd25b567 this flag is meaningless for the linker 2022-06-27 20:03:03 -03:00
Ville Juven
77a01cfe52 mpfs: Fix IHC memory locations to native width type
Ne numeric type defaults to u32 which is not enough to represent a
native memory location

This fixes build error:
https://github.com/apache/incubator-nuttx/runs/7067877053?check_suite_focus=true
2022-06-27 20:49:00 +08:00
zouboan
78535d0123 arch/stm32_capture: completion other slave mode selection 2022-06-25 14:35:17 +08:00
zouboan
20cd657a65 arch/stm32_capture: fix offset address of slave mode control register 2022-06-25 14:35:17 +08:00
Satoshi Togawa
667afb3b91 sama5: add config SAMA5_SYSTEMRESET in arch/arm/src/Kconfig
SAMA5D2 and SAMA5D4 does not support external reset.
Some SAMA5 board's Kconfig contain item SAMA5_SYSTEMRESET, but it is better in arch/arm/src/Kconfig.
2022-06-25 12:03:15 +08:00
Jukka Laitinen
ba1b8d0712 arch/risc-v/src/mpfs: Add mpfs_gpiosetevent and gpio irq handling functions
Add a function to easily enable event handling on fabric and mss gpios. This
is similar to what exists e.g. for stm32 arm chips.

Also fix some small bugs in mpfs_configgpio related to IRQ bits configuration

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-23 21:45:15 +08:00
curuvar
412539e66c Added PWM support to rp2040 2022-06-23 10:17:40 -03:00
curuvar
75facdee72 Added PWM support for rp2040 2022-06-23 10:17:40 -03:00
Simon Filgis
cd1f90c25b Fix can buffer calculaiton. Add two words to every msg buffer 2022-06-23 00:07:42 +08:00
Eero Nurkkala
92760f89eb risc-v/mpfs: emmcsd: fix two issues
This patch fixes the following issues:
  1. MPFS_EMMCSD_HRS06_EMM bitmask had to be 0x7, not 0x03
  2. putreg32() caused outright memory corruption as the
     arguments were in wrong order

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-06-22 09:50:33 +03:00
Alan Carvalho de Assis
19fd0a5587 stm32xx: Fix RTC drift when using HSE
When using HSE to clock RTC NuttX internal time is gaining 5.5 second per
minute. Problem was NuttX using 7182 for one of the RTC division factors,
it should have been 7812. The incorrect factors used are 7182 and 0xff.

These are used in 3-4 places within Nuttx and other places as 7812 and 0xff.
However, the STMicro app note AN4759 suggests using 7999 and 124, which is
what I've used.

Explanation: These 2 factors are used to divide the HSE clock (which at this
point is 1 MHz) to 1 Hz for the RTC hardware.
To test the 2 factors, add 1 to both numbers and multiply them together.
The result needs to be as close as possible to 1 MHz.
The suggested values of 7999 and 124 => 8000*125 = 1,000,000, the prime
factors. So, the best fix for Nuttx would be these values.

Issue discovered and fixed by Peter Moody
2022-06-21 17:58:10 +03:00
Huang Qi
9481456fde risc-v/esp32c3: Implement up_perf_xxx API
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-06-21 21:35:22 +08:00
Michael Jung
9140693567 Add lcd_dev_s pointer to lcd_planeinfo_s
In order to support multiple LCD instances per board, add a pointer from
lcd_planeinfo_s to the lcd_dev_s which it belongs to.  Also enhance the
putrun, getrun, putarea and getarea methods to pass through the
lcd_dev_s pointer to the respective device driver.

Port all LCD device drivers to this lcd_planeinfo_s extension.

Enhance SSD1306 driver to support multiple LCDs.

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2022-06-21 21:33:23 +08:00
Richard Tucker
8f36649aad arch/risc-v/src/litex/litex_emac: add liteeth peripheral driver
See the following for details on the pepheral:
https://github.com/enjoy-digital/liteeth
2022-06-21 12:06:37 +03:00
AuroraRAS
0fe219a8c9 Add I2C_M_NOSTART and I2C_M_NOSTOP support in esp32c3_i2c
Signed-off-by: AuroraRAS <chplee@gmail.com>
2022-06-20 10:34:22 -03:00
Ville Juven
6cb77a8d84 mpfs: Allow mapping of RAM/ROM regions from different memory areas
The old implementation needed a contiguous memory block for user
ROM/RAM. This is because there was only 1 L3 page table which can only
map a contiguous memory area.

Also, remove the PMP configuration which just complicates things,
rely on the MMU mappings instead.
2022-06-20 21:24:18 +08:00
Alan Carvalho de Assis
4eddde90b0 esp32s3: Add support to USBSERIAL to use as console 2022-06-16 17:20:32 +03:00
Satoshi Togawa
9f4691603f sama5: Fix wrong comments. 2022-06-16 17:04:37 +03:00
Jukka Laitinen
d8cc1fd76d arch/riscv/mpfs: Add a config flag to select SD mux state
This has been previously hard-coded to SD-card. Make it build time configurable.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-16 09:17:30 -03:00
chao.an
7790839eb0 arch/backtrace: correct the skip counter
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-06-16 21:09:14 +09:00
Abdelatif Guettouche
996995245d xtensa: Remove old references to co-processors.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 22:06:08 +03:00
Abdelatif Guettouche
9bac291236 arch/xtensa/*.S: Remove some old comments and fix others.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
fe8fa4ff75 arch/xtensa: Move the new saving area directly to A2.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
5ab888692e arch/xtensa/xtensa_context: Place the functions in EXCEPTION_HANDLER
section (IRAM for ESP32xx chips).

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
73a1e0fc58 arch/xtensa: Refactor exceptions' entry and exit.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
1c94cb5324 arch/xtensa: Refactor the differences in ABI calls.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
48f20af8bc arch/xtensa/xtensa_int_handlers.S: Remove unused macro.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00