Alin Jerpelea
4e19a97916
arch: arm: imxrt: Add Apache license to files
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In the initial contribution those files were missing the license
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-04-20 21:05:45 +08:00
Alin Jerpelea
208b892efe
arch: arm: cxd56xx: Add Apache license to files
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In the initial contribution those files were missing the license
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-04-20 21:05:45 +08:00
zhuyanlin
8d756a75a2
armv7/r:cp15_cache_all: fix error in LineSize 'r5' mask
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r5 = r3 & r1
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-20 08:06:58 +09:00
chao.an
2df591b3bb
arch/armv7-a/r: Unify the toolchain definition of eabi for linux and windows
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-19 23:17:27 +08:00
chao.an
4a085e1cdb
arch/arm/armv6-m: Unify the toolchain definition of eabi for linux and windows
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-19 23:17:27 +08:00
chao.an
2246afcdd8
arch/armv7-m: Unify the toolchain definition of eabi/clang/iar for linux and windows
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-19 23:17:27 +08:00
chao.an
a79bf8c9eb
arch/armv8-m: Unify the toolchain definition of eabi/clang for linux and windows
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-19 23:17:27 +08:00
Ville Juven
5c951d8c4a
arm/arm_assert.c Fix dumping of status from ISR
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The status dump did not work if the first fault triggers before
the first context switch (during nx_start()).
2022-04-19 15:28:09 +03:00
chao.an
b110c984b1
arch/armv7-[a|r]: correct the handing of group env switch
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This PR resolved 2 issues:
1. CURRENT_REGS is not set correctly on swint handling
2. group env is not changed properly
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-19 12:10:25 +03:00
Xiang Xiao
96fa8be5f5
arch/armv[7|8]-m: Compare all FPU registers in up_fpucmp
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-19 11:09:36 +03:00
Xiang Xiao
d80c2d7419
arch/arm: Remove all lazy fpu related code
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since it is broken and inefficient, and then removed by:
commit dc961baaea
Author: chao.an <anchao@xiaomi.com>
Date: Thu Apr 14 18:07:14 2022 +0800
arm/armv7-[a|r]: move fpu save/restore to assembly handler
Save/Restore FPU registers in C environment is dangerous practive,
which cannot guarantee the compiler won't generate the assembly code
with float point registers, especially in interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
commit 8d66dbc068
Author: chao.an <anchao@xiaomi.com>
Date: Thu Apr 7 13:48:04 2022 +0800
arm/armv[7|8]-m: skip the fpu save/restore if stack frame is integer-only
Signed-off-by: chao.an <anchao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-19 11:09:36 +03:00
Xiang Xiao
7c5b2e3305
arch/arm: Remove FAR and CODE from common/ and arm*/ folder
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-19 00:23:59 +03:00
Xiang Xiao
84b0453ef3
arch/arm: Remove unneeded group_addrenv call which handled by arm_doirq
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-18 22:18:32 +03:00
chao.an
29005bd79f
board/arch_fpu*: move arch_[get|cmp]fpu to common arch
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rename the arch api:
arch_getfpu -> up_saveusercontext
arch_cmpfpu -> up_cmpfpu
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-18 22:22:16 +08:00
chao.an
5bdfae66ce
arch/arm: export arm_saveusercontext()
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rename arm_saveusercontext() -> up_arm_saveusercontext()
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-18 22:22:16 +08:00
chao.an
bdbbdbe242
arm/a1x: fix compile break
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-18 10:02:17 +08:00
Xiang Xiao
ef1a98dd00
Remove the unneeded void cast
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-17 23:32:05 +03:00
Xiang Xiao
32ee2ae407
Remove the unneeded worker_t cast
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-17 23:32:05 +03:00
Xiang Xiao
373363d750
arch/arm: Move arm_signal_dispatch.c to common folder
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-17 23:30:41 +03:00
wangbowen6
91d02f5db8
arm/arch: using __builtin_frame_address(0) implement up_getsp().
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Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-04-18 00:49:15 +08:00
chao.an
c08d9047b2
arch/Toolchain.defs: replace all ${/$} with $(/$)
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-17 00:58:34 +08:00
chao.an
aed21ba0bc
arch/armv[7|8]m: enhance the clang support
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-17 00:58:34 +08:00
okayserh
3a015d56b0
Fixed a compile error, presumably caused by C&P error.
2022-04-16 19:21:10 +08:00
Petro Karashchenko
09b3fb25ab
drivers: remove unimplemented open/close/ioctl interfaces
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-15 16:56:25 +08:00
Richard Tucker
1b13d1b440
arch/arm/src/sam34/Kconfig: fix typo in device name
2022-04-15 02:22:01 +08:00
Richard Tucker
de66e18d6f
arch/arm/src/sam34/sam_hsmci.c: SAM3X GPIO setup
2022-04-15 02:22:01 +08:00
Richard Tucker
929556d750
arch/arm/src/sam34/sam_hsmci: DMA also present on SAM3X chips
2022-04-15 02:22:01 +08:00
Richard Tucker
be0bcac91b
arch/arm/src/sam34/sam_hsmci.c: DMA setup before write is required
2022-04-15 02:22:01 +08:00
Richard Tucker
bc7f4b2375
arch/arm/src/sam34/sam_hsmci.c: delay required after sending command
2022-04-15 02:22:01 +08:00
chao.an
dc961baaea
arm/armv7-[a|r]: move fpu save/restore to assembly handler
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Save/Restore FPU registers in C environment is dangerous practive,
which cannot guarantee the compiler won't generate the assembly code
with float point registers, especially in interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-14 22:33:10 +08:00
Xiang Xiao
a94b7b9cca
arm/rtl8720c: Remove up_getsp which is already implemented in arch/arm/arch.h
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-14 16:35:52 +03:00
chao.an
b3d47e246f
arch/stack_color: correct the stack top of running task
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This PR to ensure the stack pointer is locate to the stack top
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-14 16:48:19 +08:00
chao.an
0c79ad9d8d
arch/[arm|sparc]: replace INT32_ALIGN_* to STACK_ALIGN_*
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-14 16:48:19 +08:00
Abdelatif Guettouche
6d12ee19e2
arch: Move the DUMP_ON_EXIT logic after nxtask_exit.
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Otherwise we will try to dump the state of the current task, however the
exit handler has already started doing some cleanup and invalidated its
group. Accessing the group from dumponexit will crash.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-13 21:59:23 +08:00
Abdelatif Guettouche
d6c952c56f
arch: Fix compile error when enabling CONFIG_DUMP_ON_EXIT
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"error: incompatible types when assigning to type 'struct filelist *' from type 'struct filelist'
filelist = tcb->group->tg_filelist;"
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-13 21:59:23 +08:00
chao.an
0d7ea348d5
arm/armv8-m: indicating no low-overhead-loop predication by default
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Fix usage fault on clang version 13.0.0 (-Ofast):
------------------------------------------------------------------
| arm_hardfault: Hard Fault escalation:
| arm_usagefault: PANIC!!! Usage Fault:
| arm_usagefault: IRQ: 3 regs: 0x3c58c510
| arm_usagefault: BASEPRI: 00000080 PRIMASK: 00000000 IPSR: 00000003 CONTROL: 00000004
| arm_usagefault: CFSR: 00020000 HFSR: 40000000 DFSR: 00000000 BFAR: 01608050 AFSR: 00000000
| arm_usagefault: Usage Fault Reason:
| arm_usagefault: Invalid state
| up_assert: Assertion failed at file:armv8-m/arm_usagefault.c line: 113 task: lpwork
| backtrace:
| [ 2] [<0x2c58124a>] up_backtrace+0xa/0x2e2
| [ 2] [<0x2c56f7cc>] sched_dumpstack+0x28/0x66
| [ 2] [<0x2c580cd0>] up_assert+0x62/0x254
| [ 2] [<0x2c56ab8a>] _assert+0/0xa
| [ 2] [<0x2c55575a>] nxsched_add_prioritized+0x38/0xa2
| [ 2] [<0x2c555894>] nxsched_add_blocked+0x2e/0x44
| [ 2] [<0x2c580748>] up_block_task+0x2a/0x96
| [ 2] [<0x2c5569ea>] nxsem_wait+0x64/0xb4
| [ 2] [<0x2c556a40>] nxsem_wait_uninterruptible+0x6/0x10
| [ 2] [<0x2c559b9a>] work_thread+0x1c/0x48
-------------------------------------------------------------------
usage fault on 0x2c55575a:
------------------------------------
|2c555722 <nxsched_add_prioritized>:
|; {
|2c555722: 80 b5 push {r7, lr}
|...
|2c55575a: 2f f0 17 c0 le 0x2c555732 <nxsched_add_prioritized+0x10> @ imm = #-44
|...
------------------------------------
Arm v8-M Architecture Reference Manual:
C2.4.103 LE, LETP
B3.28 Low overhead loops:
An INVSTATE UsageFault is raised if a LE instruction is executed and FPSCR.LTPSIZE does not read as four.
When a new floating-point context is created and FPCCR.ASPEN is set to zero it is the responsibility of software
to correctly initialize FPSCR.LTPSIZE.
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-13 09:39:22 +08:00
chao.an
ff210e1c2d
arch/stack_color: correct the end address of stack color
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The different optimization of compilers will cause ambiguity in
obtaining sp through up_getsp() in arm_stack_color(), if compile
with clang and enable the optimization flag (-Ofast), up_getsp()
call will be earlier than push {r0-r9,lr}, the end address of color
stack will overlap with saved registers.
Compile line:
clang --target=arm-none-eabi -c "-Ofast" -fno-builtin -march=armv8.1-m.main+mve.fp+fp.dp \
-mtune=cortex-m55 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -D__NuttX__ -common/arm_checkstack.c -o arm_checkstack.o
Assembler code:
llvm-objdump -aS arm_checkstack.o
------------------------------------
|00000000 <arm_stack_color>:
|; start = INT32_ALIGN_UP((uintptr_t)stackbase);
| 0: c2 1c adds r2, r0, #3
| 2: 22 f0 03 02 bic r2, r2, #3
|; end = nbytes ? INT32_ALIGN_DOWN((uintptr_t)stackbase + nbytes) :
| 6: 19 b1 cbz r1, 0x10 <arm_stack_color+0x10> @ imm = #6
| 8: 08 44 add r0, r1
| a: 20 f0 03 00 bic r0, r0, #3
| e: 00 e0 b 0x12 <arm_stack_color+0x12> @ imm = #0
|; __asm__
| 10: 68 46 mov r0, sp <--- fetch the sp before push {r7 lr}
| 12: 80 b5 push {r7, lr} <--- sp changed
|; nwords = (end - start) >> 2;
| 14: 80 1a subs r0, r0, r2
| 16: 80 08 lsrs r0, r0, #2
|; }
| 18: 08 bf it eq
| 1a: 80 bd popeq {r7, pc}
| 1c: 4b f6 ef 63 movw r3, #48879
| 20: cd f6 ad 63 movt r3, #57005
| 24: a0 ee 10 3b vdup.32 q0, r3
|; while (nwords-- > 0)
| 28: 20 f0 01 e0 dlstp.32 lr, r0
|; *ptr++ = STACK_COLOR; <--- overwrite
| 2c: a2 ec 04 1f vstrw.32 q0, [r2], #16
| 30: 1f f0 05 c0 letp lr, 0x2c <arm_stack_color+0x2c> @ imm = #-8
|; }
| 34: 80 bd pop {r7, pc}
------------------------------------
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-13 09:37:54 +08:00
Xiang Xiao
df5a8a53ae
arch/arm: Move FPU initialization to common place
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-12 23:35:06 +03:00
SPRESENSE
39f7c4aea0
arch: cxd56xx: Fix critical section in scu driver
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Add critical section to scu one-shot sequencer.
2022-04-12 07:55:00 +09:00
SPRESENSE
e725829547
cxd56xx/cxd56_emmc.c: Fix compile warning
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Add necessary include header named debug.h for using ferr and
finfo.
2022-04-12 07:55:00 +09:00
SPRESENSE
5be940080b
arch: cxd56xx: update loader and gnssfw version
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Update loader and gnssfw to version 2.2.20585
2022-04-12 07:55:00 +09:00
Xiang Xiao
c235c0fa43
boards/lx_cpu: Enable up_perf API
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-08 21:02:13 -03:00
Xiang Xiao
1f7b49d700
boards/nucleo-h743zi2: Enable up_perf API
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-08 21:02:13 -03:00
chao.an
8d66dbc068
arm/armv[7|8]-m: skip the fpu save/restore if stack frame is integer-only
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-08 14:28:41 +09:00
Jiuzhu Dong
d87cf8d4ca
fs/poll: change format for type pollevent_t
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-04-07 12:14:06 +08:00
zhuyanlin
6a761ff087
arch:tcbinfo: update tcbinfo as xcpcontext update
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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-05 13:33:00 +02:00
Petro Karashchenko
d08fbca679
nuttx: unify FAR attribute usage across the code
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-04 21:32:58 +08:00
Michael Jung
e3926ecb16
stm32u5: stm32_stdclockconfig fixes
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Fix stm32_stdclockconfig for stm32u585xx to the extend that the
B-U585I-IOT02A board's clock tree can be configured. This board uses
the MSIS as PLL1's input clock and the LSE to autotrim the MSIS.
2022-04-03 23:20:03 +03:00
wangbowen6
bcb2530b18
arm/chip: add backtrace support for all chips that support thumb instruction set.
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Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-04-03 00:22:57 +08:00
raiden00pl
b487101b87
stm32: add support for up_perf
2022-04-02 10:34:35 -03:00