Richard Tucker
4888be37e3
arch/arm/src/sam34/sam_dmac.c: Fix compilation error
2022-03-09 10:18:32 +08:00
Huang Qi
bfedbf1c05
arm/imx6: Enable setjmp test in ostest
...
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-08 21:00:29 +08:00
Huang Qi
cfff115f21
arm: Move setjmp to common place
...
Since some Cortex A core supports thumb mode also,
thus they can share same implementation.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-08 21:00:29 +08:00
Juha Niskanen
779665c704
arch/arm/src/stm32l4: STM32L4+ might need flash data cache corruption workaround
...
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2022-03-04 14:00:20 +08:00
Oleg Evseev
625d230d28
arch/arm/src/stm32f7/stm32_can.c: fix CAN3 receiving
...
by fixing filter initialization.
STM32F7 CAN3 works in single peripheral configuration and there is only 14 filter banks: 0-13. Previously not available 14 indexed filter (CAN_NFILTERS/2) was wrongly used for for receiving to FIFO. Now zero indexed filter is correctly used instead.
2022-03-03 14:31:37 -03:00
zhuyanlin
5af1b671b6
armv7-a/armv7-r:cache: modify hardcode in cache set/way operation
...
Some chip not use the default cache size & way , read from
CCSIDR instead of hardcode.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-03 14:11:31 +08:00
Masayuki Ishikawa
2a434fe1fa
arch: imx6: Add the pgheap for imx6
...
Summary:
- This commit adds the pgheap for imx6
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-03-01 12:18:47 +08:00
Xiang Xiao
da954956e7
Simplify DEFAULT_SMALL usage in Kconfig
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-01 03:15:01 +08:00
chao.an
0961f12e28
arm/phy62xx: remove unused private header
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-03-01 00:33:58 +08:00
Masayuki Ishikawa
56e0e6a5ec
arch: imx6: Remove sem_t from imx_serial.c
...
Summary:
- I noticed that when exiting getprime, DEBUGASSERT happens in
nxsem_wait()
- Finally, I found that up_putc() uses nxsem_wait()
- This commit fixes this issue by removing the semaphore.
- Also, up_putc() now calls imx_lowputc()
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-28 16:09:01 +08:00
Masayuki Ishikawa
a75d905760
arch: imx6: Refactor imx_lowputc()
...
Summary:
- Remove '\n' -> '\r\n' conversion
- Remove waiting for FIFO empty after sending a character
- Remove CONFIG_DEBUG_FEATURES
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-28 16:09:01 +08:00
Xiang Xiao
872c570343
arch: Align the implementation of stack related functions
...
arm: Avoid call k[u]mm_memalign to save the code size
ceva: Correct stack_base_ptr usage(top of stack v.s. bottom of stack)
mips: Correct the stack alignment in up_use_stack
misoc: Correct the stack alignment in up_use_stack
or1k: Correct the stack alignment in up_use_stack
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 15:05:41 +08:00
Xiang Xiao
3bf416e8b8
arch: Move STACK_ALIGNMENT definition to up_internal.h
...
to avoid the same macro duplicate to many place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 15:05:41 +08:00
Xiang Xiao
44bd3212d4
arch: Remove SYS_RESERVED from Kconfg
...
let's arch define the correct value instead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
087b9e5ff3
arch: Move the content from svcall.h to syscall.h
...
and remove svcall.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
0c7517e579
arch: Remove the duplicated syscall.h in each arch
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
chao.an
b57e0b6118
arm/armv7-a/r: check ARMV7A_DECODEFIQ on dataabort
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-27 17:25:22 +09:00
chao.an
c369e47107
arm/armv7-a/r: handle swi on interrupt stack
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-27 17:25:22 +09:00
lp.xiao
fac10b6ebd
stm32f103re has a dac module.but the pinmap file has no corresponding definition
2022-02-27 14:39:17 +08:00
Xiang Xiao
b95022f8de
arm/armv7-a: Remove CONFIG_SMP guard from arm_scu.c
...
since ACTLR.SMP need enable to make cache work on Cortex A7:
https://developer.arm.com/documentation/ddi0464/f/CHDBIEIF
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-26 14:15:30 +09:00
Masayuki Ishikawa
de95a8550f
arch, board: Add thumb support to i.MX6
...
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c
Impact:
- i.MX6 only
Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-25 10:51:12 +08:00
Xiang Xiao
25213c42a5
arch/arm: Remove the empty spinlock.h file
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-25 09:18:53 +09:00
Anton Potapov
9603b8f67c
Add DAC2 configuration for stm32f405.
2022-02-24 12:09:41 -05:00
Xiang Xiao
d7fe0127b0
Replece clock_gettime(CLOCK_REALTIME) with clock_systime_timespec if suitable
...
it's better to call the kernrel api insteaad user space api in kernel
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 01:06:36 +08:00
Xiang Xiao
43f57240e0
Replece clock_gettime(CLOCK_MONOTONIC) with clock_systime_timespec
...
it's better to call the kernrel api insteaad user space api in kernel
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 01:06:36 +08:00
chao.an
13889ba868
arch/arm: unify some duplicate code to common layer
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 21:35:55 +08:00
chao.an
6cc0aaf5b9
arch/arm: unify switch context from software interrupt
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
chao.an
db3a40ac25
arch/armv7-r: unify switch context from software interrupt
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
chao.an
61cd9dfca1
arch/armv7-a: unify switch context from software interrupt
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
Gregory Nutt
1ded8bbabb
Garbage configuration setting in EFM32 code
...
arch/arm/src/efm32/efm32_start.c:
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_NUTTX_KERNEL
efm32_userspace();
showprogress('E');
#endif
But there is no CONFIG_NUTTX_KERNEL configuration setting. Comparing this to other architectures it is clear this should be
#ifdef CONFIG_BUILD_PROTECTED
2022-02-23 03:40:44 +08:00
Xiang Xiao
f1ed349dd9
sched/clock: Remove CLOCK_MONOTONIC option from Kconfig
...
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 01:21:26 +08:00
chao.an
0aa0022b12
arch/armv7-a: replace SYS_signal_handler_return hardcode
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-22 17:59:02 +08:00
chao.an
e0fabbfdd6
arch/arm: replace SYS_syscall_return hardcode from syscall
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-22 17:59:02 +08:00
Xiang Xiao
163fe4ff0b
boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3
Remove the double blank line from source files
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Oki Minabe
e9a94a003d
old arm: add BUILD_KERNEL code in arm/arm_vectors.S
2022-02-20 21:03:54 +09:00
Oki Minabe
19e5c8f6d3
armv7-a/r: fix SVC's sp restore in arm_vectors.S
2022-02-20 18:39:30 +08:00
Xiang Xiao
d29f3bd21c
arm/rtl8720c: Remove the unused Toolchain.defs
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 04:15:34 +01:00
lp.xiao
bc12260540
dp83848c ethernet phy interrupt support
2022-02-17 08:00:53 +01:00
Alan Rosenthal
8defb843aa
Remove duplicate linker script definitions
...
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.
This PR cleans up the logic so they're only listed once.
## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!
## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Oki Minabe
68a305438b
fix armv7-a gtm.h GTM_COMP1 and GTM_AUTO defines.
2022-02-16 18:50:42 +01:00
Oki Minabe
c1ea37742b
fix arm FPSCR typos in comments.
2022-02-17 01:08:11 +08:00
Simon Filgis
cf008c94cc
arch/arm/samv7: fix peripheral id shift during transmit xdma configuration
2022-02-16 17:16:53 +01:00
Masayuki Ishikawa
b60b6120de
arch: armv7-a: Fix arm_syscall for SYS_pthread_start
...
Summary:
- I noticed that pthread always crashes when started
if CONFIG_BUILD_KERNEL=y
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-16 13:06:25 +01:00
Petro Karashchenko
41c95da594
register_driver: fix driver modes accross the code
...
State of problem:
- Some drivers that do not support write operations (does not
have write handler or ioctl do not perform any write actions)
are registered with write permissions
- Some drivers that do not support read operation (does not
have read handler or ioctl do not perform any read actions)
are registered with read permissions
- Some drivers are registered with execute permissions
Solution:
- Iterate code where register_driver() is used and change 'mode'
parameter to reflect the actual read/write operations executed
by a driver
- Remove execute permissions from 'mode' parameter
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-16 16:15:29 +08:00
Masayuki Ishikawa
34cf6949ac
arch: armv7-a: Add debug messages for addrenv
...
Summary:
- This commit adds debug messages for addrenv
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 17:22:52 +08:00
Masayuki Ishikawa
e7cb1b4fb1
arch: rt8920c: Move -fno-common option to ARCHCFLAGS/ARCHCXXFLAGS
...
Summary:
- Apply the same style as sabre-6quad
Impact:
- None
Testing:
- Build only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 16:27:53 +08:00
fenghang
555d25633a
add phyplus_rel_1.4
...
update source for phyplus driver rel_1.4
update source for phyplus driver rel 1.4
update source for phyplus driver 1.4
update phy6222 config files
2022-02-15 10:21:10 +08:00
Xiang Xiao
4207882cdc
arm/armv8-m: Handle the special irq correctly in up_secure_irq
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 09:45:34 +09:00
David Sidrane
1ca952243c
stm32h7:flash can not use usleep
...
commit 328374f4658d11655f268f968f4c6c7a3942f320
changed the wait to use usleep. This killed the
write performace from the published values in the
datasheet of ~100 us to 2 mS per 256 bits. On
a 1000 per tick config. It can be 10 X worse
on the default 100 per tick config.
This changes uses up_udelay.
2022-02-15 02:09:04 +08:00
David Sidrane
8659a31c9d
stm32h7:flash Fix lock violations
2022-02-15 02:09:04 +08:00
David Sidrane
8ca4cf49b1
stm32h7:Fix build for all config {R|T}XDMA states
2022-02-14 18:43:30 +01:00
Xiang Xiao
17a7d612df
arch: Replace nx_vsyslog with vsyslog
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-14 09:41:45 -03:00
chao.an
4be416a2a8
arm/backtrace: fix the compile warning
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-14 16:29:38 +08:00
raiden00pl
00917bfe9d
stm32/fdcan: add CAN FD frames support
2022-02-14 10:42:01 +08:00
raiden00pl
dd8408a973
stm32/fdcan: use array indexes when accessing RX/TX FIFO
2022-02-14 10:42:01 +08:00
Michael Jung
70dae3bb3b
Add arm_tcbinfo.c to stm32u5's common C sources
...
And re-order the list of common C sources alphabetically.
Signed-off-by: Michael Jung <mijung@gmx.net>
2022-02-13 16:32:35 +08:00
Michael Jung
5c1c939cdc
stm32u5: Architecture Support for STM32U5
...
Architecture support for STMicroelectronics STMU585xx MCUs. This is
based on corresponding code for STM32L5, but has been considerably
adjusted. Tested with a B-U585I-IOT02A board and a simple NSH
configuration, but only running NuttX in the non-secure world with
TrustedFirmware-M.
Signed-off-by: Michael Jung <mijung@gmx.net>
2022-02-13 16:32:35 +08:00
Michal Lenc
56b3fc0ef9
arch/arm/src/samv7: added support for PWM driver
...
This commit adds initial support for PWM driver to SAM MCU series.
Only general PWM on PWMH output is currently supported, complementary
output on PWML is not allowed. The current state of the driver also does
not support external triggering of other perihperals.
Multichannel option is supported. The functionality of the driver was
tested on an example pwm application and with a real time control system.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-02-13 03:20:07 +08:00
Huang Qi
95b0c85f58
arch: Add xxx_tcbinfo.c to SoC level Make.defs
...
Fix build break with CONFIG_DEBUG_TCBINFO enabled.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-12 21:07:35 +09:00
zhuyanlin
3ab65f9b08
armv7-a/r: use flush/clean_all if size large than cache size
...
For cache flush/clean performance
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-09 18:16:31 +01:00
zhuyanlin
4eba2f3527
armv7-a/r:cache: add cp15_cache_size function
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Add cp15_cache_size function for armv7-a/r
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-09 18:16:31 +01:00
Huang Qi
c0a0de97ce
Revert "libc: Call pthread_exit in user-space by up_pthread_exit"
...
This reverts commit f4a0b7aedd
.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-09 21:21:43 +08:00
Alin Jerpelea
7a674b6287
Makefiles: change license to Apache
...
Make files are recipes based on contributions from from Gregory Nutt
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-02-09 19:58:52 +08:00
zhuyanlin
cc8ab23550
armv7-r/a: fix a4 register use in xxx_invalidate/flush/clean_all.S
...
Use sub loop instead of add loop
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-08 19:39:43 +09:00
SPRESENSE
8de07b2ae8
boards: cxd56xx: audio: Support I2S input
...
Enable the driver setting of I2S input.
2022-02-08 10:47:03 +01:00
raiden00pl
bc178344a9
net/can: add an option to control CAN EXTID support
2022-02-06 17:09:11 +08:00
raiden00pl
341bbe38d5
arch/stm32: add FDCAN SocketCAN support
2022-02-06 17:09:11 +08:00
Petro Karashchenko
e545c440f4
arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop
...
This change fix the regression that was introduced with
https://github.com/apache/incubator-nuttx/pull/4904
In case if D-Cache in configured in Write-Through mode there is
Cortex-M7 erata 1313001 that describes a situation when linefill
buffer or cache contains stale data. Even if progmem write loop
does not fully matches the description there is a possibility
to program stale data if there is no DMB instruction after each
write operation to progmem latch buffer.
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-05 03:14:07 +08:00
Petro Karashchenko
47a09ed255
arch/arm/samv7: add arm_systemreset.c to CMN_CSRCS
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-04 16:40:50 +08:00
chao.an
ed4f852073
arch/arm: correct the sched_lock/spin_lock handling
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-03 11:09:18 -03:00
chao.an
d59931159a
arch/arm: fix leaving from critical section
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-02 21:45:13 +08:00
Xiang Xiao
4c167b0729
Correct the code alignment
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-01 21:22:21 -03:00
Petro Karashchenko
601a0e8a32
arch/arm/samv7: fix leaving from critical section in HSMCI callback
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-31 16:56:52 -03:00
Xiang Xiao
2c3020ddaf
arch/Toolchain.defs: Replace --print-file-name=libgcc.a with --print-libgcc-file-name
...
to more compatable with clang: https://reviews.llvm.org/D25338
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-31 09:46:04 +01:00
Xiang Xiao
e0b62bf677
arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately
...
since board's Make.defs may overwrite ARCHCPUFLAGS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-30 11:04:35 +09:00
David Sidrane
0f1342f36b
stm32:Add OTG ID GPIO disable
2022-01-30 01:50:37 +08:00
David Sidrane
99083b8dd1
stm32{f|h}7:Fixed typo in Kconfig help
2022-01-30 01:49:57 +08:00
chao.an
7d8c2c1ad6
cortex-m/doirq: do not update the CURRENT_REGS on nested interrupt handling
...
current implementation incorrectly update CURRENT_REGS to interrupt context if
trigger nested interrupt, (e.g, hard fault occurs during interrupt handling)
this would ambiguous for programs using CURRENT_REGS, this patch will prohibit
the update of CURRENT_REGS on nested interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-29 01:04:00 +08:00
Xiang Xiao
1c2c0e4707
arch/Toolchain.defs: Simplify the builtin library addition for EXTRA_LIBS
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-28 12:02:38 +01:00
Petro Karashchenko
0ffffe19b1
typo: change evernt to event in comments
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-27 09:57:31 -03:00
Xiang Xiao
f903a55102
sched/tcbinfo: Fix the compile warning
...
Update tcbinfo struct
armv8-m/arm_tcbinfo.c:109:3: warning: excess elements in struct initializer
109 | TCB_REG_OFF(REG_S31),
| ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:109:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:110:3: warning: excess elements in struct initializer
110 | 0,
| ^
armv8-m/arm_tcbinfo.c:110:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:111:3: warning: excess elements in struct initializer
111 | TCB_REG_OFF(REG_FPSCR),
| ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:111:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:112:3: warning: excess elements in struct initializer
112 | 0,
| ^
armv8-m/arm_tcbinfo.c:112:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:37:1: warning: missing braces around initializer [-Wmissing-braces]
37 | {
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 17:36:27 +08:00
zhuyanlin
644c2be3aa
armv7-a/r:cache: implemention clean&flush_dcache_all
...
For armv7-a/r cache:
And clean_dcache_all, flush_dcache_all
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 15:15:28 +08:00
zhuyanlin
1b08f607be
arm/xtensa:cache: flush/clean dcache all if size large than cache size
...
For performance, if size large than cache size, use xxx_all instead
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 15:15:28 +08:00
zhuyanlin
4d5c2586a9
armv7-a/r:cp15_invalidate_dcache_all: fix Sets mask error.
...
As NumSets field is bits 13-27, use 0x7fff instead.
And add way to get from CCSIDR.
2022-01-27 15:13:08 +08:00
Petro Karashchenko
48211f90d3
ci: select ARMV7A_TOOLCHAIN_GNU_EABIL for ARMv7-A based builds
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-25 20:24:28 +08:00
Masayuki Ishikawa
7b1cf2dfac
arch: arm: Fix make export for armv7-a SoCs
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Summary:
- I noticed that make export does not work with swama5d4-ek:knsh
- This commit fixes this issue.
- NOTE: apps/Makefile also needs to be updated.
Impact:
- CONFIG_BUILD_KERNEL=y only
Testing:
- Build (make and make export) with sama5d4-ek:knsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-01-25 11:05:22 +08:00
Norman Rasmussen
da5659138b
Fix regression where used code was marked as unused
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Commit 5d1a444812
replaced __attribute__
((unused)) with unused_code but two instances of __attribute__ ((used))
were also incorrectly replaced. Add used_code/used_data and used them
instead.
2022-01-23 14:57:19 +08:00
raiden00pl
4c2dd3924a
include/nuttx/can.h: rename CAN_ERR_CTRL to CAN_ERR_CRTL for compatibility with libcanutils
2022-01-23 01:34:34 +08:00
Petro Karashchenko
6c27f3c19d
toolchain: add libm to EXTRA_LIBS only if it is provided by the compiler
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Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-22 15:36:29 +08:00
Xu Xingliang
021363f1db
driver/mmcsd: add option to limit block count in multiple-block transfer mode.
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Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2022-01-22 14:59:26 +08:00
zouboan
0342272e5a
up_progmem_erasesize for stm32f20xxf40xx_flash.c
2022-01-21 14:57:32 +08:00
Xiang Xiao
2935751bfd
Fix error: implicit declaration of function 'up_cpu_index'
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Xiang Xiao
77792a1598
sched: Define CONFIG_SMP_NCPUS to 1 in no SMP case
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to simplify the SMP related code logic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Petro Karashchenko
08043fb5bc
net: unify FAR keyword usage for all net buffer memory mapped buffers
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:42:56 +08:00
Petro Karashchenko
767cf282c7
boards/arm/samv7: move HSMCI interface to common
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:24:14 +08:00
Daniel Agar
12c8a9626c
stm32f7 serial fix PM_CONFIG build
2022-01-20 01:08:06 +08:00
Petro Karashchenko
a6147109b1
arch/arm/src/armv6-m: fix typo
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-19 15:32:58 +01:00
Xiang Xiao
8bcdefafc9
board: Remove -fno-strength-reduce
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-19 00:14:03 +01:00
Petro Karashchenko
9551de7115
net: use HTONS, NTOHS, HTONL, NTOHL macro in kernel code
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-18 10:59:47 +01:00
raiden00pl
e140ba1a21
arch/stm32: fdcan cosmetics
2022-01-17 09:36:00 -03:00
raiden00pl
c450dea6e5
stm32: add FDCAN support
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based on PR #2987
2022-01-17 09:36:00 -03:00
Petro Karashchenko
4f98ac4879
arch/arm/samv7: implement quadrature encoder driver
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-17 09:35:12 -03:00
Petro Karashchenko
8d3bf05fd2
include: fix double include pre-processor guards
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
chao.an
c27839f98e
arm/xtensa: save the running registers to xcp context
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-15 02:20:01 +08:00
Jari van Ewijk
3aed0aa641
S32K1XX: implement uniqueid
2022-01-13 15:34:47 -08:00
Jari van Ewijk
0fc613f0b3
S32K1XX Reset Cause PROCFS: Add Kconfig option and cleanup
2022-01-13 01:29:42 +08:00
Xiang Xiao
1b77ae88ef
fs/procfs: Remove the unnecessary strcmp
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since the procfs already make the same check for us
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-12 07:19:40 +01:00
Petro Karashchenko
a743fed63d
file_operations: get back C89 compatible initializer
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-11 02:14:00 +08:00
Petro Karashchenko
1fd51ccbe2
arch/arm/samv7: rework SAMv7 timer counter implementation
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There are two issues that are addressed with this change:
- According to SAM E70/S70/V70/V71 Family datasheet the
timer counter channels are 16-bit so timer counter
value should be changed from uint32_t to uint16_t
- The interrupt handling for timer counter channels can
be simplified
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-09 17:43:31 +08:00
Petro Karashchenko
e7f9c7af21
typos: fix typos in Kconfig files
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-08 06:46:26 -03:00
chao.an
8c35d31808
Kconfig: Remove CONFIG_ prefix from config definition
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-07 13:16:18 +08:00
raiden00pl
6fe95d8314
stm32: add SocketCAN support, based on stm32_can.c
2022-01-05 06:16:41 -08:00
Zeng Zhaoxiu
fb43fd73ed
signal: signal handler may cause task's state error
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For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
2022-01-05 21:36:44 +09:00
raiden00pl
5b9b3814f8
stm32: add CAN error support
2022-01-05 18:33:06 +08:00
Petro Karashchenko
4b190fbce1
arch/arm/samv7: correct number on interrupts
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:22 +08:00
Petro Karashchenko
6c2b40f98a
typos: fix typos in many files
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:07 +08:00
Petro Karashchenko
c7d3a674fd
drivers/sensors/as5048b: fix lower half init issue
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 11:38:44 +08:00
Petro Karashchenko
d23ad9b9b0
userspace: fix typos in comments
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-02 20:50:30 +01:00
chao.an
736add0fe8
arch/backtrace: correct the skip counter
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-30 16:57:40 +08:00
Xiang Xiao
b92c90ee81
arch/arm: Fix rebase error in arm_backtrace_thumb.c
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 20:42:05 +08:00
chao.an
7ed0b97414
make/allsyms: skip the unnecessary link operation
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For incremental compilation, skip the stage 1 dummy link
operation if nuttx elf has been generated
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 23:47:10 -06:00
Xiang Xiao
dd942f0b04
sched/backtrace: Dump the complete stack regardless the depth
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 12:09:54 +08:00
chao.an
cf2dfa8985
arch/arm/assert: move the arm_assert to common code
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 05:09:30 -06:00
chao.an
579738c8fa
arch/arm: move the backtrace implement to common code
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 03:02:01 -06:00
chao.an
a42aa8415d
compile/flags: add FRAME_POINTER into Toolchain.defs
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
chao.an
8eb999ff03
arch/arm: select ARM_THUMB by default for Cortex-M
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:30:53 -06:00
Petro Karashchenko
3ccb657dc2
nuttx: remove space befone newline in logs
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-27 21:01:19 -06:00
chao.an
6069433d2d
arch/arm/cortex-a/r: dump all registers with alias
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-23 06:54:32 -06:00
David Sidrane
74e692b3c1
stm32f7:sdmmc invalidate before DMA to avoid eviction overwrite
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For FAT the same buffer is used for read and writes, there
is a possibility a cache line is dirty. But the fs is
not dirty and will not write the sector to disk. This can
be seen https://github.com/PX4/NuttX/pull/175
When the system is busy that cache line can be evicted after the
RX DMA has completed and overwrite the data in memory. The solution
is to invalidate before the DMA to prevent an evection causing an
overwite, and after the DMA it to insure coherency.
2021-12-22 20:44:04 -06:00
chao.an
a0b61bbf6f
arm/cortex-a/r: enhance the task dump
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add irq stack information
add cpu loading
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-22 11:46:02 -03:00
chao.an
2737701996
cortex-m/hardfault: add secure-fault handler
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-21 07:08:13 -06:00
Juha Niskanen
422ceec99b
Fix typos in comments and Kconfig files
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Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-12-21 03:26:16 -06:00
Simon Filgis
6cc48ff6ff
arch/arm/samv7: initial support for LIN bus communication
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-20 18:23:05 -03:00
Petro Karashchenko
3e76c3266e
assert: unify stack and register dump across platforms
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-20 00:02:12 -03:00
David Sidrane
e269b5fa28
Revert "stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mode. When it was in slow speed mode (by default), the output SDMMC_CK clock rise and fall times were about 13 ns each, that were very slow and prevented some SDIO devices from working."
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This reverts commit 0aecfe8691
.
2021-12-19 01:40:35 -06:00
raiden00pl
87a8b1bed9
nrf52/Kconfig: NRF52_SDC_LE_CODED_PHY not available for nrf52832
2021-12-18 12:27:59 -06:00
raiden00pl
f3fdd5a019
arch/arm/src/nrf52/Kconfig: select IRQPRIO for SoftDevice
2021-12-18 09:13:36 -06:00
raiden00pl
a6c64795f4
arch/arm/src/nrf52/nrf52_sdc.c: raise error if BT device not selected
2021-12-18 09:13:36 -06:00
raiden00pl
cf2dae8d79
arch/arm/src/nrf52/nrf52_sdc.c: nxstyle fixes
2021-12-17 12:35:17 -06:00
raiden00pl
af143c96fc
arch/arm/src/nrf52/nrf52_sdc.c: public device address and static device address support
2021-12-17 12:35:17 -06:00
raiden00pl
c7f6ac63b0
arch/arm/src/nrf52/nrf52_sdc.c: add option to register UART H4 device
2021-12-17 12:35:17 -06:00
raiden00pl
23ef3ea64c
arch/arm/src/nrf52/nrf52_sdc.c: remove nedless new lines
2021-12-17 12:35:17 -06:00
raiden00pl
26951f5018
arch/arm/src/nrf52/nrf52_sdc.c: print HCI opcode as hex
2021-12-17 12:35:17 -06:00
raiden00pl
07c9204fd6
arch/arm/src/nrf52/nrf52_sdc.c: fix status byte offset
2021-12-17 12:35:17 -06:00
raiden00pl
ab66800e13
arch/arm/src/nrf52/Kconfig: fix typos
2021-12-17 12:35:17 -06:00
raiden00pl
ba6e8696b2
arch/arm/src/nrf52/hardware/nrf52_ficr.h: add device address types
2021-12-17 12:35:17 -06:00
raiden00pl
07d295b8db
add 5-Clause Nordic License barrier for Nordic SoftDevice Controller
2021-12-17 11:22:39 -06:00
Gerson Fernando Budke
2dd5578d50
arch/arm/src/samv7/Kconfig: Define mem sizes
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Current samv7 platform does not define SoC memories sizes. This define
both internal flash and sram memories sizes and update all defconfig
files.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
Alexander Lunev
0aecfe8691
stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mode.
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When it was in slow speed mode (by default), the output SDMMC_CK clock rise and
fall times were about 13 ns each, that were very slow and
prevented some SDIO devices from working.
2021-12-16 01:28:05 -06:00