Commit Graph

42965 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
4ff754827c espressif: Fix prompt string of Wi-Fi FS mount point configs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
a1af605973 espressif: Fix references to Wi-Fi according to Wi-Fi Alliance
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
ligd
e3d20d2c54 mqueue: fix memory leak cause by lost inode_release
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-10-25 18:57:43 +09:00
Masayuki Ishikawa
585b1fc113 fs: mqueue: Change MAX_MQUEUE_PATH to 64
Summary:
- This commit changes MAX_MQUEUE_PATH to 64 to reduce stack
  memory if the NAME_MAX is large

Impact:
- None

Testing:
- Tested with spresense:rndis_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-10-25 03:57:09 -05:00
Alan C. Assis
7e8003cba1 Move chip specific file compilation to CHIP_CSRCS 2021-10-23 04:03:12 -05:00
Alan C. Assis
03738622a1 esp32s2: Add RNG driver support and board profile example 2021-10-23 04:03:12 -05:00
Gustavo Henrique Nihei
3819d93b4e fs/mount: Properly handle missing FS on the supported list
Instead of reporting the failure to find a given FS, nx_mount was
reporting a failure to find the block driver, even when the actual block
driver exists.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-23 04:02:22 -05:00
Gustavo Henrique Nihei
c019533d7a fs/driver: Fix missing declaration of find_mtddriver when CONFIG_MTD=n
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-23 04:02:22 -05:00
Gustavo Henrique Nihei
9056cabd83 boards/esp32: Select MTD_SMART if SmartFS is selected for SPI Flash MTD
If MTD_SMART is not selected for build, it will result in a build error.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-23 04:01:49 -05:00
Gustavo Henrique Nihei
f74c6f7f5b boards/esp32: Transform SPI Flash FS deps into reverse deps
Currently, when no file system is selected, the "choice" lists zero
entries, which is very confusing to the user. To handle this, the
"choice" options have their dependencies ("depends on") transformed into
reverse dependencies ("select").

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-23 04:01:49 -05:00
Gustavo Henrique Nihei
925e8f9d54 boards/esp32: Optionally mount SPI Flash MTD on bring-up
Give the user the option to simply register the SPI Flash MTD as a
device node on /dev.
Currently, this is achievable only when SmartFS (which is the default FS
option) is disabled by force. This behavior is fixed by using the
"optional" Kconfig keyword, which makes the "choice" selectable.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-23 04:01:49 -05:00
David Sidrane
e1a0a1188e stm32h7:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
e66423229a stm32f7:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
fd2c1cb216 stm32:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
9d8f7126f6 armv7-m,armv7-r,armv8-m:MPU Add mpu_reset and ARM_MPU_EARLY_RESET
When NuttX is booted from a foreign (non NuttX)
   bootloader. There as a possibility that the
   bootloader configured the MPU, in an
   incompatible way for the NuttX memory usage.

   The option to reset the MPU before it is initialized
   may not succeed if the bss and data initialization
   code violated the previous MPU configurations.

   Added herein are ARM_MPU_RESET and
   ARM_MPU_EARLY_RESET. The former can be used
   If the system is capable of booting and running
   NuttX MPU configuration code without an MPU
   violation. The latter is used if the system can
   not run the bss and data initialization code.

   These are options so that a NuttX may be configured to
   not clobber a bootloader MPU configuration in a system
   that is architected to share the MPU configuration task.
2021-10-23 03:58:26 -05:00
zhuyanlin
cf1a04d0a2 xtensa:cache: add lock & unlock feature
Since some xtensa cores cache support lock & unlock feature.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
zhuyanlin
b4ea11f7b1 arch:cache: add lock feature for cache
Some architectures support lock & unlock cache feature.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
David Sidrane
90cfa6f313 imxrt:syslog is dependant on arm_lowputc 2021-10-22 10:07:20 -05:00
oreh-a
3c1ac89557 Fixed line length 2021-10-22 09:03:14 -05:00
Alexander Oryshchenko
ed392abb83 Added ARCH_BOARD_STM32F0G0L0_CUSTOM_CLOCKCONFIG option to stm32f0/g0/l0 chip configiuration 2021-10-22 09:03:14 -05:00
Eero Nurkkala
e57f3f7a3a mpfs: emmcsd: provide proper internal emmc settings
So far the SD-card functionality has been tested with
the driver. Now, also the internal eMMC has been tested
working with this patch. This patch applies IOMUX and
clock settings that have been tested working with the
internal eMMC in the Polarfire Icicle kit.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:41:08 -05:00
Eero Nurkkala
c7cf9fd9d2 mpfs: board Make.defs: add bootloader linker option
Use the linker script used with bootloaders that start
from the eNVM.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
ad76b6733c mpfs: boards: add ld-envm.script
This configuration is used when flashing nuttx as a bootloader
in the eNVM region.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
c34b9620db mpfs: clockconfig: add clock initialiation sequence
Add clock initialization sequence especially for systems
containing no bootloader.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
bc72ccdf6a mpfs: Kconfig/Make: add DDR support flag
This adds the proper flag for introducing the DDR
support. Also call the mpfs_ddr_init() at the
proper location.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
3b330089d5 mpfs: ddr: add DDR training
This adds DDR training. The training has a small chance of failing,
and then the training is restarted.

DDR training cannot be done meaningfully while the software is
in DDR. If the system is intended to run from eNVM, like a
bootloader, the linker script should be tuned to utilize the envm
region as follows:

  envm (rx)   : ORIGIN = 0x20220100, LENGTH = 128K - 256
  l2lim (rwx) : ORIGIN = 0x08000000, LENGTH = 1024k

256 bytes are reserved for the system; The fixed block may be
installed from the 'hart-software-services' -repository:
https://github.com/polarfire-soc/hart-software-services.git

For example, the 256-byte image: hss-envm-wrapper-bm1-dummySbic.bin
may be prepended on the nuttx bootloader image in the following
manner:

 cat hss-envm-wrapper-bm1-dummySbic.bin > nuttx_bootloader.bin
 cat nuttx.bin >> nuttx_bootloader.bin
 riscv64-unknown-elf-objcopy -I binary -O ihex --change-section-lma
  *+0x20220000 nuttx_bootloader.bin flashable_image.hex

This provides an image 'flashable_image.hex' that may be flashed on
the eNVM region via Microsemi Libero tool.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
c5b11f42b6 mpfs_head.S: Support for booting on different harts and from eNVM
- Fix the FPU enabling code
- If booting from eNVM, all harts start booting. With CONFIG_MPFS_BOOTLOADER,
  one can allow just one hart booting and rest are stuck in wfi.
- Check that mtvec is actually updated before continuing the boot
- Create 5 IRQ stacks, one for each hart

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
37761c293d mpfs_head.S: Fixes for booting on different harts
- Jump to mpfs_start with mhartid in a0 as the comment says
- Don't invalidate mmu tlb on e51 (it doesn't have mmu)
- Fix FPU initialization flags on e54 (it fires IRQ5 and crashes)

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
e5843db282 mpfs: Add configuration flags to configure NuttX booting on single hart
The bootloader hart also configures the needed clocks and peripherals.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
d909b0f635 mpfs: hardware/memorymap: add more base addresses
Add a number of missing base addresses.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
chao.an
bd7cb1aae5 sim/bluetooth: remove the WIRELESS_BLUETOOTH depends if native host is in use
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-10-21 11:24:46 -05:00
anjiahao
0aa14f832d mq_open: add long file name check and parameter check
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2021-10-21 11:01:45 -03:00
Alin Jerpelea
40b467420f author: Florian Olbrich : update licenses to Apache
Gregory Nutt has submitted the SGA
Florian Olbrich has submitted the ICLA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-10-21 10:14:11 +02:00
Kenneth Thompson
0e2a3ecdf8 drivers/can: Fix can_poll() POLLOUT calculation
can_poll() would indicate that there is no space in the TX FIFO if there is
already one element in the FIFO.
2021-10-21 02:05:17 -05:00
Xiang Xiao
7183009400 ioexpander/gpio: Remove the hardcode 100 limitation
it's very easy to have more than 100 GPIOs on the modern SoC

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-20 10:10:50 -07:00
Jiuzhu Dong
f1f0bcc521 driver/sensor: support new sensor type:ECG,PPG,Imdepance
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-20 09:55:18 -05:00
丁欣童
26fedb2770 fakesensor: transform ddmm.mmmm to dd.mmmmmm.
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-20 09:55:18 -05:00
Gustavo Henrique Nihei
2a8e7b064d boards/esp32: Return proper error code on esp32_spiflash_init
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-20 09:54:25 -05:00
Gustavo Henrique Nihei
7368f7a2c8 xtensa/esp32: Make SPI Flash initialization common to all ESP32 boards
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-20 09:54:25 -05:00
Abdelatif Guettouche
018aa8eb8d esp32c3_serial.c: Remove the stub implementations of the early serial
functions as they are only called when the configuration is enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-20 10:22:10 -03:00
Xiang Xiao
1efc9fbac6 sim/rptun: Trigger the callback only the sequnece number change
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-20 10:21:54 -03:00
zhangguoliang
12b2b7c240 fix: charger: change the operations of battery ioctl to common
Almost all charger chip need the same oprations, which was not
appropriate only for BQ2429X. Therefore, open the operations to
all charger chips.

Signed-off-by: zhangguoliang <zhangguoliang3@xiaomi.com>
2021-10-20 09:52:21 +02:00
weizhifang
2a6673bcdd feature: charge: modify battery_gauge code
add temperature and current ioctl api

Signed-off-by: weizhifang <weizhifang@xiaomi.com>
2021-10-20 09:52:11 +02:00
Abdelatif Guettouche
9235d6605b boards/esp32&esp32c3: Remove crypto accelerators' defconfigs.
Since the tests were removed from the drivers, there is no need for
these defconfigs anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
55e8b17974 boards/risc-v/esp32c3: Remove the flash encryption test.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
c83c1071cc esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
e424241d09 arch/risc-v/esp32c3: Remove the bignum test from the driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
91cb9dafaf arch/risc-v/esp32c3: Remove the RSA test from the driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
652d77efd2 arch/risc-v/esp32c3: Remove the SHA test from the driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
5d1c01aea7 arch/risc-v/esp32c3: Remove the AES test from the driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00