Port C was not working because the GPIO pin count was
wrong. The 48 pin packages has 34 GPIO (Not counting PH0 & PH1)
It is GPIOA GPIO B (sans PB11) and GPIOC PC13-PC15
Summary:
- This commit introduces SP_WFE() and SP_SEV() to be used for spinlock
- Also, use wfe/sev instructions for ARMV7-A to reduce power consumption
Impact:
- ARMV7-a SMP only
Testing:
- sabre-6quad:smp (QEMU, dev board)
- maix-bit:smp, esp32-devkitc:smp, spresense:smp sim:smp (compile only)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
arch/arm/src/stm32/hardware/stm32_spi.h:
* Avoid numerous ifdef on STM32 part numbers and make the
different variations of SPI peripheral features more
self-documenting: based on STM32_HAVE_IP_SPI_V* defines
from chip.h, define some or all of HAVE_SPI_I2S,
HAVE_SPI_TI_MODE, HAVE_SPI_ARB_DATA_SIZE, HAVE_SPI_FIFOS,
HAVE_SPI_NSSP, HAVE_SPI_I2S_ASTRT, and make decisions on
which registers and bitfields to define based on them.
* Define registers and bitfields for STM32_HAVE_IP_SPI_V4,
currently used only for STM32G47XX family MCUs, including
SPI_CR1_CRCL, SPI_CR2_NSSP, SPI_CR2_FRXTH, SPI_CR2_LDMARX,
SPI_CR2_LDMATX, SPI_CR2_DS_SHIFT/SPI_CR2_DS_MASK,
SPI_SR_FRLVL_SHIFT/SPI_SR_FRLVL_MASK, and
SPI_I2SCFGR_ASTRTEN.
* SPI_I2SCFGR_I2SSTD_PHILLIPS: Was defined incorrectly as
(xx << SPI_I2SCFGR_I2SSTD_SHIFT). Corrected this to
(0 << SPI_I2SCFGR_I2SSTD_SHIFT).
* SPI_I2SCFGR_I2SSTD_MSB: Was defined incorrectly as
(0 << SPI_I2SCFGR_I2SSTD_SHIFT). Corrected this to
(1 << SPI_I2SCFGR_I2SSTD_SHIFT).
* Fix nxstyle errors.
arch/arm/include/stm32/chip.h:
* Add new section "Peripheral IP versions" and specify version of
SPI IP block for STM32F10XX, STM32F20XX, STM32F30XX, STM32F33XX,
STM32F37XX, STM32F4XXX, STM32G47XX, and STM32L15XX.
Summary:
- This PR fixes style violations for lc823450.
- NOTE: I will fix more style violations in separate PR later.
Impact:
- No impacts.
Testing:
- I checked build test only.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
- Add new functions of GNSS
- Support the lower PWM frequency
- Add CONFIG_CPUFREQ_RELEASE_LOCK
- Add high speed ADC support
- Add HPADC input gain configuration
- Add eMMC device
- Frame buffer support
- Fix SD/GNSS/sensor drivers not worked
- Build errors
- Fix nxstyle issues
The QuickFeather board added as an initial target.
These featrues are minimally implemented:
* Clock Configuration -- All clocking registers are defined and
configuration is used to setup the HSO, M4 Core, and M4 Perif
clocks. Additionally some clock debugging is stubbed for
bringing out clock paths to IO pins.
* UART -- The lowputc as well as the serial driver is implemnted
for the single UART device. Currently the configuration is
hard coded, but uses the proper interfaces to later fill in.
* SysTick -- The system tick timer is implemented and clocking
properly. Tickless mode is not yet implemented.
* Interrupts -- The interrupt system is implemented and verified
using the UART and SysTick systems.
* GPIO -- GPIO and IOMUX systems are defined and implemented.
This is verified using the UART as well as the Arch LED
system. The GPIO interupt system is stubbed out but not
implemented.
* Arch LEDS -- The blue LED as part of the RGB LED is configured
and attached to the Arch LED system. This indicates the device
coming online as well as when a hardfault is triggered.
Applications and Testing:
* There is a nsh configuration implemented that includes debug
features as well as the ostest, getprime, and mem test.
All of these have been run and verified.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:
* Add architectural support to existing NuttX files. This
makes the STM32G474 family parts accessible to the system.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.
This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.
arch/arm/include/stm32/stm32g47xxx_irq.h:
arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h:
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h:
arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h:
arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h:
arch/arm/src/stm32/hardware/stm32g47xxx_uart.h:
arch/arm/src/stm32/stm32g47xxx_rcc.c:
* New files required for architectural support. Note that
existing NuttX files are not modified. As such, in this
revision, the system is unaffected by their addition.
With big thanks for detailed code review:
David Sidrane (davids5)
Mateusz Szafoni (raiden00)
Abdelatif Guettouche (Ouss4)
Move the logic to get TLS information from an inline function to a normal function. For the unaligned case, it is probably too large to be inlined.
Also fixes some minor things from review of previous commits.
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check). It was really my intention to merge PR878, but I screwed that up and merged 879 instead.
This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
arch/arm/include/kinetis/kinetis_pmc.h:
* Fix several typos in comments.
* Rewrap some comment lines.
* Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
parenthesis for safety.
* Fix nxstyle complaint regarding long line.
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.
arch/arm/src/stm32h7/Kconfig:
* Add explicit support for all microcontrollers in the
STM32H7x3xx family by adding support for:
- STM32H743AG
- STM32H743AI
- STM32H743BG
- STM32H743BI
- STM32H743IG
- STM32H743II
- STM32H743VG
- STM32H743VI
- STM32H743XG
- STM32H743XI
- STM32H743ZG
- STM32H753AI
- STM32H753BI
- STM32H753VI
- STM32H753XI
- STM32H753ZI
* Fix TODO items for IO_CONFIG (all STM32H7X3XX).
* Because 100-pin parts lack GPIO ports F and G, but have
port H, create the new hidden configs STM32H7_HAVE_GPIOF
and STM32H7_HAVE_GPIOG.
* STM32H7_STM32H7X3XX:
- Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
when not STM32H7_IO_CONFIG_V (100-pin part).
- STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
IO configs except V (100-pin part), which doesn't expose
SPI5 due to pin count.
* STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
STM32H7_HAVE_GPIOG because we aren't adding more part
numbers in this family.
* Remove extraneous (duplicate) "bool" and "default n"
lines.
* config STM32H7_FMC: Fix indent (contents were indented
with spaces while rest of file uses tabs).
arch/arm/include/stm32h7/chip.h:
* Extend preprocessor logic to add support for the new
MCU part numbers.
* Expand table of differences between family members.
* Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.
* If IO config is not known, issue compile-time #error
with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
Suggested by davids5.
arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:
* When checking STM32H7_NGPIO > 5 or 6, check also
CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.
arch/arm/src/stm32h7/stm32_gpio.c:
* stm32_configgpio(): When applicable, make sure we're not
trying to configure one of the missing ports.
* Fix nxstyle complains (wrong end of line comment position
and several long lines). No functional changes.
* g_gpiobase[]: Init base address for ports F and G according to
CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.
* stm32_configgpio(): Replace complicated check with g_gpiobase[]
null check. Suggested by davids5.
* stm32_gpiowrite() and stm32_gpioread(): Add previously missing
null check of g_gpiobase[].
arch/arm/src/stm32h7/stm32_gpio.h:
* Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
compiler will prevent use of ports that do not exist on the
target MCU.
* Fix nxstyle complaints.
Documentation/NuttX.html:
* Remove copy-and-pasted anchor for stm32f76xx77xx.
* Correct link to README.txt for Nucleo-H743ZI board,
formerly on BitBucket, now on GitHub.
* Add list item for STMicro STM32H747I-DISCO board.
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
This reverts commit f735584514.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG. The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
* S32K add support for Nxp drone boards
* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c and .h files and fix it
Author: Juha Niskanen <juha.niskanen@haltian.com>
Fix typos and some incorrect comments
Author: Alan Carvalho de Assis <acassis@gmail.com>
Verify all .c and .h against nxstyle, fixed the Mixed cases
Author: Alin Jerpelea <alin.jerpelea@sony.com>
cxd56xx improvements (#48)
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
* arch: cxd56xx: Add size limitation for I2C SCU xfer
This is a fw restriction, unroll loop because it can be transfer
up to 16 bytes.
* arch: cxd56xx: Fix lack of leave_critical_section
add the missing leave_critical_section
* arch: cxd56xx: Remove unnecessary file
this header is duplicate and we can remove it
* arch: cxd56xx: Cosmetic change
remove space after function
* arch: cxd56xx: update topreg registers
the topreg registers are updated to match the cxd5602 HW
* arch: cxd56xx: Add voltage setting for low battery notification
Add voltage setting for low battery notification
* arch: cxd56xx: Improve perfomance of SD card
Improve a problem that the clock of SD Host Controller is lower than the
expected value in SDR25 transfer mode.
* arch: cxd56xx: Cosmetic changes
cleanup to comply with coding standard
* boards: cxd56xx: Cosmetic changes
updates to comply with coding standard
* boards: cxd56xx: Fix SD card cannot mount issue
SD card cannot mount when connecting and disconnecting three times
or more due to wrong state of parameter 'initialized'.
This change enables to skip swtching initialized state when mount
failed.
This commit fixes a compilation error that occurs when enabling the
following configuration items for stm32f7 and stm32h7 architectures:
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_IRQ=y
CONFIG_DEBUG_IRQ_ERROR=y
CONFIG_DEBUG_IRQ_WARN=y
CONFIG_DEBUG_IRQ_INFO=y
The compiler error for stm32f7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:497:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_FIRST'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_FIRST
chip/stm32_irq.c:497:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
And the compiler error for stm32h7:
make[1]: Entering directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
CC: chip/stm32_irq.c
chip/stm32_irq.c: In function 'stm32_dumpnvic':
chip/stm32_irq.c:164:4: warning: #warning Missing logic [-Wcpp]
# warning Missing logic
^~~~~~~
chip/stm32_irq.c: In function 'up_irqinitialize':
chip/stm32_irq.c:522:29: error: 'STM32_IRQ_NIRQS' undeclared (first use in this function); did you mean 'STM32_IRQ_CRS'?
stm32_dumpnvic("initial", STM32_IRQ_NIRQS);
^~~~~~~~~~~~~~~
STM32_IRQ_CRS
chip/stm32_irq.c:522:29: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [Makefile:172: stm32_irq.o] Error 1
make[1]: Leaving directory '/home/pdupreez/dev/wingunder/nuttx/arch/arm/src'
This commit replaces all STM32_IRQ_NIRQS defines with the NR_IRQS
define, which seems to be consistent with the rest of the code in
Nuttx.
Run all .c and .h files in last PR through nxstyle.
Author: macman88 <jjlange91@gmail.com>
SAME5x Ethernet Support (#25)
boards/arm/samd5e5/same54-xplained-pro/: Adds basic support for Microchip SAM E54 Xplained Pro board.
arch/arm/src/samd5e5/: Adds an Ethernet driver for the SAME5x family (based on the SAMA5 GMAC driver).
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run all .h and .c files modified in last PR through nxstyle.
Author: Minamiya_Natsuki <yukihiratype2@gmail.com>
Add FMC SDRAM for STM32H7x3 chip (#22)
* Add FMC SDRAM for STM32H7x3 chip
* Add FMC SDRAM for STM32H7x7
* Nuttx Coding Standard requires one declaration per line
* should be __ARCH_ARM_SRC_STM32H7_STM32_FMC_H
* fix bad alignment
* fix typo
* fix typo
* people can't live in furture
* fix comment line length
* fix more comment line length
* fix aligenment
* fix typo
STM32L4_NUSART was set to 4. The spec at
https://www.st.com/resource/en/datasheet/stm32l433cc.pdf states the
following on page 1:
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Stop 2 wake-up)
However it on page 49, it states:
The STM32L433xx devices have three embedded universal synchronous
receiver transmitters (USART1, USART2 and USART3).
The latter is correct.
This patch sets STM32L4_NUSART to 3.
boards/arm/stm32h7/stm32h747i-disco: Remove references to nucleo in the stm32h747i-disco board.
arch/arm/include/stm32h7, arch/arm/src/stm32h7, and boards/arm/stm32h7/stm32h747i-disco: Add support for the STM32H747I-DISCO board.
boards: cxd56xx: spresense: cleanup and new defconfig
* arch: cxd56xx: remove NVIC_SYSH redefinition
The NVIC_SYSH is already defined in nvicpri.h
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: spresense: configs: enable SPRESENSE_EXTENSION
Enable high current mode for the Spresense Extension board on all examples
that have SDCARD support
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: spresense: ifdef SDCARD_TXS02612
The SD Card TXS02612 port expander is hosted on the Extension board and
should not be enabled if the extension board is not prezent.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: spresense: configs: increase MQ_MAXMSGSIZE
This change is needed by the display driver on spresense platform
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: spresense: config: add lcd examples defconfig
This is a configuration for the basic nx examples
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
boards: cxd56xx: spresense: add board_timerhook function
* boards: cxd56xx: spresense: add board_timerhook function
in preparation for SDK we muts have a weak board_timerhook function
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* drivers: usbhost: add missing endif
By accident an endif was missing.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: audio: add build barrier
The audio implementation should not be beuilt if the config
CONFIG_CXD56_AUDIO is not set.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch:arm:cxd56xx: add ge2d.h header
The header is used by imageproc.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
boards: arm: cxd56xx: audio: add power_control and audio_tone_generator
* boards: arm: cxd56xx: audio: add power_control
Add a simeple way to control the audio power for userspace apps
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: audio: add audio_tone_generator
Add a simple way to control the audio buzzer with defined frequency
for userspace apps
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/include/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
arch/arm/src/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
boards: cxd56xx: add SCU sensors (2/2)
* boards: cxd56xx: add cxd56_bh1721fvc initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bh1745nuc initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bm1383glv initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bm1422gmv initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bmi160 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_bmp280 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_kx022 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_lt1pa01 initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_rpr0521rs initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: add cxd56_sensors initialization
We are adding the sensor initialization for cxd56xx boards in the
common board folder.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56: add Backup Log driver
The driver will be used to backup logs on crash.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: add crashlog driver
Add Crashlog driver with support for reset on crash
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move gs2200m initialization
Move the board gs2200m initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move ili9340 initialization
Move the board ili9340 initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: move lpm013m091a initialization
Move the board lpm013m091a initalization to the common board folder
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: common: typo fixes
HEADER: Updates on file location
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/s32k1xx: Update peripheral input clocking for the way that things are done for the S32K1XX. Fix other misc. compilation/configuration issues.
arch/arm/src/s32k1xx: Clean up LPSPI and LPI2C naming for S32K1XX. Using S32K1XX clock functions to get peripheral input clock.
arch/arm/src/s32k1xx: Clone i.MXRT LPSPI and LPI2C support. i.MXRT uses the same IP as S32K1XX.
arch/arm/src/s32k1xx/s32k1xx_clockconfig.c: Finishes the implementation of the core clock configuration logic.
arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h: Add SMC register definition header file.
arch/arm/src/s32k1xx: Bring in GPIO logic from Kinetis. Looks like the same IP.
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts". That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)
Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC. Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
Rationale: TM4C1294NC is ambiguous:
TM4C1294NCPDT is a 128-TQFP
TM4C1294NCZAD is a 212-NFBGA
The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.
Rename:
CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
TM4C1294NC to TM4C1294NCPDT
Rationale: In terms of firmware programming, there is no functional difference between these parts:
TM4C123GH6PMI7
TM4C123GH6PMI7R
TM4C123GH6PMT7
TM4C123GH6PMT7R
From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)
arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/Kconfig:
configs/Kconfig:
Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
Add support for LPC40xx family chips
* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit. These configurations are still something of a work in progress. In particular, the LCD functionality is untested.
* First pass rename in *.c and *.h files.
* Renamed LPC17XX to LPC17XX_40XX in config files
* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files
* Replaced LPC17xx with LPC17xx/LPC40xx in .h files
* Updated some documentation
* Working on moving directories
* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx
* Renamed LPC17_* constants / configuration options to LPC17_40_*
* Updated chip family name defines
* Renamed some chip-specific files
* Updated references to renamed files
* Updated references to lpc17_ to lpc17_40_
* Renamed source files from lpc17_* to lpc17_40_*
* Clean up white space
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: SCU, ADC, I2C
* nuttx: configs: spresense: LEDS: fix warnings
In the initial code several errors were missed because I pushed
the dirty code.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Sensor Control Unit (SCU)
Add Sensor Control Unit (SCU) on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add I2C support
add I2C support on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add ADC interface support
Add ADC interface support on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Use DMAC for reading sensing data
Use DMAC for reading sensing data from SCU on cxd56xx chip
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: code style sanitization
NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable I2CDEV
add enable I2CDEV for spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: add notification LEDs
Add usefull diagnostic LEDs on the speresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: PM and PWM
* configs: spresense: add SPI configuration
add SPI configuration for spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add support for PWM
add support for PWM for cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable PWM support
enable PWM support on spresense board
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Power Management PROCFS support
the powermanager procfs support will export
/proc/pm:
clock
power
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable powermanager procfs support
The powermanager procfs is disabled by default and need to be enabled
by the CONFIG_CXD56_PM_PROCFS option
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add timer driver
Add timer driver for cxd56xx.
NOTE
The timer allows a divider of 1, 16 and 256 options
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add Watch Dog Timer
Add Watch Dog Timer on cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable timer
the platform support has been added and now we can use the timers
on spresense board.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* configs: spresense: enable WatchDog timer
The platform support has been added and now we can use the WatchDog
Timer on spresense board.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch: arm: cxd56xx: add support for USB and SDIO
* arch: arm: cxd56xx: add support for USB connectivity
Add basic support for USB connectivity
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: add SDHCI support
We add SDHCI driver for the cxd56xx
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm: Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.
Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.
Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
Port AES and RND to STM32 M0 + some improvements
arch/arm/src/stm32f0l0/stm32_rng.c: change the function names to use the stm32_rng prefix
arch/arm/src/stm32f0l0/stm32_usbdev.c: move HSI48 enable to stm32xx_rcc.c
arch/arm/src/stm32f0l0: add support for AES
arch/arm/src/stm32f0l0: add support for RND
arch/arm/src/stm32f0l0: add HSI48 support for L0
Approved-by: Gregory Nutt <gnutt@nuttx.org>
libs/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
syscall/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
wireless/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
Documentation/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
include/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
drivers/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
sched/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
configs: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/xtensa: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/z80: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/x86: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/renesas and arch/risc-v: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/or1k: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/misoc: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/mips: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/avr: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/arm: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
Support for STM32L071X and a few improvements for STM32F0L0
arch/arm/src/stm32f0l0: add peripherals configuration for STM32L0
arch/arm/src/stm32f0l0: a few fixes for USART
arch/arm/include/stm32f0l0/stm32f0_irq.h: use names as in other STM32
arch/arm/include/stm32f0l0/chip.h: use names as in other STM32
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Add three patches about STM32 intherupts and network loopback files
* Add the missing macro STM32_IRQ_NIRQS used by ./arch/arm/src/stm32f7/stm32_irq.c
Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>
* The struct in_addr doesn't have the member sin_addr.
Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>
* The function lib_lo_ipv6match() is for IPv6.
Correct the function it calls from lib_lo_ipv4matchto() to lib_lo_ipv6match().
Also add CONFIG_NET_IPv6 for configuration.
Signed-off-by: Kejun ZHOU <zhoukejun@outlook.com>
Improvements for H7 towards the DMA support
arch/arm/include/stm32h7/stm32h7x3xx_irq.h: fix typos and rename DMA1/2 irq names to match those from other STM32
arch/arm/src/stm32h7/chip/stm32_bdma.h: add auxiliary definitions
arch/arm/src/stm32h7/chip/stm32_dma.h: cosmetic changes
arch/arm/src/stm32h7/chip/stm32_dmamux.h: add auxliary definitions and fix some typos
arch/arm/src/stm32h7/chip/stm32_mdma.h: add auxliary definitions and fix some typos
arch/arm/src/stm32h7/chip/stm32h7x3xx_dmamux.h: add DMAMAP definitions for MDMA, DMA1, DMA2 and BDMA
arch/arm/src/stm32h7/chip/stm32h7x3xx_memorymap.h: fix AHB1 base adresses and add some address blocks
arch/arm/src/stm32h7/chip/stm32h7x3xx_rcc.h: fix some definitions to match other STM32 ports
arch/arm/src/stm32h7/stm32_allocateheap.c: use SRAM from D2 domain (SRAM123) for now
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c: enable clock for MDMA and BDMA
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
arch/arm/src/stm32f0l0: Some fixes for a clean build. Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine. Sometimes kconfig errors are difficult to spot. I would appreciate it anyone can spot the issue.
arch/arm/src/stm32f0l0/hardware: Rename the chip directory to hardware. This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.
configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery: Update for all of the naming changes made in arch/arm/src/stm32f0l0
arch/arm/include/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
arch/arm/src/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
arch/arm/src/tiva: Add CC13xx logic to enable power domains needed by peripherals and to enable clocking to peripherals.
arch/arm/src/tiva: Rename some header files so that they are unique in order to avoid including the wrong file. Fix various compile issues found during some initial trial builds.
arch/arm/src/tiva: Add CC13xx clock enable and power enable macros that are backward compatible with lm/tm4c macros.
