Fix build break on thumb2 mode:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S: Assembler messages:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S:146: Error: thumb conditional instruction should be in IT block -- `movle pc,lr'
Reference:
https://developer.arm.com/documentation/100067/0612/armclang-Command-line-Options/-mimplicit-it
In A32 code, the integrated assembler accepts all conditional instructions
without giving an error or warning. In T32 code, the integrated assembler
outputs an implicit IT block when there is a conditional instruction
without an enclosing IT block. The integrated assembler does not give an
error or warning about this.
Signed-off-by: chao an <anchao@xiaomi.com>
The option '-mthumb' is only valid for C source files and it is not passed to the assembler.
If 'thumb' is not considered in some assembly projects, the system will generate
'undefined instructions' when running incompatible instruction:
arm_undefinedinsn: Undefined instruction at 0x380cfc98
This assembly file should be compiled with .thumb but it doesn't:
380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>:
380cfc90: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
380cfc94: ed2d8b10 vpush {d8-d15}
380cfc98: e59d4064 ldr r4, [sp, #100] ; 0x64 <-- Undefined instruction
380cfc9c: e59d5068 ldr r5, [sp, #104] ; 0x68
380cfca0: e59d606c ldr r6, [sp, #108] ; 0x6c
380cfca4: e59d7070 ldr r7, [sp, #112] ; 0x70
380cfca8: e1a08120 lsr r8, r0, #2
380cfcac: e1a091a1 lsr r9, r1, #3
380cfcb0: e1a0a122 lsr sl, r2, #2
After enable thumb:
.syntax unified
.thumb
or
-Wa,-mthumb
.Lhobot_i8_i32_gemm_nn_m4_n8_neon:
38001100: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
38001104: ed2d 8b10 vpush {d8-d15}
38001108: 9c19 ldr r4, [sp, #100] ; 0x64
3800110a: 9d1a ldr r5, [sp, #104] ; 0x68
3800110c: 9e1b ldr r6, [sp, #108] ; 0x6c
3800110e: 9f1c ldr r7, [sp, #112] ; 0x70
38001110: ea4f 0890 mov.w r8, r0, lsr #2
38001114: ea4f 09d1 mov.w r9, r1, lsr #3
38001118: ea4f 0a92 mov.w sl, r2, lsr #2
This commit will enable the thumb option of the assembly file by default,
so that when compiling the assembly file, the machine code and the system will be in a consistent state.
----------------------------------------------------------------
https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html
GCC Manual:
-mthumb
Generate code for the Thumb instruction set. The default is to use the 32-bit ARM
instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit
Thumb-2 instructions based on the -mcpu=name and -march=name options.
** This option is not passed to the assembler. **
** If you want to force assembler files to be interpreted as Thumb code,
either add a `.thumb' directive to the source or pass the -mthumb option
directly to the assembler by prefixing it with -Wa. **
Signed-off-by: chao an <anchao@xiaomi.com>
arch/arm/src/sama5/Kconfig:819:error: recursive dependency detected!
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:819: choice <choice> contains symbol SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824: symbol SAMA5_FLEXCOM0_USART is part of choice SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824: symbol SAMA5_FLEXCOM0_USART is part of choice <choice>
Signed-off-by: chao an <anchao@xiaomi.com>
SAMA5Dx ADC and TSD fixes
Ensures ADC and TSD work together. TSD now works on SAMA5D2 and should be OK, still, for other SAMA5D familiy members
Fix CI error
checkpatch error
Update arch/arm/src/sama5/sam_tsd.h
Squash commits to arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Squash commits to arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update sam_tsd.c
Fixes after feedback from PR and additional testing
Update sam_tc.c
checkpatch.sh error was missed when fixing someone else's error...
feedback corrections missed
Co-Authored-By: Xiang Xiao <xiaoxiang781216@gmail.com>
Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>
squashed everything after 248072e02C
/arch/arm/src/libarch.a(stm32_flash.o): in function `up_progmem_write':
/arch/arm/src/chip/stm32_flash.c:419: undefined reference to `stm32_waste'
Seems like the symbol definition + declaration were completely missing
Use correct path to include mutex.h
Fixes:
chip/stm32_bbsram.c:42:10: fatal error: mutex.h: No such file or directory
42 | #include <mutex.h>
| ^~~~~~~~~
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
chip/stm32_adc.c:2529:32: warning: shifting a negative signed value is undefined [-Wshift-negative-value]
setbits = ADC_CCR_DUAL_IND | ADC_CCR_DELAY(0) | ADC_CCR_MDMA_DISABLED |
^~~~~~~~~~~~~~~~
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables
In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
common/arm_backtrace_sp.c: In function 'up_backtrace':
common/arm_backtrace_sp.c:253:15: warning: assignment to 'long unsigned int' from 'uint8_t *' {aka 'unsigned char *'} makes integer from pointer without a cast [-Wint-conversion]
253 | top = g_intstacktop;
|
to fix the following clang warning:
Error: chip/eoss3_irq.c:138:47: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
_err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
~~~~ ^~~~~~~~~~~~~~~~~~~~~~
%08lx
/github/workspace/sources/nuttx/include/debug.h:126:57: note: expanded from macro '_err'
__arch_syslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
~~~~~~ ^~~~~~~~~~~
/github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:134:24: note: expanded from macro 'getreg32'
^~~~~~~~~~~~~~~~~~~~~~~~~~~
Error: chip/eoss3_irq.c:146:49: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
_err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
~~~~ ^~~~~~~~~~~~~~~~~~~~~~
%08lx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
1.Don't check the return value of nxsem_init or nxmutex_init
2.Fix some style issue
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Not all boards have an interrupt line from the phy to
the Soc. This commit allows the phy to be polled for
link status.
This may not work on all MAC/PHY combination that
have mutually exclusive link management and operating
modes. The STM32H7 and LAN8742AI do not have such a
limitation.
Fix typos
1. add 'ARM' prefix to choice menu
2. rename 'Generic Clang toolchain' to 'LLVM Clang toolchain'
to avoid confuse with CONFIG_ARM_TOOLCHAIN_ARMCLANG
Signed-off-by: chao an <anchao@xiaomi.com>
armv6-m/arm_exception.S:139:2: error: invalid instruction, any one of the following would fix this:
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:2: note: instruction requires: thumb2
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:10: note: invalid operand for instruction
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:2: note: no flag-preserving variant of this instruction available
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:10: note: operand must be a register in range [r0, r7]
sub r1, #(4 * (10))
^
-----------------------------------------
bringup.c:125:18: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
return ret;
^~~
bringup.c:73:10: note: initialize the variable 'ret' to silence this warning
int ret;
^
= 0
Signed-off-by: chao an <anchao@xiaomi.com>
chip/flash.c: In function '_spif_read_status_reg_x':
chip/flash.c:46:9: warning: this 'while' clause does not guard... [-Wmisleading-indentation]
46 | while ((AP_SPIF->fcmd &0x02)==0x02); \
| ^~~~~
chip/flash.c:128:3: note: in expansion of macro 'SPIF_STATUS_WAIT_IDLE'
128 | SPIF_STATUS_WAIT_IDLE(SPIF_WAIT_IDLE_CYC);
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: chao an <anchao@xiaomi.com>
If you specify a file path on SPI-Flash in CONFIG_CXD56_GNSS_CEP_FILENAME,
it causes a deadlock issue in the inter-CPU communication. To resolve it,
introduce a new CONFIG_CXD56_GNSS_CEP_ON_SPIFLASH and then use pre-read
buffers during checking CEP file. So this needs the large of free memory.
Remove hardware zero length packet enhancement because of driver
logic already processed the ZLP correctly. It is unnecessary and cause
of IN interrupt lost.
On armv8-m the MPU region limits are inclusive. Thus, we must substract
one byte of size from (base + limit).
Signed-off-by: Michael Jung <michael.jung@secore.ly>
When a function is known to preserve eight-byte alignment of the stack, armclang assigns the build
attribute Tag_ABI_align_preserved to that function. However, the armclang integrated assembler does
not automatically assign this attribute to assembly code.
Signed-off-by: xiangdong6 <xiangdong6@xiaomi.com>
common/arm_backtrace_fp.c: In function 'up_backtrace':
common/arm_backtrace_fp.c:126:23: warning: assignment to 'void *' from 'uintptr_t' {aka 'unsigned int'} makes pointer from integer without a cast [-Wint-conversion]
126 | istacklimit = arm_intstack_top();
| ^
Signed-off-by: chao an <anchao@xiaomi.com>
1. rename arm_backtrace_thumb.c to arm_backtrace_sp.c
2. use EHABI stack unwinder instead of instruction unwind
Signed-off-by: chao an <anchao@xiaomi.com>
In SMP mode, if all cores start at same time, all from __start(),
then only primary need do initialize, so others core should wait
primary, use 'sev' let the non-primary continue to __cpuN_start().
Signed-off-by: ligd <liguiding1@xiaomi.com>
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash
Signed-off-by: ligd <liguiding1@xiaomi.com>
The IDMA needs to have 32 bit word alignment, in fact it will
AND off the lower 2 bits of the value stored in IDMABASE0R.
This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
and also FAT_DMAMEMORY being aligned.
This commit extends the unaligned logic (used for dcache) to take into account
the need for a buffer copy when the buffer is ot 32 bit word.
It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
Fix build break:
Error: L6218E: Undefined symbol _sbss (referred from arm_head.o).
Error: L6218E: Undefined symbol _ebss (referred from arm_head.o).
Error: L6218E: Undefined symbol _eronly (referred from arm_head.o).
Error: L6218E: Undefined symbol _sdata (referred from arm_head.o).
Error: L6218E: Undefined symbol _edata (referred from arm_head.o).
Signed-off-by: chao an <anchao@xiaomi.com>
Summary:
- I noticed that lc823450-xgevk does not boot due to the recent
changes on g_current_regs
- This PR fixes this issue
Impact:
- None
Testing:
- Tested with lc823450-xgevk:rndis
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
1. some arm instructions are not compatible with arch tlsr:
{standard input}: Assembler messages:
{standard input}:53: Error: bad instruction `svc #0'
2. remove unsupport compile option
cc1: error: unrecognized command line option "-mlittle-endian"
Signed-off-by: chao an <anchao@xiaomi.com>
Reference:
https://developer.arm.com/documentation/dui0474/m/image-structure-and-generation/section-placement-with-the-linker/section-placement-with-the-first-and-last-attributes
CAUTION:
FIRST and LAST must not violate the basic attribute sorting order. For example, FIRST RW is placed after any read-only code or read-only data.
arm-none-eabi-readelf -aS arm_vectors.o
1. Without const:
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 3] .vectors PROGBITS 00000000 000034 00011c 00 WA 0 0 4
2. const symbol:
[ 3] .vectors PROGBITS 00000000 000034 00011c 00 A 0 0 4
Regression by:
| commit 229b57d6cb
|
| arch/armv[6|7|8]-m: Move _vectors to arm_internal.h to avoid the duplication
|
| and change the type of _vectors from uint32_t to const void *
|
| Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: chao an <anchao@xiaomi.com>
In file included from ./armv7-r/arm_l2cc_pl310.c:41:
./armv7-r/l2cc_pl310.h:38:10: fatal error: chip/chip.h: No such file or directory
38 | #include "chip/chip.h"
| ^~~~~~~~~~~~~
Signed-off-by: chao an <anchao@xiaomi.com>
Config option IMXRT_ADCx_ETC can now be used to select an external HW
trigger to be used instead of continous trigger. Continous trigger is
used if IMXRT_ADCx_ETC = -1 (default option). Otherwise the source signal
is routed through XBAR and used as a trigger.
Hardware triggering is currently limited to maximum of 8 channels.
HW trigger is automatically disabled if there are more than 8 channels.
The external triggering was tested with PWM signal as a source.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
1.
make[1]: *** No rule to make target 'tms570_spi.c', needed by '.depend'. Stop.
2.
In file included from armv7-r/arm_gicv2.c:36:
armv7-r/gic.h: In function 'arm_gic_nlines':
armv7-r/mpcore.h:63:29: error: 'CHIP_MPCORE_VBASE' undeclared (first use in this function)
63 | #define MPCORE_ICD_VBASE (CHIP_MPCORE_VBASE+MPCORE_ICD_OFFSET)
| ^~~~~~~~~~~~~~~~~
Signed-off-by: chao an <anchao@xiaomi.com>
since armv7-r does not support kernel mode
./armv7-r/arm_syscall.c:36:10: fatal error: addrenv.h: No such file or directory
36 | #include "addrenv.h"
| ^~~~~~~~~~~
Signed-off-by: chao an <anchao@xiaomi.com>
Summary:
- Currently, CONFIG_ARCH_PGPOOL_MAPPING=y is necessary for
CONFIG_BUILD_KERNEL=y.
- This commit removes the code for CONFIG_ARCH_PGPOOL_MAPPING=n
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This commit supplements commit 7d877fbb. External sync mode is now
disabled if XBAR connection fails and config options are used directly
in sync_src variable and passed to XBAR macro only when needed. The first
option could caused an undefined behaviour when sync_src was equal to -1
(external sync not used)
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Otherwise, after the rx error occur, the tx output will be
out of sequence, for example:
normal log:
[ 30.163000] 12345678abcdefgh
[ 30.666000] 12345678abcdefgh
[ 31.169000] 12345678abcdefgh
[ 31.672000] 12345678abcdefgh
[ 32.175000] 12345678abcdefgh
[ 32.678000] 12345678abcdefgh
[ 33.181000] 12345678abcdefgh
error log:
he 7 .20]0003 127456c8abgdefch
gde [6.707002] 16345b78afcde
fcde
fghe10010] 5234a678ebcd
77 713 00]41238567dabchefgd
che 7 .21]0003 127456c8abgdefch
gde [8.709002] 16345b78afcde
fcde
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Since tlsr arch support A/B bank, the hardware support
relative addr to load or store, but for flash read,
must use absolute addr. also combine with flash_<*>_method.
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
Fix Compile error from Armclang compiler(AC6):
Error: L6218E: Undefined symbol arm_vectoraddrexcption (referred from arm_vectoraddrexcptn.o).
Signed-off-by: chao an <anchao@xiaomi.com>
Situation:
Assume we have 2 cpus, and busy run task0.
CPU0 CPU1
task0 -> task1 task2 -> task0
1. remove task0 form runninglist
2. take task1 as new tcb
3. add task0 to blocklist
4. clear spinlock
4.1 remove task2 form runninglist
4.2 take task0 as new tcb
4.3 add task2 to blocklist
4.4 use svc ISR swith to task0
4.5 crash
5. use svc ISR swith to task1
Fix:
Move clear spinlock to the end of svc ISR
Signed-off-by: ligd <liguiding1@xiaomi.com>
Add support for MCUBoot.
Two new configurations are added:
- mcuboot-loader: mcuboot-loader app used as a bootloader.
main_mcuboot_loader as entrypoint
- mcuboot-app: used as mcuboot agent app. Needs to be
signed manually through "imgtool sign --pad --align 4 -v 0 -s
auto -H 0x200 --pad-header -S 0xc0000 nuttx.hex nuttx_sign.bin"
Signed-off-by: Andres Sanchez <tito97_sp@hotmail.com>
This commit allows the PWM modules to be synchronized by an external
signal (other PWM module for example). The sync source can be selected
from configuration.
PWM module can also now generate a trigger when its timer reaches the duty
cycle. This trigger is used for the synchronization of other modules. It
can also be used for triggering ADC for example in the future.
Thanks to Rastislav Pavlanin and Jan Spurek from NXP support for
suggestion which helped to solve the inter-module PWM synchronization
task.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Modify the file according to the checks
update the board config files, and modify the gd32f4xx_progmem.c
Add chip GD32F450 of GD32MCU
delete the micro FAR, modify code style
Add chip GD32F450 of GD32MCU
This commit enhances imxrt encoder driver with index capture support.
The index is captured when the index interrupt occurs and can be passed
to application layer with QEIOC_GETINDEX ioctl call.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
#0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
#1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
#2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
#3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
#4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
#5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
#6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
#7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
#8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
#9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
#10 0x598a601a in vsyslog syslog/lib_syslog.c:68
#11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
#12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
#13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
#14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
#15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
#16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
#17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
#18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
#19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Summary:
- I noticed that the kernel heap area overlaps the PGPOOL
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
without UBSan
```
text data bss dec hex filename
85612 208 142258 228078 37aee nuttx
```
with UBSan:
```
text data bss dec hex filename
194290 98164 208634 501088 7a560 nuttx
```
```c
int main(int argc, FAR char *argv[])
{
uint32_t ptr[32];
printf("Hello, World!! %lu\n", ptr[64]);
return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This patch fixes missing comma, found by cppcheck.
rp2040_i2c_slave.c:259:0: error: failed to expand 'modbits_reg32',
Wrong number of parameters for macro 'modbits_reg32'.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
This patch fixes unbuffered mode so it actually works.
Also, patch contains fixes for possible bugs that could result in
deadlock or system hang in certain situations.
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c
commit 522a949ed5
Author: David Sidrane <David.Sidrane@NscDg.com>
Date: Wed Jul 13 11:00:11 2022 -0700
imxrt:enet Better interrupt state handeling
- NOTE: I also fixed typo and compile error in the above commit
Impact:
- imx_enet.c
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c
commit 81f03a9151
Author: David Sidrane <David.Sidrane@NscDg.com>
Date: Tue Mar 15 14:27:51 2022 -0700
imxrt:ETH Add Support for ETH2
Impact:
- imx_enet.c
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This change adds support for the following features:
- injected channels (default: 0)
- ADC resolution (default: 12bit)
- ADC low-level operations
- ADC external triggers
- custom ADC interrupts
- ADC sample time configuration
- configurable ADC SCAN mode (default on if DMA)
- configurable ADC DMA mode (default: one shot mode)
- reset the ADC block only if all ADC instances are closed
