Gregory Nutt
|
511d7bb38a
|
Adds support for localtime. From Max Neklyudov
|
2014-08-12 06:18:22 -06:00 |
|
Gregory Nutt
|
1474a56014
|
Fix a computation error in the fix for the last computational error
|
2014-08-11 12:07:49 -06:00 |
|
Gregory Nutt
|
304b3b547c
|
Correct time conversion, 1000000 not 1000 to convert seconds to microseconds.
|
2014-08-11 11:14:10 -06:00 |
|
Gregory Nutt
|
6e7cb4be58
|
Comment out reassessment of timer in the middle of context switches. Need to revisit
|
2014-08-11 07:05:47 -06:00 |
|
Gregory Nutt
|
bb1213ab89
|
SAMA5 Tickless: Corrects some logic errors with timer/counter frequency
|
2014-08-10 19:04:18 -06:00 |
|
Gregory Nutt
|
bffc875d2e
|
Cosmetic
|
2014-08-10 16:09:45 -06:00 |
|
Gregory Nutt
|
a2ee73235d
|
Cosmetic changed, updated README files, improved comments
|
2014-08-10 13:11:31 -06:00 |
|
Gregory Nutt
|
77d49f50e0
|
Don't try to return time remaining if the timespec pointer is NULL
|
2014-08-10 11:39:16 -06:00 |
|
Gregory Nutt
|
9a4e1f6fdd
|
Move TC debug options to one file
|
2014-08-10 11:38:44 -06:00 |
|
Gregory Nutt
|
33965a21e3
|
Update comments
|
2014-08-10 11:38:08 -06:00 |
|
Gregory Nutt
|
42b1bcdf33
|
SAMA5: Fix bugs in timer/counter interrupts and one-shot timer
|
2014-08-10 10:47:38 -06:00 |
|
Gregory Nutt
|
9cb0b680ac
|
SAMA5 Timer/counter repair: Missing sem_post() caused a hang
|
2014-08-09 18:34:52 -06:00 |
|
Gregory Nutt
|
c61ec08ee8
|
SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5
|
2014-08-09 17:14:51 -06:00 |
|
Gregory Nutt
|
19ee65ac3e
|
SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic.
|
2014-08-09 16:43:48 -06:00 |
|
Gregory Nutt
|
f9601b6801
|
SAMA5 oneshot: Some clean-up and correction to the initial implementation
|
2014-08-09 16:42:04 -06:00 |
|
Gregory Nutt
|
e4981b09d9
|
SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
|
2014-08-09 15:27:55 -06:00 |
|
Gregory Nutt
|
c7662e3f92
|
SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
|
2014-08-09 10:30:45 -06:00 |
|
Gregory Nutt
|
6455f60c60
|
Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
|
2014-08-08 18:39:28 -06:00 |
|
Gregory Nutt
|
4dc151097e
|
Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
|
2014-08-08 17:53:55 -06:00 |
|
Gregory Nutt
|
c98ece6bec
|
Move task control files from sched/ to sched/task
|
2014-08-08 16:44:08 -06:00 |
|
Gregory Nutt
|
1c99d53bb1
|
Move clock functions from sched/ to sched/clock
|
2014-08-08 14:43:02 -06:00 |
|
Gregory Nutt
|
192f82f380
|
Move interrupt dispatch logic from sched/ to sched/irq
|
2014-08-08 14:31:15 -06:00 |
|
Gregory Nutt
|
39183d37b8
|
Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
|
2014-08-07 18:00:38 -06:00 |
|
Gregory Nutt
|
594083d870
|
Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
|
2014-08-06 16:26:01 -06:00 |
|
Gregory Nutt
|
d4a29fcf7e
|
SAMA5D3 HSMCI: TX DMA is again disabled
|
2014-08-05 07:07:39 -06:00 |
|
Gregory Nutt
|
553a16fac5
|
SAMA5 PCK: Add Main clock as an option for the PCK clock source
|
2014-08-03 10:17:50 -06:00 |
|
Gregory Nutt
|
1fc8f2b06d
|
SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
|
2014-08-02 14:26:49 -06:00 |
|
Gregory Nutt
|
715cf207ea
|
SAMA5 WM8904: Fix errors in programmable clock output configuration
|
2014-08-01 15:18:58 -06:00 |
|
Gregory Nutt
|
5e92347d60
|
SAMA5 SSC: Start Delay is now configurable
|
2014-08-01 14:10:37 -06:00 |
|
Gregory Nutt
|
d68a6059e0
|
SAMA5 SSC: Frame Synch Delay is now configurable
|
2014-08-01 12:25:31 -06:00 |
|
Gregory Nutt
|
c2c2921901
|
SAMA5D SSC: Needs to account for data offset in audio buffer.
|
2014-07-31 19:14:24 -06:00 |
|
Gregory Nutt
|
513329fd24
|
SAMA5D3X-EK: Add support for the WM8904 audio CODEC
|
2014-07-31 11:14:57 -06:00 |
|
Gregory Nutt
|
ffcc0b8da3
|
SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
|
2014-07-31 11:09:56 -06:00 |
|
Gregory Nutt
|
c0c4cda763
|
SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
|
2014-07-30 11:20:06 -06:00 |
|
Gregory Nutt
|
611ea42dbf
|
SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29).
|
2014-07-30 10:19:41 -06:00 |
|
Gregory Nutt
|
059812c872
|
SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode
|
2014-07-29 21:13:28 -06:00 |
|
Gregory Nutt
|
e053158f95
|
SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
|
2014-07-29 07:12:36 -06:00 |
|
Gregory Nutt
|
29ea8ab0e4
|
Cosmetic changes to comments
|
2014-07-29 07:11:16 -06:00 |
|
Gregory Nutt
|
42a975af74
|
Fixes to last SAMA5 PMIC checkin
|
2014-07-28 17:09:37 -06:00 |
|
Gregory Nutt
|
99927e918d
|
LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit.
|
2014-07-28 07:23:49 -06:00 |
|
Gregory Nutt
|
dd4be66f1c
|
ARM: Move L2 cache initialization to much later in the sequence
|
2014-07-27 10:03:33 -06:00 |
|
Gregory Nutt
|
b57d2182ab
|
ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly
|
2014-07-26 18:48:54 -06:00 |
|
Gregory Nutt
|
6f5280d284
|
ARMv7 L2 Cache: Minor bugfixes/improvements
|
2014-07-26 18:48:26 -06:00 |
|
Gregory Nutt
|
ee59870325
|
Enables cache early in boot-up sequence
|
2014-07-26 18:48:00 -06:00 |
|
Gregory Nutt
|
4e146d2ec2
|
Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
|
2014-07-26 18:47:33 -06:00 |
|
Gregory Nutt
|
873788bf5a
|
New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled
|
2014-07-26 18:46:52 -06:00 |
|
Gregory Nutt
|
2eb526253b
|
Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.
|
2014-07-26 16:54:19 -06:00 |
|
Gregory Nutt
|
6d9ca195ee
|
arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
|
2014-07-26 16:50:08 -06:00 |
|
Gregory Nutt
|
fcbf89c6f6
|
ARMv7-A: L2CC PL310 address filtering is an optional feature
|
2014-07-25 19:46:09 -06:00 |
|
Gregory Nutt
|
a007fa3f5e
|
ARMv7-A: Add missing L2CC PL310 bit definitions
|
2014-07-25 19:41:35 -06:00 |
|