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25 Commits

Author SHA1 Message Date
Dong Heng
698f1f76ff risc-v/esp32c3: Refactor SPI Flash to support umask interrupt when R/W/E SPI Flash 
This can fix BLE assert when erase SPI Flash.
 2021-12-06 13:13:11 +09:00
Abdelatif Guettouche
a01cb867ce esp32c3_rom.ld: Add some of the string.h functions to the linker 
script.

These functions are strongly declared and thus will be used instead of
any other implementation.  Furthermore, necessary Kconfig options are
selected to avoid building those function from NuttX's C library.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-11-13 11:54:42 -03:00
ChenWen
440787c0c1 risc-v/esp32c3: Fix Wi-Fi & BLE coexist issue 
1. Wi-Fi and BLE use common PHY functions.
  2. Fix Wi-Fi & BLE coexist adapter error.
  3. Update esp-wireless-drivers-3rdparty, provide coexist protection for connection.
 2021-11-04 11:02:05 -03:00
Gustavo Henrique Nihei
47e804b167 risc-v/esp32c3: Make BLE adapter code compliant to nxstyle 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-05 08:45:40 -03:00
Abdelatif Guettouche
ee20d0f545 esp32c3_rom.ld: Add a strong declaration to some libgcc function that 
are ROM resident.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-01 10:09:04 -03:00
Gustavo Henrique Nihei
3c63cb522c risc-v/esp32c3: Enable booting from MCUboot bootloader 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-09-27 18:22:29 -07:00
Alan C. Assis
099e9fb4f7 boards: Remove -nostartfiles -nodefaultlibs from LDFLAGS 2021-09-13 08:58:25 +08:00
Abdelatif Guettouche
11ed8575cd boards/rsic-v/esp32c3: Use the common gnu-elf.ld file from binfmt/libelf 
instead of keeping the same file for each board.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-24 08:04:14 -05:00
Abdelatif Guettouche
eb403bc996 boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid 
confusions.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-24 07:00:51 -05:00
Abdelatif Guettouche
60da4317b9 arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for 
consistency.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
f54804bafc arch/risc-v/esp32c3: Create a separate heap for the RTC memory. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
bd0e03fecf boards/risc-v/esp32c3-devkit/esp32c3.ld: Add the RTC BSS section for 
completeness.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC 
section.

The RTC region is accessed by both I and D buses.  The old name of
`rtc_iram_seg` is a bit confusing.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
dd4962b2f8 boards/esp32c3-devkit: Add the necessary flags for loadable modules and 
a module defconfig to test the "module" example.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
3b7ae20843 boards/risc-v/esp32c3-devkit: Add an ELF defconfig and the necessary ELF 
flags and linker script to support that.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-06-04 18:08:36 -03:00
Dong Heng
76df958e34 riscv/esp32c3: Support SPI Flash encryption read/write 2021-05-23 08:37:25 -03:00
chenwen
16667930cb risc-v/esp32c3: Support ESP32-C3 PM standby and sleep 2021-05-12 10:15:06 -03:00
Dong Heng
fcd5648bca riscv/esp32c3: Fix SPI Flash driver internal chip data address error 
"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
 2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
ba23526e39 boards/esp32c3-devkit: Allocate .noinit in a dedicated section 
Previously it was being allocated into .bss section after the _ebss
address. Although functional, this is not intuitive.
 2021-04-28 15:40:49 +01:00
Dong Heng
31854ca135 riscv/esp32c3: Fix heap end address 2021-04-12 01:36:11 -05:00
Alin Jerpelea
3d96d5f2ce arch: esp32: Mixed Case identifier fix 
Fix Mixed Case Identifier reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-01 12:13:12 -05:00
Alan Carvalho de Assis
4f8ff0765f risc-v/esp32c3: Add SPIFlash support 
Co-Authored-By: Dong Heng <dongheng@espressif.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-26 09:19:25 +01:00
Dong Heng
458caf2732 riscv/esp32c3: Add ESP32-C3 WLAN netcard driver 2021-03-16 10:42:32 -03:00
Gustavo Henrique Nihei
7fe096c65e risc-v: Fix typos reported by codespell 2021-02-25 16:25:47 +00:00
Abdelatif Guettouche
5562f08369 boards: Add the ESP32-C3 DevKit board 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-18 01:21:53 -08:00