Commit Graph

206 Commits

Author SHA1 Message Date
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
YAMAMOTO Takashi
1ffa009c8b Revert "Don't generate .depend anymore"
This reverts commit 79af7fbf4e.

Because:

* btashton reported some issues in local builds:

  https://github.com/apache/incubator-nuttx/pull/603#issuecomment-602264860

* this might be related to the current CI breakage:

  > /bin/sh: 1: /__w/incubator-nuttx/incubator-nuttx/nuttx/tools/mkdeps: not found
2020-03-22 23:07:29 -05:00
Xiang Xiao
79af7fbf4e
Don't generate .depend anymore 2020-03-22 18:15:29 +00:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
liuhaitao
923c05f17f arch/x86_64: fix two typo errors to pass build
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-03-04 00:42:32 -06:00
Sonic Yang
b984752aec Flat address x86_64 port of Nuttx (#411)
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer

* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2

* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly

* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling

* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure

* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method

* arch: x86_64: Fix C alias of page table and GDT/IST

* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup

* arch: x86_64: Consolidate MSR definition in arch/arch.h

* arch: x86_64: Edit the way of handling GDT/IST in C into structures

* arch: x86_64: Correct the starting point of isr/irq stack

* arch: x86_64: Update up_initialize.c with the new initializing procedure

* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT

* arch: x86_64: Overhual of interrupt initialization procedure

* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]

* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure

* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug

* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot

* arch: x86_64: Correctly apply license header, comment and format code

* arch: x86_64: properly send a SIGFPE on floating point error

* arch: x86_64: Remove unused variable in up_restore_auxstate

* arch: x86_64: properly trash the processor with an infinite loop

* arch: x86_64: Fix typo in ISR handler causing ISR not handled

* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path

* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE

* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method

* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support

* arch: x86_64: update defconfigs

* arch: x86_64: rename qemu as qemu-intel64

* arch: x86_64: update Board readme
2020-03-03 19:02:59 -06:00