Commit Graph

16090 Commits

Author SHA1 Message Date
Matias N
3176f2c3f0 nrf52_clockconfig: support HFCLK via XTAL and LFCLK 2020-08-31 08:01:37 +02:00
Brennan Ashton
58e43adf08 nxstyle: Fix existing long line to match code style
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-08-30 19:16:30 -03:00
Brennan Ashton
4cb193d530 Docs: Update links to old website and wiki
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-08-30 19:16:30 -03:00
Xiang Xiao
3ddb3dc00e arch/sim: Should use HOSTCFLAGS for the HOSTSRCS dependence generation
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-30 20:48:07 +01:00
Matias N
ae6ae113eb style fixes 2020-08-29 09:03:49 +02:00
Matias N
4ad36ffbbf nrf52_radio/gpiote: convert license header to Apache (Mateusz and Greg are authors) 2020-08-29 09:03:49 +02:00
Matias N
13695ca1e1 nrf52_rtc.c: fix checkint function 2020-08-29 09:03:49 +02:00
Matias N
31057ec81b nrf52_gpiote.h: fix incorrect naming of definition 2020-08-29 09:03:49 +02:00
Matias N
84cdde1a86 nrf52_radio.h: condition various definitions depending on specific chip 2020-08-29 09:03:49 +02:00
Matias N
4084b3396b nrf52_clock.h: fix duplicate definition 2020-08-29 09:03:49 +02:00
Nathan Hartman
cb27b77d6c stm32 - Fix two wrong comments in memory map
Comments only. No functional changes. See STM32G474 Reference Manual
(RM0440 Rev 4), section 3.4.1, Table 11, "Option byte organization."

arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:

    * STM32_OPTION_BASE: The comment incorrectly said the range was
      0x1fff7800-0x1fff780f for a total of 16 Option Bytes. Corrected
      this to 0x1fff7800-0x1fff782f, as the device has 48 Option Bytes
      for this option block.

    * STM32_OPTION_BASE2: The comment incorrectly said the range was
      0x1ffff800-0x1ffff80f for a total of 16 Option Bytes. Corrected
      this to 0x1ffff800-0x1ffff82f, as the device has 48 Option Bytes
      for this option block.
2020-08-28 14:45:06 -07:00
Brennan Ashton
8934f2ed79 SIM: Add support Linux HCI Socket as BLE adaptor
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-08-28 01:01:29 -07:00
leomarradke
8a2c480a48 arch: samd5e5:
- Add MTD progmem support.
- NVM USER PAGE IOCTLs support.

boards: metro-m4  Add support for:

- SmartFS inicialization.
- AT24 EEPROM.
- GPIO dev support.
- BQ27426 gauge inicialization.

drives: power
- Add BQ27426 fuel gauge support.

Testing:
- Build check only.

Signed-off-by: Leomar Mateus Radke  <leomar@falker.com.br>
2020-08-27 11:46:50 -03:00
Alan C. Assis
946601da2f ESP32: Keep the 'waiti 0' instruction - noticed by Masayuki Ishikawa 2020-08-27 14:33:05 +01:00
Ouss4
8d32930d29 arch&boards/xtensa: Fix some typos, references to STM/ARM code and
change file headers where Gregory Nutt is the only author.
2020-08-27 05:48:55 -07:00
rajeshwaribhat
fe4a1eb96a I2C(RIIC) support for RX65N
Addressed review comments in rx65n_definitions.h and rx65n_bringup.c
2020-08-27 09:39:23 -03:00
Ouss4
37d8799d07 arch/xtensa/src/esp32/esp32_spi.c: spi_cmddata function will be defined
by board logic, don't need it here.
2020-08-27 14:12:34 +08:00
Ouss4
99d3317329 arch/xtensa/src/esp32/esp32_irq.c: Include esp32_gpio.h to avoid
implicit declaration warning.
2020-08-27 14:12:34 +08:00
Alan C. Assis
bedc8c9aeb Remove "kludge" code that come from PIC32 2020-08-27 14:10:21 +08:00
Masayuki Ishikawa
c770dc9134 arch: cxd56xx: Use spinlock API in cxd56_rtc.c
Summary:
- This commit improves cxd56_rtc performance in SMP mode.

Impact:
- This commit affects SMP mode only.

Testing:
- Tested with spresense:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-08-26 11:21:50 +02:00
Martina Rivizzigno
dcdd7264c8 fix style 2020-08-26 02:13:38 -07:00
Martina Rivizzigno
648ebc9ea9 stm32f7 can: fix support for RTR 2020-08-26 02:13:38 -07:00
Matias N
46dd4d8d91 nrf52_ppi: pass event and task register addresses as uin32_t directly 2020-08-25 07:22:24 +02:00
Matias N
de40f628bc nrf52_ppi: minor naming fixes in comments/include guards 2020-08-25 07:22:24 +02:00
Matias N
b198690c06 nrf52_ppi: fix file path in license header 2020-08-25 07:22:24 +02:00
Matias N
2168e60df6 nrf52_ppi.c: fix incorrect implementation of group channel enable 2020-08-25 07:22:24 +02:00
Matias N
c51e383e08 nrf52: add PPI peripheral support 2020-08-25 07:22:24 +02:00
Matias N
0b6cca920b nrf52_rtc: unify irq and evt enums 2020-08-25 07:17:23 +02:00
Matias N
f5f07da7e7 nxstyle fixes 2020-08-25 07:17:23 +02:00
Matias N
fa6bb5411d nrf52 RTC: add event handling support 2020-08-25 07:17:23 +02:00
Xiang Xiao
1e21c97744 arch/sim: Remove the redundant Kconfig variable dependence check
because Kconfig system already guarantee the invariance

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-24 21:18:31 +09:00
Masayuki Ishikawa
52286f6dec arch: cxd56xx: Introduce CONFIG_CXD56_SPI_DMATHRESHOLD
Summary:
- This commit improves SPI performance.
- For small data, it does not use DMA.

Impact:
- All use cases which use SPI with DMA

Testing:
- Tested with spresense:wifi and spresense:example_lcd

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-08-24 12:37:38 +02:00
Alan C. Assis
7a1342f503 Fix coding style and other small issues 2020-08-23 08:26:10 -06:00
Alan C. Assis
4ded03a673 ESP32: Add support to RNG HW Driver 2020-08-23 08:26:10 -06:00
Johannes Schock
9bf9bb2db6 Changed comments. Proposed structure. 2020-08-23 08:23:54 -06:00
Johannes Schock
01715e4566 arm_xxxxstack.c: small style fixes, changed calculation of stack start for checkstack. 2020-08-23 08:23:54 -06:00
Johannes Schock
87614e2efd arm_createstack.c: Save tcb->adj_stack_size without tls overhead. 2020-08-23 08:23:54 -06:00
Xiang Xiao
ae356001cf Change all files come from Xiaomi/Pinecone to Apache License 2.0
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-22 17:37:21 -06:00
Gregory Nutt
df23fb3713 Fix PIC32MX/MZ typos
The pic32mx_usbpullup() and pic32mz_usbpullup() callbacks were referred to with various incorrect names in comments:  pic32mx_pullup(), pic32mz_pullup(), stm32_pullup().
2020-08-22 18:44:58 +01:00
Xiang Xiao
8617cd94b2 Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-21 18:09:19 +08:00
Xiang Xiao
8ce0ff5ce4 arch/sim: Make up_internal.h includable in host environment
to avoid the declaration repetition

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-21 18:09:19 +08:00
Masayuki Ishikawa
3543950766 arch: cxd56xx: Use spinlock API in cxd56_serial.c
Summary:
- This commit improves cxd56_serial performance in SMP mode.

Impact:
- This commit affects SMP mode only.

Testing:
- Tested with spresense:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-08-21 12:06:46 +02:00
Dong Heng
39539be149 xtensa/esp32: Improve SPI transmission
Master:
  1. add DMA RX/TX support
  2. add software chip selection
  3. add user defined chip selection
  4. add IOMUX check and IO map

Slave:
  1. add DMA RX/TX support
  2. add IOMUX check and IO map
  3. use full 256 bit SPI TX/RX cache in non-DMA mode
2020-08-21 10:04:27 +01:00
Masayuki Ishikawa
0d971d4673 arch: cxd56xx: Fix IRQ control in cxd56_dmac.c
Summary:
- This commit fixes IRQ control for the following use case
- The gs2200m Wi-Fi driver requests SPI-DMA to receive a packet.
- cxd56_dma.c enables IRQ for the SPI-DMA and start transfer.
- Then LCD driver requests SPI-DMA to display an image.
- These SPI-DMAs use different DMA channels but share the DMA controller.
- Also, they share the same IRQ.
- When the first SPI-DMA finishes the transfer, it disables the IRQ.
- And if the second SPI-DMA finishes the transfer just after the IRQ disabled.
- The second SPI-DMA will be in a deadlock condition.
- To resolve this issue, do not control IRQ during DMA transfer.
- Instead, up_enable_irq() is called in up_dma_initialize()

Impact:
- All use cases which use DMA

Testing:
- Tested with spresense:wifi with LCD

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-08-21 10:38:47 +02:00
Alan C. Assis
69f914adcd Another nxstyle issue fixed 2020-08-20 15:15:07 -06:00
Alan C. Assis
4e3070c542 Fix some right alignment 2020-08-20 15:15:07 -06:00
Alan C. Assis
34c144ad13 Fix many coding styles issues 2020-08-20 15:15:07 -06:00
Alan C. Assis
7d88f1e9cf Fix the introduced long line 2020-08-20 15:15:07 -06:00
Alan C. Assis
5b719daf69 Fix issues reported in the pull request and update defconfig 2020-08-20 15:15:07 -06:00
chenwen
1e9ef469dc xtensa/esp32: Add functions to switch CPU frequency from 80MHz to 240Mhz 2020-08-20 15:15:07 -06:00