Commit Graph

15813 Commits

Author SHA1 Message Date
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Ouss4
1e3ec6ecd0 arch/: Implement Thread Local Storage for the rest of the architectures.
The change consisted on modifying *_usestack.c and *_createstack.c
2020-05-06 21:56:40 -06:00
Xiang Xiao
3e00d182d2 Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Yang Chung-Fan
6b1f94ee49 arch: x86_64: real-mode bootstrap code should jump to 1M 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
ffa2027226 arch: x86_64: Add option to disable interrupt controller initialization 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
c63c8a3841 arch: x86_64: Add real-mode bootstrap stub 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
9ab6b92ad7 arch: x86_64: move the disable multiboot2 marco around to retain labels 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
235d905001 arch: x86_64: remove leftover debug output 2020-05-06 23:33:46 +08:00
Masayuki Ishikawa
4ca19e7e74 arch: k210: Set CPU clock based on PLL0 settings 2020-05-05 17:21:32 -07:00
Gregory Nutt
bda24f09c2 libs/libc/tls/tls_getinfo.c: Add tls_get_info()
Move the logic to get TLS information from an inline function to a normal function.  For the unaligned case, it is probably too large to be inlined.

Also fixes some minor things from review of previous commits.
2020-05-05 18:56:33 +01:00
Abdelatif Guettouche
b7e7fba732 TLS_UNALIGNED (#2)
* Implement the TLS_UNALIGNED
2020-05-05 18:56:33 +01:00
Pierre-Olivier Vauboin
8d763d37ab arch/arm/src/stm32h7/stm32_oneshot: fix style issues 2020-05-05 11:53:58 -06:00
Pierre-Olivier Vauboin
d96565a765 arch/arm/src/stm32h7: add support for oneshot timer
The code is ported from arch/arm/src/stm32
2020-05-05 11:53:58 -06:00
Brennan Ashton
093aa040eb x86_64: Fix /dev/random rdrand implementation
rdrand was checking the wrong return value for the intrinsics
so it would block forever.  The read function was also not returning
the actual number of bytes read.

This was tested by running the rand example application
NuttShell (NSH) NuttX-9.0.0
nsh>rand
Reading 8 random numbers
Random values (0x101584f70):
0000: 019a172df7d539f2df8550362e2d3f74 9b467c51ebe30b9f6510e540e34fabcc ...-..9...P6.-?t .F|Q....e..@.O..

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-05 18:54:47 +08:00
Yang Chung-Fan
521e6354b6 arch: x86_64: fix style of intel64_lowsetup.c 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
8b86fae8d3 arch: x86_64: Check only XSAVE and rename __eanble_sse3 to __enable_sse_avx 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
2936f72651 arch: x86_64: revoke lower 128MB mapping later, ldmxcsr require 32-bit address 2020-05-05 02:03:34 -07:00
Brennan Ashton
aea90e7cf0 Clean code to match nxstyle requirements
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
2405901bf2 Use mempy to perform type punning for setting gdt entry
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
4c24d91b4a Surpress unused rtcb variable
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
19afc57eef Fix null pointer reference in x86_64 rng
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
a9871f584a Resolve linking issues with x86_64 port
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Masayuki Ishikawa
11bbe3997e arch: x86: Add hlt instruction to save power in qemu_idle.c 2020-05-04 07:13:30 -06:00
raiden00pl
f03ed73f91 arch/arm/src/stm32/stm32_adc.c: remove obsolete warnings 2020-05-03 15:57:49 -03:00
raiden00pl
534ba2cc18 arch/arm/src/stm32/stm32_adc: add setup and shutdown operations to the low-level interface 2020-05-03 15:57:49 -03:00
raiden00pl
b3a1aef773 arch/arm/src/stm32/stm32_adc.c: cosmetics 2020-05-03 15:57:49 -03:00
raiden00pl
5857c48b2e arch/arm/src/stm32/stm32_adc.c: setup/shutdown ADC instance only once 2020-05-03 15:57:49 -03:00
raiden00pl
e2a3266857 arch/arm/src/stm32/stm32_adc: add interface to configure EXTSEL/JEXTSEL from low-level ops 2020-05-03 15:57:49 -03:00
Gregory Nutt
1bab5b6813 arch/arm/: Rename up_intstack_* to arm_intstack_*
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.

This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 14:48:40 -03:00
Gregory Nutt
da4c597b5f Run all .c and .h files modified by this PR through nxstyle. 2020-05-03 16:42:19 +01:00
Gregory Nutt
01d32a2b22 arch/arm/stm32, stm32f7, stm32l4: Rename up_waste to stm32_waste
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.

This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 16:42:19 +01:00
Gregory Nutt
cbc931b590 arch/arm: Rename up_savestate and up_restorestate
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses function-like macro naming that was missing in previous PRs:  up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f103-minimum:nsh
2020-05-02 18:35:30 -03:00
Alan Carvalho de Assis
54d0256b9a Remove the not existent CONFIG_XXX_CMNVECTOR 2020-05-02 09:55:35 -06:00
Gregory Nutt
bb29541e3c Remove garbage file accidentally added 2020-05-01 21:05:22 -03:00
Xiang Xiao
f2aba8d9b7 build: Remove 'u' prefix from userspace library
so user needn't link the different library because the build type change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 15:56:55 -06:00
Gregory Nutt
673640b313 Run all .c and .h modified by this PR through nxstyle
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
2020-05-01 16:55:33 -03:00
Gregory Nutt
b0dbdd7c10 arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 16:55:33 -03:00
Xiang Xiao
2476aad5b4 sim: Fix librt can't find on macOS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 13:09:44 -06:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 18:28:13 +01:00
Gregory Nutt
542b684f73 arch/arm: Rename all up_*.S files to arm_*.S
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.S files.

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 11:29:11 -03:00
Xiang Xiao
f8a809eb5b Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
YAMAMOTO Takashi
8b054dba98 sim: Update hostfs after the recent struct stat timespec changes
Fix it after the following change:

    commit bb4458b63f
    Author: Ouss4 <abdelatif.guettouche@gmail.com>
    Date:   Thu Apr 30 19:05:12 2020 +0100

        include/sys/stat.h: Per the POSIX standard, the atime, ctime and mtime field
    s
        have changed their type from time_t to struct timespec.
2020-05-01 17:42:46 +08:00
Ouss4
21302fcdae arch/risc-v/src: Rename files starting by up_ to risc_ to conform to the
naming standard.
2020-04-30 20:48:32 -06:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00
Gregory Nutt
ee05672434 Run all .c and .h files modified by this PR through nxstyle. 2020-05-01 02:11:01 +01:00
Gregory Nutt
c6c712b2fc arch/arm: Rename all up_*.c files to arm_*.c 2020-05-01 02:11:01 +01:00
Gregory Nutt
a86884c615 Run all .c and .h files modifed in this PR through nxstyle. 2020-04-30 22:09:51 +01:00
Gregory Nutt
84ccee4d34 Rename up_switchcontext to arm_switchcontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
6398a64e26 Rename up_saveusercontext to arm_saveusercontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
3a82a20c90 Rename up_copyarmstate to arm_copyarmstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
3d2cd1493f Rename up_copyfullstate to arm_copyfullstate 2020-04-30 22:09:51 +01:00
Xiang Xiao
b1e661e7db sama5/sam_tsd: Fix error: 'ret' may be used uninitialized
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-30 11:43:29 -06:00
Gregory Nutt
a7558cf9b9 Run all .c and .h modified by the PR through nxstyle. 2020-04-30 18:38:32 +01:00
Gregory Nutt
e2a65ceb5f Rename up_fullcontextrestore to arm_fullcontextrestore 2020-04-30 18:38:32 +01:00
Gregory Nutt
317a8a8942 arch/z16: Build update
Verfy build.  Update to latest 2.2.2 toolchain.
2020-04-30 16:58:06 +01:00
liuhaitao
55ff12ad66 arch/arm/src/common/up_exit.c: _exit should call arm_fullcontextrestore for armv8-m
Since armv8-m now uses arm_fullcontextrestore instead of up_fullcontextrestore, _exit
should call arm_fullcontextrestore for armv8-m accordingly.

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 08:47:10 -06:00
liuhaitao
bab61180db sim: Add host mmap and perror support
Change-Id: I20bb8cba7ed6ab3e06c91f275fa2be6a633efe9e
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 20:20:32 +08:00
Gregory Nutt
1aa9ff8af2 Run .c and .h files in this PR through nxstyle and fix complaints 2020-04-29 22:30:54 -03:00
Gregory Nutt
f23a756349 arch/z16: Correct file naming for coding standard
Rename all up_* files to conform to the name conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

Rename all internal functions from up_* z16_
2020-04-29 22:30:54 -03:00
Xiang Xiao
5d12735f34 sama5d3x-ek/nxwm: Fix error: 'g_adcdev' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 14:04:14 -06:00
Yang Chung-Fan
bebc8875fb arch: x86_64: add no-relax to the linker flags 2020-04-29 09:29:03 -07:00
Xiang Xiao
1c483d8ed4 arm/up_allocpage: fix warning: "PG_POOL_MAXL1NDX" is not defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 10:26:29 -06:00
Xiang Xiao
d2a262672c tiva/cc13x0: fix error 'TIVA_GPIO_BASE' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 07:10:44 -06:00
Nathan Hartman
1b03a42bc0 arch/arm/src/stm32/Kconfig - Remove redundant ARCH_CHIP configs
* Remove redundant configs:
  - ARCH_CHIP_STM32F303RD, and
  - ARCH_CHIP_STM32F303RE.
2020-04-27 17:46:31 -06:00
Ouss4
e5443a4718 Remove a duplicate file introduced by the previous PR. 2020-04-26 22:12:42 -06:00
Ouss4
32597a763a arch/mips: Fix file naming. 2020-04-26 20:56:30 -06:00
zhongan
ef9735febd arch/sim: initialize 'rxbuf_size' and 'txbuf_size' instead of 'buf_size'.
Change-Id: I5442f022cafef6c0f636614ba739e11249713134
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
zhongan
4ec8fd521f arch/sim: change 'VIRTIO_RPMSG_F_BIND' to 'VIRTIO_RPMSG_F_ACK'
Change-Id: I4d6b6b700130e264199f490ab4e922f699955113
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
Gregory Nutt
dcd50db5d1 Run files in previous commit through nxstyle, fixing issues. 2020-04-26 22:14:25 +01:00
Gregory Nutt
a0fdda698c arch/z80: Fix z80 file naming
Modify file naming to conform on the Naming conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

This commit only address the file naming convention.  There is still nonconformant function naming.
2020-04-26 22:14:25 +01:00
raiden00pl
f837bfecdb arch/arm/src/stm32/stm32_adc.h: add prefix STM32 to low-level ops macros 2020-04-26 11:35:11 -06:00
raiden00pl
1b4e0fddb8 arch/arm/src/stm32/stm32_adc.h: move generalized ADC definitions to the header file 2020-04-26 11:35:11 -06:00
raiden00pl
0e09d162e2 arch/arm/src/stm32/stm32_adc.c: fix injected channels configuration for ADC IPv1 2020-04-26 11:35:11 -06:00
raiden00pl
a85ffd0fbd arch/arm/src/stm32/stm32_adc.c: enable callback logic if DMA enabled 2020-04-26 11:35:11 -06:00
raiden00pl
4cb8be9608 arch/arm/src/stm32/stm32_adc.c: move adc_offset_set to llops section 2020-04-26 11:35:11 -06:00
Gregory Nutt
010603329b More compliance to the naming standard.
1) Rename all up_*.S file to arm_*.S
2) Rename all functions used only by armv8_m logic from up_* to arm_*
2020-04-26 14:12:47 -03:00
Gregory Nutt
15f003d01c arch/arm/src/armv8-m: Rename files to correspond to naming conventions.
This files in the arch/arm/src/armv8-m directory were cloned from arch/arm/src/armv7-m.  Naming standards were created for the architecture files, function, and variable names:  https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

There however were never appliced to arch/arm/src/armv7-m and so this bad naming was inherited by arch/arm/src/armv8-m.  This commit corrects the file naming only and makes it compliant with the Naming FAQ.
2020-04-26 14:12:47 -03:00
Gregory Nutt
6766aa0ed5 Mea Culpa. Fix nxstyle problems from PR879
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
2020-04-26 11:56:15 -03:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Matias Nitsche
a0d4e61d54 STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
436979baed STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
ff85335b71 fix use of undefined CONFIG_STM32L4_LPTIM1_CH1POL 2020-04-24 12:38:47 -06:00
Matias Nitsche
3fcb441ef8 STM32L4 PWR/RCC: nxstyle 2020-04-24 12:34:17 -06:00
Matias Nitsche
a0d4370163 STM32L4 RCC/PWR: nxstyle fixes 2020-04-24 12:34:17 -06:00
Matias Nitsche
e9319fa9a0 stm32l4x6 RCC: allow choosing HSI, MSI or HSE as SYSCLK instead of PLL to reduce power 2020-04-24 12:34:17 -06:00
Matias Nitsche
34bf9b26e0 stm32l4x6 RCC: set CORE regulator range according to CPU clock 2020-04-24 12:34:17 -06:00
Matias Nitsche
891acc5fa3 stm32l4x6 RCC: fix MSI clock speed setting 2020-04-24 12:34:17 -06:00
Matias Nitsche
2a76451185 stm32l4 PWR: add VOS setting function 2020-04-24 12:34:17 -06:00
Matias Nitsche
977f3194de stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
f0033f783e stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
d5eaa68b50 stm32l4_lptim: nxstyle fixes 2020-04-24 14:47:07 -03:00
Matias Nitsche
38bd0364bf stm32l4_lptim: add various functions 2020-04-24 14:47:07 -03:00
anjana-tel
0a673d759d Corrected build error
Corrected build error in rx65n_sbram_open()
2020-04-23 18:33:09 +08:00
Gregory Nutt
e6af32c88f Run nxstyle against all files modified by PR 848 2020-04-22 21:36:41 +01:00
Gregory Nutt
2f7e003ef8 arch/arm/src/armv7-m: Use Apache 2.0 license
Change license header on all files under arch/arm/src for which I am the sole author and the only person claiming to hold a coyright on the file.
2020-04-22 21:36:41 +01:00
Nathan Hartman
02ab0cd149 stm32: Fix typos, wrong comments, and nxstyle.
arch/arm/include/stm32/chip.h:

    * Fix 2 typos.

    * Fix 1 wrong comment (No LCD -> LCD)

    * Fix nxstyle errors regarding comment positions, blank lines
      before/after comments, and C++ style comments.
2020-04-22 16:14:57 +01:00
rajeshwaribhat
31332904dd Added support to crashdump for rx65n on sbram 2020-04-22 07:32:37 -06:00