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9395 Commits

Author SHA1 Message Date
Gregory Nutt
088e9920a8 Cosmetic: Fix some long lines in comment blocks 2016-06-16 15:45:57 -06:00
Gregory Nutt
1b53214a82 STM32L4: Last change added rcc_resetbkp(), but the function was never called. 2016-06-16 15:26:48 -06:00
Gregory Nutt
5ecb8da118 Eliminate a warning 2016-06-16 15:26:19 -06:00
Gregory Nutt
6a7ac8cc8d Merged in jimparis/nuttx (pull request #61) 
Fix duplicate lines in stm32l4 Makefile
 2016-06-16 15:31:59 -06:00
Jim Paris
6b7959202f Remove duplicate lines in Makefile 
They're already there, a few lines up.
 2016-06-16 17:26:13 -04:00
Gregory Nutt
a63072d080 Fix yet more typos from the last commits 2016-06-16 15:06:13 -06:00
Gregory Nutt
801d661423 Change *err() to either info() or err(ERROR:..), depending upon if an error has occurred. 2016-06-16 15:10:57 -06:00
Gregory Nutt
ae13471244 One more time. Correct name of USB debug macros are uinfo and uerr, not usbinfo and usberr. 2016-06-16 13:36:37 -06:00
Alan Carvalho de Assis
dd7297fb64 STM32L4: Add logic reset backup domain early in initialization 2016-06-16 13:43:09 -06:00
Gregory Nutt
865150f666 STM32: Logic to reset backup domain only applies if the RTC is enabled. 2016-06-16 13:36:50 -06:00
Gregory Nutt
53ec3ca1a2 Fix a cut-and-paste error: uusbinfo->usbinfo 2016-06-16 13:18:59 -06:00
Gregory Nutt
e60ced1835 Update last change... STM32 does not have STM32_RTC_BKR register. 2016-06-16 12:51:21 -06:00
Gregory Nutt
bf0a3bf0c8 Fix error in recent LSE-related fix: Requires CONFIG_STM32_PWR, or will not build correctly 2016-06-16 12:43:35 -06:00
Gregory Nutt
6c1678d1d9 STM32 Ethernet: Fix a bad cut and paster error from recent changes 2016-06-16 12:35:57 -06:00
Gregory Nutt
b39e53391d Add underscore at beginning of alert() as well 2016-06-16 12:38:05 -06:00
Gregory Nutt
0c8c7fecf0 Add _ to the beginning of all debug macros to avoid name collisions 2016-06-16 12:33:32 -06:00
Gregory Nutt
fdaf3d7268 STM32: Move backup domain reset to stm32_rcc.c in order to avoid disabling LSE during RTC initialiation. 2016-06-16 09:52:15 -06:00
Gregory Nutt
f9652812e2 Change *err() to either info() or err(ERROR:..), depending upon if an error has occurred. 2016-06-16 09:38:16 -06:00
Gregory Nutt
8c76779bc0 Change *err() to either info() or err(ERROR:..), depending upon if an error has occurred. 2016-06-16 08:41:21 -06:00
Gregory Nutt
6f08216621 Centralize definitions associated with CONFIG_DEBUG_SYSCALL 2016-06-16 08:12:38 -06:00
Gregory Nutt
7a9f1814a2 Centralize definitions associated with CONFIG_DEBUG_SDIO/MEMCARD 2016-06-16 07:50:54 -06:00
Gregory Nutt
b7f0fbc073 Centralize definitions associated with CONFIG_DEBUG_RTC 2016-06-16 07:39:23 -06:00
Gregory Nutt
37b9742189 Centralize definitions associated with CONFIG_DEBUG_TIMER 2016-06-16 07:16:25 -06:00
Gregory Nutt
6b517ed017 Centralize definitions associated with CONFIG_DEBUG_WATCHDOG 2016-06-16 06:28:04 -06:00
Gregory Nutt
03cbe671ad Centralize definitions associated with CONFIG_DEBUG_PWM 2016-06-15 17:23:56 -06:00
Gregory Nutt
8ce929a915 Centralize definitions associated with CONFIG_DEBUG_I2S 2016-06-15 16:54:01 -06:00
Gregory Nutt
5c89b18af8 Centralize definitions associated with CONFIG_DEBUG_I2C 2016-06-15 16:30:12 -06:00
Gregory Nutt
63b1eb09e6 Centralize definitions associated with CONFIG_DEBUG_CAN 2016-06-15 15:45:27 -06:00
Gregory Nutt
6d9a0511ad Rename CONFIG_DEBUG_HEAP to CONFIG_HEAP_COLORATION 2016-06-15 14:48:06 -06:00
Gregory Nutt
13cd88649f qspierr/info should be spierr/info 2016-06-15 14:30:54 -06:00
Gregory Nutt
5b26219a81 Fix a couple of compile problems introduced in recent commits 2016-06-15 14:10:59 -06:00
Gregory Nutt
a42651de4f Changes from review of last PR. Mostly costmetic. 2016-06-15 12:43:06 -06:00
Gregory Nutt
ff7be7cead Merged in petekol/nuttxnsm (pull request #59) 
some stm32f7 files
 2016-06-15 12:01:30 -06:00
Gregory Nutt
f2cac0ceb7 Merged in K-man23/nuttx/stm32f411-fix (pull request #60) 
Add GPIO_I2C2_SDA_4 to STM32F411
 2016-06-15 11:58:40 -06:00
Gregory Nutt
ba03134bed Centralize definitions associated with CONFIG_DEBUG_SPI 2016-06-15 10:41:13 -06:00
Konstantin Berezenko
89b192d080 Add GPIO_I2C2_SDA_4 to STM32F411 2016-06-15 09:06:08 -07:00
Gregory Nutt
a97d3ae707 Centralize definitions associated with CONFIG_DEBUG_GPIO 2016-06-15 09:20:23 -06:00
Lok Tep
5a8f395a9b Merge remote-tracking branch 'parent/master' 
# Conflicts:
#	arch/arm/src/stm32f7/chip/stm32_spi.h
#	arch/arm/src/stm32f7/stm32_spi.c
#	arch/arm/src/stm32f7/stm32_spi.h
 2016-06-15 17:03:28 +02:00
Gregory Nutt
c4e6f50eac Centralize definitions associated with CONFIG_DEBUG_IRQ 2016-06-15 08:35:22 -06:00
Gregory Nutt
a308ea553b Remove some excessive, redundant debug info per request of antin Berezenko. See Issue #8. 2016-06-14 15:50:23 -06:00
Frank Benkert
573b1d415c * SAMV7: SPI: SPI-Freq. 40MHz; VARSELECT; hw-features 
This change adds the following improvements:
  - Increase the allowed SPI-Frequency from 20 to 40 MHz.
  - Correct and rename the "VARSELECT" option This option was included in the code as "CONFIG_SPI_VARSELECT" but nowhere  defined in a Kconfig file. The patch renames it to "CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation according the datasheet of Atmel. In short, this option switches the processor from "fixed peripheral selection" (single device) to "variable peripheral selection" (multiple devices on the bus).
  - Add a new Function to the interface to control the timing and delays of the chip according the ChipSelect lines. This function can control the delay between the assertion of the ChipSelect and the first bit, between the last bit and the de-assertion of the ChipSelect and between two ChipSelects. This is needed to tune the transfer according the specification of the connected devices.
  - Add three "hw-features" for the SAMV7, which controls the behavior of the ChipSelect:
    1. force CS inactive after transfer: this forces a (short) de-assertion of the CS after a transfer, even if more data is
      available in time
    2. force CS active after transfer: this forces the CS to stay active after a transfer, even if the chip runs out of data. Btw.: this is a prerequisit to make the LASTXFER bit working at all.
    - escape LASTXFER: this suppresses the LASTXFER bit at the end of the  next transfer. The "escape"-Flag is reset automatically.
 2016-06-14 13:12:16 -06:00
Shirshak Sengupta
078e9b7082 Bug Fix in tiva_serial.c - UART5, UART6 and UART7 were not being configured as TTYS0 for printing over serial console 2016-06-14 10:47:18 -06:00
David Sidrane
0bded28cf3 Fix some naming errors that were recently introduced with mass substirutions 2016-06-14 09:42:04 -06:00
Gregory Nutt
a98bc05f65 New debug macro: alert(). This is high priority, unconditional output and is used to simplify and stanardize crash error reporting. 2016-06-14 09:07:53 -06:00
David Sidrane
ccfcb12ef7 STM32F7: Add SPI driver. DMA not yet supported. 2016-06-14 07:11:55 -06:00
David Sidrane
189b0d004f Added Pinmap to F7 2016-06-14 07:02:41 -06:00
David Sidrane
6d88df6802 Remove duplicate settings from stm32/Kconfig 2016-06-14 07:00:06 -06:00
Gregory Nutt
93e7b5d7a0 Eliminate some warnings 2016-06-13 14:15:54 -06:00
Gregory Nutt
0f249016a0 Eliminate some warnings 2016-06-13 14:01:32 -06:00
Gregory Nutt
eac916c907 Fix some warnings 2016-06-13 11:48:20 -06:00
Gregory Nutt
40f0481478 configs/: Change some *err() message to *info() messages if what was a *dbg() message does not indicate and error condition. 2016-06-13 09:44:12 -06:00
Gregory Nutt
b9aadf7242 configs/: Change some *err() message to *info() messages if what was a *dbg() message does not indicate and error condition. 2016-06-13 08:45:54 -06:00
Gregory Nutt
26718cee5c Eliminate some warnings when CONFIG_DEBUG_FEATURES is enabled, but no output is enabled 2016-06-12 14:44:04 -06:00
Gregory Nutt
61969a5f88 Eliminate some warnings 2016-06-12 08:37:03 -06:00
Gregory Nutt
b1eb4fdd8e Rethink some recent warning removal logic 2016-06-12 07:17:04 -06:00
Gregory Nutt
cffef35644 Eliminate some warnings introduced with DEBUG changes 2016-06-11 18:09:39 -06:00
Gregory Nutt
be80a0b99c Eliminate some warnings 2016-06-11 16:40:53 -06:00
Gregory Nutt
a1469a3e95 Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err() 2016-06-11 15:50:49 -06:00
Gregory Nutt
e99301d7c2 Rename *lldbg to *llerr 2016-06-11 14:55:27 -06:00
Gregory Nutt
86b79b33cf Reserver the name 'err' for other purposes 2016-06-11 14:40:07 -06:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Gregory Nutt
fc3540cffe Replace all occurrences of vdbg with vinfo 2016-06-11 11:59:51 -06:00
Gregory Nutt
3a74a438d9 Rename CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_INFO 2016-06-11 11:50:18 -06:00
Gregory Nutt
e891a33c2e Completely trivial changes from review of last PR 2016-06-10 14:59:53 -06:00
Gregory Nutt
525557c098 Merged in kfazz/nuttx/kinetis_pwm (pull request #50) 
kinetis pwm support
 2016-06-10 14:54:19 -06:00
Konstantin Berezenko
b9e7b4ed70 Correct the can2 rx irq number for stm32f10xx chips 2016-06-10 10:52:58 -07:00
Gregory Nutt
275f8988f8 Fix a cloned error in debug macro definitions 2016-06-10 10:13:30 -06:00
Gregory Nutt
ae1281d244 SAM4E AFEC: Fix some columnar alignement 2016-06-10 10:00:36 -06:00
OrbitalFox
78a2465af4 SAM4E: Fix some errors in AFEC header file. 2016-06-10 09:56:35 -06:00
kfazz
0f40ef86b9 Added kl_dumpgpio functionality as kinetis_pindump, which was 
already prototyped in kinetis.h. It is enabled when CONFIG_DEBUG_GPIO
is defined.
 2016-06-10 11:35:20 -04:00
Lok Tep
6ea61306b6 Merge remote-tracking branch 'remotes/parent/master' 2016-06-10 09:10:07 +02:00
kfazz
6e9df2adf7 support up to 8 channels per timer. TODO: port kl_dumpgpio.c to kinetis 2016-06-09 23:34:24 -04:00
Gregory Nutt
e6ca12f4c3 Changes from review of last PR 2016-06-09 16:57:05 -06:00
Konstantin Berezenko
2ebdcb463e Fix compilation errors in debug mode of stm32_pwm.c 2016-06-09 15:48:08 -07:00
ziggurat29
5db2618c3c accomodate the additional endpoint descriptors (and allocate fifo space) that are present in the 'L4 2016-06-09 14:01:59 -05:00
kfazz
3cc843480b updated copyright year and fixed comment whitespace. 2016-06-09 13:16:11 -04:00
kfazz
9e36d42859 Kinetis pwm support, based on kl_ftm driver. 
Initial commit. Compile checked only.
 2016-06-09 13:07:03 -04:00
ziggurat29
b91ce6b6b8 set power ctl USV bit as early (and required) step in initializing USB device. also various comment fixups and minor syntax error in some conditional compile blocks. 2016-06-09 11:28:23 -05:00
ziggurat29
d2b78eddec need to be able to explicitly indicate Vddusb is valid in order to use the OTFS block in this chip; done via PWR CR2 bit USV. 2016-06-09 11:26:36 -05:00
Gregory Nutt
8c9bc6da79 Trivial changes from review of last PR 2016-06-09 09:39:41 -06:00
Gregory Nutt
2dbd6b3d99 Merged in kfazz/nuttx (pull request #45) 
Teensy clock fixes.
 2016-06-09 09:36:30 -06:00
Gregory Nutt
48c9aa08a3 Merged in marten_svanfeldt/nuttx-public/for_upstream/stm32_dma_fix (pull request #43) 
Fix STM32 DMA code and configuration for STM32F37X chips
 2016-06-09 09:10:13 -06:00
David Sidrane
44ead7f40a Fix email address in file headers 2016-06-09 08:26:14 -06:00
Lok Tep
f12f115598 rename back without f7 2016-06-09 15:48:07 +02:00
kfazz
0c13208d87 Teensy clock fixes. 
The High Gain bit in MCG_C1 was preventing teensy from booting
except after a programming session. The second change doesn't appear
to change any functionality, but complies with restrictions in the k20
family reference manual on FEI -> FBE clock transiions.
 2016-06-09 00:41:01 -04:00
Marten Svanfeldt
1b36526e91 Fix STM32 DMA code and configuration for STM32F37X chips 
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
 2016-06-09 05:02:43 +02:00
Gregory Nutt
982982d62b Eliminate some warnings 2016-06-08 09:43:54 -06:00
David Sidrane
4a4f407175 STM32F7: Fix a redefinition warning the DMA header file 2016-06-08 08:29:30 -06:00
David Sidrane
d8ea955d69 Added STM32FF76xxx and STM32FF7xx families 2016-06-08 08:26:26 -06:00
Konstantin Berezenko
3fc7b6f0e5 Add stm32f105r support 2016-06-06 12:52:41 -07:00
Gregory Nutt
f75837a110 Changes from review of the last PR 2016-06-06 13:35:27 -06:00
Gregory Nutt
6b58ed820a Merged in kfazz/nuttx/kinetis (pull request #40) 
Kinetis usb driver
 2016-06-06 12:57:55 -06:00
kfazz
0a4c58e573 First attempt at a usb device controller driver for kinetis. derived from pic32mx usb driver, which uses the same usb controller. 2016-06-06 13:58:07 -04:00
Paul A. Patience
56b018d5db STM32: Fix typo 2016-06-06 12:02:11 -04:00
Gregory Nutt
053ac343fd STM32 PWM: More review changes from last commit; improve handling of unsigned types 2016-06-05 16:01:29 -06:00
Pierre-noel Bouteville
0bd444ae47 Just update duty if frequency is not changed and PSM started. This removeis glitch or blinking when only duty is frequently changed. 2016-06-05 15:35:43 -06:00
Gregory Nutt
af43ce4f46 Update ChangeLog 2016-06-05 15:01:37 -06:00
Lok Tep
88b51683bb bus busy timeout, errata 2016-06-05 11:43:06 +02:00
Gregory Nutt
7671087abc LPC32xx GPIO interrupts: Remove some old logic that should not be there. 2016-06-04 16:36:27 -06:00
Gregory Nutt
1c4d0686c8 LPC43xx: Fill out some missing GPIO interrupt logic 2016-06-04 16:05:36 -06:00
Gregory Nutt
6b84637a5b Update some comments 2016-06-04 13:04:13 -06:00
Gregory Nutt
4965d0dc99 KL and LPC11: Perform similar name change as for STM32: xyz_lowputc -> up_putc 2016-06-04 11:29:27 -06:00
Gregory Nutt
184ca294e8 Rename all references to up_lowgetc 2016-06-04 07:59:02 -06:00
Gregory Nutt
ed1535f188 Changes from review of last PR 2016-06-04 07:52:56 -06:00
Gregory Nutt
8126a3d37d Merged in v01d/nuttx/lpc43-gpio-fixes (pull request #38) 
lpc43 GPIO Interrupts enabled and fixed (not all cases tested)
 2016-06-04 07:46:04 -06:00
Alan Carvalho de Assis
86cfcfd58a Add the up_getc() function to STM32 in order to support the minnsh configuration. 2016-06-04 07:22:45 -06:00
Gregory Nutt
37e8536a88 STM32: Put timer selections in a separate menu 2016-06-04 07:11:05 -06:00
v01d
774e7f9865 lpc43 GPIO Interrupts enabled and fixed (not all cases tested) 2016-06-04 00:28:53 -03:00
Gregory Nutt
34df98d97e Use DEBUG assertions to save space 2016-06-03 14:49:05 -06:00
Gregory Nutt
704fadb0e6 STM32 TIM: Assure that a compilation error will occur if the old timer input clock frequency definitions are used 2016-06-03 14:17:18 -06:00
Gregory Nutt
3ec2386be8 STM32 TIM: There is a TIM17 on some parts too 2016-06-03 14:08:28 -06:00
Gregory Nutt
282edefab3 STM32 TIM: Add hooks for all previously unsupported timers. Also fix some PWM warnings. 2016-06-03 13:51:43 -06:00
Gregory Nutt
c11e923ad4 Fix a cut'n'paste error left from last commit. 2016-06-03 12:11:55 -06:00
Gregory Nutt
910bac65fa STM32 Timer: Generalize and extend calculation of per-timer pre-scaler value. Inspired by original proposal from Pierre-noel Bouteville. 2016-06-03 11:38:59 -06:00
Gregory Nutt
88a41862b5 Revert "STM32 Timer Driver: Change calculation of per-timer pre-scaler value" 
This reverts commit 082d32226b.
 2016-06-03 09:41:17 -06:00
Lok Tep
82cd44dbc5 adc i2c_reset 2016-06-03 17:19:22 +02:00
Pierre-noel Bouteville
082d32226b STM32 Timer Driver: Change calculation of per-timer pre-scaler value 2016-06-03 08:45:22 -06:00
Pierre-noel Bouteville
426e425a55 Correct conditional compilation in STM32 timer cpature logic 2016-06-03 08:41:53 -06:00
Pierre-noel Bouteville
6a2a0bf11f Note reserved bits in STM32 ADC 2016-06-03 08:39:17 -06:00
Pierre-noel Bouteville
94a14de190 Fix EFM32 FLASH conditional compilation 2016-06-03 08:38:11 -06:00
Gregory Nutt
fcdc17056b STM32 F4 RTC: I believe that the F405/407 has only a single alarm. Not sure. 2016-06-02 15:04:23 -06:00
Lok Tep
3bb60966e7 adc copy 2016-06-02 16:17:58 +02:00
Gregory Nutt
82c73e206e STM32 F4 RTC, trivial changes 2016-06-02 07:58:13 -06:00
pkolesnikov
beb6acc798 timer copy 2016-06-02 12:09:42 +02:00
Frank Benkert
90ccba1ad0 SAMV7: MCAN: fix missing unlock of device in mcan_txempty 2016-06-01 10:38:19 -06:00
Gregory Nutt
2f974ffeaf Merged in david_s5/nuttx/upstream_to_greg (pull request #37) 
Fix the Value Line adc IRQ number selection
 2016-05-31 19:18:11 -06:00
Gregory Nutt
82dec4acab STM32F4 RTC: Remove 24 hour limit; Fix calculation of the alarm register (was not including day of the month). Fix a bad shift value 2016-05-31 19:13:21 -06:00
David Sidrane
70f2b47a0d Fix the Value Line adc IRQ number selection 2016-05-31 14:54:04 -10:00
Gregory Nutt
6eac8bf28d Update some comments 2016-05-31 17:31:15 -06:00
Gregory Nutt
15810946b1 Update some comments 2016-05-31 17:28:02 -06:00
Gregory Nutt
8ca5daf2b3 Changes from review of last PR 2016-05-31 15:52:56 -06:00
Gregory Nutt
213c1900b0 Merged in neilh20/anuttx/bugfix_rtcalarm (pull request #36) 
The rtc examples "alarm 10" now runs to completion
 2016-05-31 15:43:36 -06:00
neilh10
639410849e alarm 10 now runs to completion 2016-05-31 14:17:52 -07:00
Gregory Nutt
b80bf20374 Fix another bungle in the last commit 2016-05-31 11:52:40 -06:00
Gregory Nutt
b5c37f0270 LP43: Add support for more than 63 interrupts (not currently needed) 2016-05-31 11:42:21 -06:00
Gregory Nutt
828c898a80 LP43: Add support for more than 63 interrupts (not currently needed) 2016-05-31 11:39:51 -06:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
ziggurat29
3970c98daf Merge branch 'master' into stm32l4_usb 2016-05-30 13:52:45 -05:00
Pierre-noel Bouteville
39c1e3aba2 Allow to not use all channet in a lower part of PWM 2016-05-30 11:58:22 -06:00
Gregory Nutt
f65616f872 Replace confusing references to uIP with just 'the network' 2016-05-30 09:16:32 -06:00
Gregory Nutt
815bea77ea i.MX6: Update ECSPI header file 2016-05-29 10:23:06 -06:00
Gregory Nutt
fa10927dcc Stefan Kolb's change to the SAMV7 Oneshot Timer (commit d44ecbcfbb) should also be applied to the SAM3/4 oneshot time since the drivers are identical. Here are the commit commits from Stefan's original change: 
"This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.

"In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

"Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it."
 2016-05-29 08:25:41 -06:00
Gregory Nutt
9071a22c28 Cosmetic fix to spacing 2016-05-29 08:25:05 -06:00
Gregory Nutt
0b17b1feb3 i.MX6: Add ECSPI configuration logic. Updated ECSPI header files 2016-05-28 17:42:29 -06:00
Gregory Nutt
16cb0a9205 i.MX6: Divide ported i.MX1/L CSPI header file into two header files 2016-05-28 17:10:58 -06:00
Gregory Nutt
13b53d87a9 i.MX6: Add ECSPI header file 2016-05-28 12:23:05 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
b4354cf130 Stefan Kolb's change to the SAMV7 Oneshot Timer (commit d44ecbcfbb) should also be applied to the SAMA5 oneshot time since the drivers are identical. Here are the commit commits from Stefan's original change: 
"This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.

"In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

"Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it."
 2016-05-27 07:58:03 -06:00
Stefan Kolb
d44ecbcfbb This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started. 
In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it.
 2016-05-27 07:51:50 -06:00
Gregory Nutt
3d3b7b5422 EFM32, STM32, TIVA: Allow lower half driver to build if any ADC is selected. Should not depend on CONFIG_ADC. 2016-05-27 06:46:33 -06:00
Lok Tep
c00bb5d4a7 i2c 2016-05-27 00:16:55 +02:00
Gregory Nutt
31ac3f5123 STM32 ADC: Missed on adc_receive 2016-05-26 12:42:34 -06:00
Gregory Nutt
aa05767a00 Add ADC bind method to the Tiva ADC drivers 2016-05-26 12:39:22 -06:00
Gregory Nutt
8f2a660c8b Add ADC bind method to the STM32 ADC drivers 2016-05-26 12:25:54 -06:00
Gregory Nutt
2f5221ed91 Add ADC bind method to the LPC43xx and SAMA5Dx ADC drivers 2016-05-26 12:19:17 -06:00
Gregory Nutt
957634519d Missed a few adc_receive calls in the LPC17xx ADC driver. That design has several. 2016-05-26 12:04:17 -06:00
Gregory Nutt
9d6845b7ec Add ADC bind method to the EFM32 and LPC17xx ADC drivers 2016-05-26 11:57:18 -06:00
Gregory Nutt
783bab6c82 Costmetic changes from review of last PR 2016-05-25 18:04:39 -06:00
Gregory Nutt
0d2698a710 Merged in ziggurat29/nuttx/stm32l4_i2c_lcd_mjkdz_001 (pull request #30) 
get I2C working for STM32L4
 2016-05-25 17:58:19 -06:00
Gregory Nutt
3603dc6218 1-wire: Initialization/uninitialization functions are not use MCU-independent up_ naming. Should use STM32-specific stm32_ naming. These are not globally accessible but only accessible from STM32 board logic. 2016-05-25 17:56:47 -06:00
ziggurat29
003c2c737a get I2C working. some more work regarding clocking computation is needed, as is some inhertited 'todo's from the basis code. but it does work with the devices tested so far. 2016-05-25 18:43:37 -05:00
Paul A. Patience
d31aefe4ef STM32 CAN: Add support for both RX FIFOs 2016-05-25 16:11:18 -04:00
Gregory Nutt
add152bf24 Update README 2016-05-25 14:07:59 -06:00
Gregory Nutt
78e08bbeea Purely cosmetic change from review of last PR 2016-05-25 13:29:01 -06:00
Gregory Nutt
fafc56ae80 Merged in ziggurat29/nuttx/stm32l4_i2c_lcd_mjkdz_001 (pull request #28) 
complete logic in 'create stack' and 'use stack' to support stack coloration.  Fix some booboos breaking compatibility with TLS in libc.
 2016-05-25 13:22:03 -06:00
Gregory Nutt
4afc4964ed SAM34 TWI: Missing semicolon 2016-05-25 13:05:03 -06:00
Gregory Nutt
4a63a7760a STM32: Hook 1-Wire driver into the build system 2016-05-25 12:31:32 -06:00
Gregory Nutt
9ec104834a Remove CONFIG_USARTn_ISUART 2016-05-25 11:21:48 -06:00
Gregory Nutt
c089a2f241 Rename CONFIG_ARCH_HAVE_OTHER_UART to CONFIG_OTHER_UART_SERIALDRIVER 2016-05-25 10:48:33 -06:00
Gregory Nutt
e2e6ce3f1b Rename CONFIG_ARCH_HAVE_SCIn to CONFIG_SCIn_SERIALDRIVER 2016-05-25 10:46:55 -06:00
Gregory Nutt
2a87741e72 Rename CONFIG_ARCH_HAVE_UARTn to CONFIG_UARTn_SERIALDRIVER 2016-05-25 10:45:01 -06:00
Gregory Nutt
249a2e48e5 Rename CONFIG_ARCH_HAVE_USARTn to CONFIG_USARTn_SERIALDRIVER 2016-05-25 10:39:23 -06:00
ziggurat29
05d2036334 complete logic in 'create stack' and 'use stack' to support stack coloration. Fix some booboos breaking compatibility with TLS in libc. 2016-05-25 10:37:38 -05:00
Aleksandr Vyhovanec
52c6cb1799 Fix typographical naming error in STM32 U[S]ART bit defintiions. 2016-05-25 09:04:03 -06:00
Aleksandr Vyhovanec
9a2002a302 1-wire driver based on U[S]ART in single-wire, half-duplex mode. 2016-05-25 08:59:47 -06:00
Frank Benkert
04223a9618 SAMV7: USBHS: Remove disabling of whole usb on suspend 
This fix removes the disabling of the whole USB peripheral on suspend
interrupt. Its enough to freeze the clock instead.

When disabling the whole peripheral, the next wakeup-interrupt comes
up with an disabled clocking. The unfreeze clock has no effect, because
the master clock is disabled. This makes all registers, including the
IDR unwriteable and the IRQ falls in an endless loop blocking the whole
system.

Furthermore the disabling of the peripheral clock prevents hotplugging
or reconnecting the USB.
 2016-05-25 07:20:48 -06:00
pkolesnikov
9ee3fe3f19 clocking for 54mhz 2016-05-25 14:30:47 +02:00
Lok Tep
4c96755219 Merge remote-tracking branch 'origin/master' 2016-05-24 23:23:57 +02:00
unknown
c89a5494b8 spi, copy 2016-05-24 16:57:39 +01:00
Gregory Nutt
317bf064a8 i.MX6: Clean up some initializers 2016-05-24 07:44:36 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Gregory Nutt
3a8ff78f87 Restore PR. I have no idea where it went. 2016-05-23 17:45:15 -06:00
Gregory Nutt
e929066042 Fix an error in the last commit 2016-05-23 17:11:36 -06:00
David Sidrane
c41e6d823a Add the up_systemreset interface to the samv7 arch. The approach is slightly different in that: 1) It enables ARCH_HAVE_RESET and allows the user to set if, and for how long, to drive External nRST signal. It also does not contain a default board_reset, as that really should be done in the config's src if CONFIG_BOARDCTL_RESET is defined. 2016-05-23 17:05:02 -06:00
David Sidrane
fca329945b This patch ensures that the TWIHS (i2c) hw get's its clock set when the sequence of 
sam_i2cbus_initialize
sam_i2cbus_uninitialize
sam_i2cbus_initialize

Or twi_reset is called.

I found this a while back in the stm32 family, so there may be more arch-es with this sort of bug. I suppose any driver that has the notion of "do not set the freq if it is already set" could be suspect.
 2016-05-23 13:38:34 -06:00
Alexander Vasiljev
b43fcd6f99 LPC43xx: Add AES support. 2016-05-23 08:03:32 -06:00
pkolesnikov
eb9cfd1255 i2c copy, right include 2016-05-23 15:59:24 +02:00
pkolesnikov
7630b9db5d i2c copy 2016-05-23 15:56:56 +02:00
Gregory Nutt
80d0b2736e Reorder some logic: (1) set initial CPU IDLE task regsters AFTER allocating stack, (2) invalidate cache in CPU start-up BEFORE handling first interrupt. 2016-05-22 15:01:49 -06:00
Gregory Nutt
e47714322e Merged in K-man23/nuttx/stm32f411e-disco (pull request #25) 
Add basic configuration for stm32f411e-disco board with STM32F411VE chip
 2016-05-20 17:54:07 -06:00
Konstantin Berezenko
a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Gregory Nutt
356692d70e SMP: Need to enable FPU on other CPUs as well 2016-05-20 13:35:58 -06:00
Gregory Nutt
07acd5327a SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
David Sidrane
916153fb75 Fix build if the config is not updated 2016-05-19 12:44:58 -10:00
Gregory Nutt
e27e87a957 Backing out part of last commit 2016-05-19 15:46:07 -06:00
David Sidrane
8fac871cc9 Adds a JTAG config and ERASE config to Kconfig to set the CCFG_SYSIO SYSIO Pins 
• SYSIO4: PB4 or TDI Assignment
0: TDI function selected.
1: PB4 function selected.
• SYSIO5: PB5 or TDO/TRACESWO Assignment
0: TDO/TRACESWO function selected.
1: PB5 function selected.
• SYSIO6: PB6 or TMS/SWDIO Assignment
0: TMS/SWDIO function selected.
1: PB6 function selected.
• SYSIO7: PB7 or TCK/SWCLK Assignment
0: TCK/SWCLK function selected.
1: PB7 function selected.
• SYSIO12: PB12 or ERASE Assignment
0: ERASE function selected.
1: PB12 function selected.

The thing I did not add is warning or compilation failure, (to save the next guy the hassle), at ALL the driver points that uses the these pins.

I did remove this

  /* To use the USART1 as an USART, the SYSIO Pin4 must be bound to PB4
   * instead of TDI
   */

  uint32_t sysioreg = getreg32(SAM_MATRIX_CCFG_SYSIO);
  sysioreg |= MATRIX_CCFG_SYSIO_SYSIO4;
  putreg32(sysioreg, SAM_MATRIX_CCFG_SYSIO);

in sam_lowputc.c in favor of an #error - because the default is an input TDI and driving it blindly to an output TXD1, would be a contention.
 2016-05-19 14:33:54 -06:00
Gregory Nutt
7f7d4e664c Completely trivial changes from review of last PR 2016-05-19 14:09:00 -06:00
Sebastien Lorquet
ef66f641e9 small fix left from stm32 2016-05-19 21:57:59 +02:00
Sebastien Lorquet
6642898ee4 Merge branch 'master' into can 2016-05-19 21:49:31 +02:00
Sebastien Lorquet
8aae953f67 CAN support for STM32L4 2016-05-19 19:13:04 +02:00