* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
arch/z80/: include/ez80/irq.h, src/ez80/ez80f92_*.asm: Correct some comments related to vector address offsets.
boards/z80/ez80/z20x/scripts/z20x_loader.linkcmd: Fix RAM offset in linker script
Also remove the horrible violation of the architectural rules by adding an include path into net in sched/group/Make.defs. Folks, if you are going to participate in this project, you MUST respect the odule architecture and never, never, never do these things.
commit d07afc934e, "fcntl: add O_CLOEXEC/FD_CLOEXEC support" introduce a compilation error .. a bad file inclusion. That commit added an unnecessary inclusion of "socket/socket.h" which is NOT available in the sched sub-directory. It is only available under the net/ sub-directory.
There is no include path for such and inclusion and there must NEVER be such a include path. Module design forbids including header files between diffent "silos" in the design. Nothing under net/ can ever be available to logic under sched/.
Commit 3b53cd1e57, " Fix improper use of inline" missed conversion of several inline functions. Also, some functions that require arguments were not handled correctly,
This was noted because there were still hundreds of implementations of the cache stubs in the ez80 build. This commit adds the missing conversions and fixes the bad function arguments.
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer
* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2
* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly
* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling
* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure
* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method
* arch: x86_64: Fix C alias of page table and GDT/IST
* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup
* arch: x86_64: Consolidate MSR definition in arch/arch.h
* arch: x86_64: Edit the way of handling GDT/IST in C into structures
* arch: x86_64: Correct the starting point of isr/irq stack
* arch: x86_64: Update up_initialize.c with the new initializing procedure
* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT
* arch: x86_64: Overhual of interrupt initialization procedure
* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]
* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure
* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug
* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot
* arch: x86_64: Correctly apply license header, comment and format code
* arch: x86_64: properly send a SIGFPE on floating point error
* arch: x86_64: Remove unused variable in up_restore_auxstate
* arch: x86_64: properly trash the processor with an infinite loop
* arch: x86_64: Fix typo in ISR handler causing ISR not handled
* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path
* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE
* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method
* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support
* arch: x86_64: update defconfigs
* arch: x86_64: rename qemu as qemu-intel64
* arch: x86_64: update Board readme
Kconfig files. Repartition some functionality. Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.
arch/z80/src/ez80/ez80_i2c.h: Rename arch/z80/src/ez80/ez80f91_i2c.h. It is sharable by both ez80f91 and ez80f92.
arch/z80/src/ez80/: Add logic to perform an additional level of interrupt redirection. This is necessary because the the interrupt handling is part of the loader FLASH-based logic. In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program. See ez809f2_loader.asm and ez80f92_program.asm
boards/z80/ez80/z20x/scripts: Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now). Update file headers to use Apache 2.0 license.
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
I finally figured out why the ez80 code has gotten so big. It is because people have been put putting big inline functions in header files. That is a violation of the coding standard, since only c89 compatibility is required in all common code. But we have been tolerating inline function it because include/nuttx/compiler.h defines 'inline' to be nothing for C89 compilers.
As a result, static inline functions declared within a C file not so bad; the inline qualifier is ignored, if not supported, but otherwise all is well.
But it is catastrophic in header files. Those static inline functions are included as static functions and implemented in EVERY file that includes those header files, even if the functions are never called. That makes the code base huge!So there is another PR coming to fix some of the worst offenders.
This commit fixes two of the worst offenders I have encountered so far: include/nuttx/sempahore.h and cache.h. But there may be a few other changes needed. Under include/nuttx there are still inline functions thread.h, inclue/nuttx/list.h, mutex.h, tree.h, and include/nuttx/crypto/blake2s.h with no protection for compilers that do not handler the inline qualifier. Otherwise we are clean.
With the changes to these two header files, the size of the z20x build is reduced by about 40%. And incredible size savings.
