Gregory Nutt
27e212a291
Nucleo-F072RB: Various fixes to get the first clean build.
2017-04-18 10:37:05 -06:00
Gregory Nutt
8b157b034d
STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x
2017-04-17 17:13:32 -06:00
Gregory Nutt
2c01aaad59
STM32F0: Add basic support for STM32F07x family
2017-04-17 16:54:07 -06:00
Gregory Nutt
c910334ced
Make sure that Alan is listed as author in new files.
2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis
c3e0ec369f
Add basic support for STM32F0
2017-04-14 08:34:36 -06:00
Juha Niskanen
e320e5c100
STM32: add STM32L162VE to chip.h
2017-04-03 07:59:11 -06:00
David S. Alessio
7f2c4c4274
XMC4xxx: Add FPU support
2017-03-22 12:04:32 -06:00
Gregory Nutt
805a4f65e9
XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration.
2017-03-21 09:31:44 -06:00
Gregory Nutt
886dadae0a
XMC4xxx: Minor updates to naming and comments
2017-03-20 18:10:23 -06:00
Gregory Nutt
b9e29d1083
XMC4xxx: Clean up memory map
2017-03-20 17:08:09 -06:00
Gregory Nutt
4ba091933e
XMC4xxx: Fix for early bringup problems
2017-03-20 16:31:35 -06:00
Gregory Nutt
5c0be816a5
XMC4xxx: Add commin USIC support logic for use in all USIC configurations.
2017-03-19 12:48:37 -06:00
Gregory Nutt
5693f26a5e
XMC4xx: Fix several early compilation problems.
2017-03-16 11:30:02 -06:00
Gregory Nutt
2430049e3b
arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete.
2017-03-14 13:04:09 -06:00
ahb
67c86e5aa9
add LPC4337FET256
2017-03-09 10:30:28 +01:00
Gregory Nutt
ac6e552ff7
Fixes for coding standard: '*' needs to 'snuggle' with following variable name
2017-02-28 18:37:44 -06:00
Gregory Nutt
2e0ffc0ea3
Update some comments.
2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428
Add basic support for the STM32F334
2017-02-26 12:39:44 +01:00
David Sidrane
61b10c5e58
Kinetis:Add LPUART to K66 chip
...
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
to removed UART5 as the K66 dioes not have UART5
2017-02-25 07:02:56 -10:00
David Sidrane
1ba6eadcec
Kinetis:Include the PMC features
2017-02-22 10:42:52 -10:00
David Sidrane
8525c266a1
Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h
...
The motvations is to version the IP blocks of the Kinetis
K series family of parts.
This added versioning and configuration features for the
Kinetis PMC IP block.
It is envisioned that in the long term as a chip is added.
The author of the new chip definitions will either find
the exact configuration in an existing chip define and
add the new chip to it Or add the PMC fature configuration
#defines to the chip ifdef list in
arch/arm/include/kinetis/kinetis_pmc.h In either case the
author should mark it as "Verified to Document Number:"
taken from the reference manual.
The version KINETIS_PMC_VERSION_UKN has been applied to
most all the SoCs in the kinetis arch prior to this commit.
The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
Verified PMC configurations.
2017-02-22 10:42:52 -10:00
David Sidrane
5b550a37eb
Kinetis:Include the SIM features
2017-02-22 10:42:52 -10:00
David Sidrane
d74f16ecb9
Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h
...
The motvations is to version the IP blocks of the Kinetis
K series family of parts.
This added versioning and configuration features for the
Kinetis SIM IP block.
It is envisioned that in the long term as a chip is added.
The author of the new chip definitions will either find
the exact configuration in an existing chip define and
add the new chip to it Or add the SIM feature configuration
#defines to the chip ifdef list in
arch/arm/include/kinetis/kinetis_sim.h In either case the
author should mark it as "Verified to Document Number:"
taken from the reference manual.
The version KINETIS_SIM_VERSION_UKN has been applied to
most all the SoCs in the kinetis arch prior to this commit.
The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
All K64 and K66 which not have Verified SIM configurations.
2017-02-22 10:42:52 -10:00
David Sidrane
14bdf3af22
Kinetis:Fixed Typo in kinetis_mcg header
2017-02-22 10:42:52 -10:00
Gregory Nutt
e803e2c3f4
Costmetic changes from review of last PR.
2017-02-07 17:16:56 -06:00
David Sidrane
ff056cf9bd
arch/arm/include/kinetis/kinetis_mcg.h
2017-02-07 12:38:28 -10:00
David Sidrane
2216ed52a9
Kinetis chip Adding K66 and inlcuding MCG versioning
...
This includes arch/arm/include/kinetis/kinetis_mcg.h
to bring in the MCG versioning and defines the KINETIS_K66
family for the added SoCs:
--------------- ------- --- ------- ------- ------ ------ ------ -----
PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
FREQ CNT FLASH FLASH
--------------- ------- --- ------- ------- ------ ------ ------ -----
MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
2017-02-07 12:38:28 -10:00
David Sidrane
ec567371b6
Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h
...
The motvations is to version the IP blocks of the Kinetis
K series family of parts.
This added versioning and configuration features for the
Kinetis MCG IP block.
It is envisioned that in the long term as a chip is added.
The author of the new chip definitions will either find
the exact configuration in an existing chip define and
add the new chip to it Or add the MCG feature configuration
#defines to the chip ifdef list in
arch/arm/include/kinetis/kinetis_mcg.h In either case the
author should mark it as "Verified to Document Number:"
taken from the reference manual.
The version KINETIS_MCG_VERSION_UKN has been applied to
most all the SoCs in the kinetis arch prior to this commit.
The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
All K64 and K66 which not have Verified MCG configurations.
2017-02-07 12:38:28 -10:00
Gregory Nutt
9395704192
Kinetis, not Kinetics.
2017-02-07 08:20:52 -06:00
Wolfgang Reißnegger
a22dc9b1a8
SAM3/4: Add support for ATSAM4S4C.
2017-01-18 11:56:51 -08:00
Maciej Skrzypek
902c41462d
Kinetis: New K60 has no Flex memory
2017-01-13 08:20:48 -06:00
Maciej Skrzypek
4becebe59f
Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60
2017-01-13 08:13:21 -06:00
Maciej Skrzypek
bc1826da63
Kinetis: Added CHIP_MK60FN1M0VLQ12 chip
2017-01-13 08:10:03 -06:00
Gregory Nutt
12148f0e33
Merged in paulpatience/nuttx/stm32 (pull request #180 )
...
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
2016-12-24 20:20:39 -06:00
Gregory Nutt
f063e4c5ac
Remove Calypso architecture support and support for Calypso SERCOMM driver.
2016-12-13 18:35:52 -06:00
Gregory Nutt
26560cb9e1
i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept.
2016-12-13 16:59:50 -06:00
Paul A. Patience
30bbeb6c1f
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
2016-12-08 16:31:39 -05:00
Sebastien Lorquet
db24f237d7
STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings
2016-12-01 09:00:59 -06:00
Gregory Nutt
3353d9280f
i.MX6: Disable non-cached region support. Add SCU register definitions.
2016-11-26 17:03:57 -06:00
Gregory Nutt
6ff6da083f
Fix a few compile related issues from the last commit
2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942
i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region.
2016-11-26 12:04:02 -06:00
Gregory Nutt
f53e48199f
Simplify and document some macros
2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f
Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature.
2016-11-21 11:55:59 -06:00
Paul A. Patience
912fe06a86
Add architecture-specific inttypes.h
2016-10-27 16:01:38 -04:00
Marc Rechte
483f012600
Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.
2016-10-25 14:14:10 -06:00
Gregory Nutt
48fb97e7b5
More of the same cloned typo
2016-10-19 10:11:45 -06:00
David Sidrane
bce382da52
Kinetis Support ARMV7 Common Vector and FPU
2016-10-18 12:00:01 -10:00
Gregory Nutt
56f2454c86
Fix names of pre-processor variables used in header file idempotence
2016-08-06 18:48:45 -06:00
Gregory Nutt
e6137ff129
Rename SAMD/L version of CONFIG_GPIO_IRQ to CONFIG_SAMDL_GPIOIRQ
2016-07-22 14:38:33 -06:00
Gregory Nutt
360efe03c1
Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ
2016-07-22 14:18:30 -06:00
Gregory Nutt
7a7998e4f9
Add support for the NXP Freedom-K64F board. This is primarily the work of Jordan Macintyre. I leveraged this code from https://github.com/jmacintyre/nuttx-k64f
2016-07-01 15:42:21 -06:00
Gregory Nutt
91dd3306c8
arch/arm/src/kinetis: Add basic support for the K64 family. Still moving register definition files to the kinetis/chip subdirectory.
2016-07-01 11:24:41 -06:00
David Sidrane
2de4ec2a47
Added as an author
2016-06-17 12:38:17 -10:00
Gregory Nutt
1cdc746726
Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES
2016-06-11 14:14:08 -06:00
Konstantin Berezenko
b9e7b4ed70
Correct the can2 rx irq number for stm32f10xx chips
2016-06-10 10:52:58 -07:00
David Sidrane
d8ea955d69
Added STM32FF76xxx and STM32FF7xx families
2016-06-08 08:26:26 -06:00
Konstantin Berezenko
3fc7b6f0e5
Add stm32f105r support
2016-06-06 12:52:41 -07:00
Paul A. Patience
56b018d5db
STM32: Fix typo
2016-06-06 12:02:11 -04:00
Gregory Nutt
f06a06952f
LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies.
2016-05-31 06:22:10 -06:00
Konstantin Berezenko
5c6cd17d46
Add support for SPI 4 and 5 on stm32f411 chips
2016-05-27 11:08:18 -07:00
Gregory Nutt
4a63a7760a
STM32: Hook 1-Wire driver into the build system
2016-05-25 12:31:32 -06:00
Alexander Vasiljev
ad6f37edfa
Adds definitions for the LPC4337jet100 chip.
2016-05-24 07:03:50 -06:00
Konstantin Berezenko
a2253cdd3e
Add basic configuration for stm32f411e-disco board with STM32F411VE chip
2016-05-20 16:38:25 -07:00
Aleksandr Vyhovanec
472115eda9
ARMv7-M: Add support for the IAR compiler
2016-04-02 08:14:09 -06:00
Gregory Nutt
e0249bd025
STM32L4: Fix incorrect and conflicting definitions for STM32L4_NGPIOS and STM32L4_NGPIO_PORTS. Now there is only STM32L4_NPORTS.
2016-03-20 14:12:07 -06:00
Gregory Nutt
4e07680554
TLS: Forgot to add a file before last commit
2016-03-11 12:30:04 -06:00
Sebastien Lorquet
f4f03e6f02
Add port to the stm32L4
2016-03-10 09:59:16 -06:00
Gregory Nutt
5c75f83b55
ARMv7-A GIC: Add definitions for shared interrupt IDs
2016-03-10 07:13:40 -06:00
Gregory Nutt
400aead74a
i.MX6: Add definitions for private processor interrupt IDs
2016-03-09 18:11:28 -06:00
Gregory Nutt
5c881e6d2e
i.MX6: minor updates to last commit
2016-03-04 18:44:30 -06:00
Gregory Nutt
5100e7a623
i.MX6: Add some preliminary definitions to handle other family members
2016-03-04 18:43:16 -06:00
Gregory Nutt
bed5aa8731
Add IMX_NCPUS to i.MX6 chip.h file
2016-03-02 10:28:09 -06:00
Gregory Nutt
b466f18daf
i.MX6: Some fixes for early compile issues
2016-03-01 14:15:43 -06:00
Gregory Nutt
52d777fa8d
Merged in paulpatience/nuttx-arch/stm32f469 (pull request #56 )
...
STM32: Add support for STM32F46xxx
2016-03-01 11:53:07 -06:00
Paul A. Patience
099990f3da
STM32: Add support for STM32F46xxx
2016-03-01 12:18:07 -05:00
Gregory Nutt
fe7331900c
i.MX6 add dummy chip.h header files
2016-02-29 14:08:16 -06:00
Gregory Nutt
0a9920a87a
i.MX6: Add IRQ header file
2016-02-28 14:07:53 -06:00
Gregory Nutt
74e5336b39
Rename the imx/ directories to imx1/ to make room in the namespace for other members of the i.MX family
2016-02-27 10:29:24 -06:00
Gregory Nutt
666cc280f4
Rename irqenable() to up_irq_enable(); rename irqdisable() to up_irq_disable()
2016-02-14 16:54:09 -06:00
Gregory Nutt
83bc1c97c3
Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
2016-02-14 16:11:25 -06:00
Gregory Nutt
5d449e9991
Add spinlock support for ARMv7-A architectures
2016-02-09 12:53:10 -06:00
Gregory Nutt
8f1b9886a9
Backport the new LPC17xx I2C driver to the LPC11xx in order to get the I2C_TRANSFER method
2016-01-30 12:17:01 -06:00
Gregory Nutt
f4115ab45c
Correct LPC11xx priority definitions + fix some typos in comments
2016-01-25 07:36:26 -06:00
Lok Tep
1f4ce9e7f9
LPC43xx: Fix some NVIC priority definitions
2016-01-25 07:23:28 -06:00
Andrew Webster
43303a5786
Kinetis: add MK60N512VLL100 support
2016-01-21 19:07:18 -06:00
Gregory Nutt
c58393cb4d
TMS570: Add GIO drivrs and GIO interrupt support
2015-12-25 13:44:49 -06:00
Gregory Nutt
ccc6913383
TMS570: Add definitions to support GIO second level interrupts
2015-12-25 11:43:38 -06:00
Gregory Nutt
ea1fa2e938
TMS570: SCI serial driver is now included in the build and compiles without error
2015-12-24 13:37:42 -06:00
Gregory Nutt
fa36531fee
TMS570: Add default VIM channel assignments
2015-12-23 09:45:32 -06:00
Gregory Nutt
5794675247
TMS570: Memory map applies only to LS04x and LS03x. Peripheral numbering seems to start with 1, not 0
2015-12-16 14:10:45 -06:00
Gregory Nutt
bacf7cf07e
ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit
2015-12-16 09:03:14 -06:00
Gregory Nutt
8cabb844ab
TMS570: Hook into build/configuration system
2015-12-15 17:15:37 -06:00
Gregory Nutt
a6e035baeb
TMS570: Add arch/arm/include/tms570 header files
2015-12-15 13:41:12 -06:00
Gregory Nutt
6a9876f960
SAMV7: Add an untested RSWDT driver
2015-12-06 09:56:45 -06:00
Gregory Nutt
a6d6c430d9
Changes to last merge from review for compliance to coding standards
2015-11-17 21:10:17 -06:00
Marwan Ragab
4999c14085
Added implementation to get 96-bit stm32 unique id
2015-11-17 21:34:41 -05:00
Gregory Nutt
0add2b8910
arch/arm/include/samv7: Add support for the SAME70 family
2015-11-14 11:36:21 -06:00
Lok Tep
3b4c71ef8d
more revert
2015-11-09 14:51:00 +01:00
Lok Tep
a8416d2a26
revert
2015-11-09 14:41:08 +01:00
Lok Tep
7d386866af
Merged nuttx/arch into master
2015-11-09 14:24:41 +01:00
v01d
79fad2843a
lpc4337: WIP
2015-10-30 20:15:18 -03:00
Gregory Nutt
2b078150e8
Merged in marten_svanfeldt/nuttx-arch-public/for_upstream/stm32f429n (pull request #20 )
...
Add support for STM32F429N (TFBGA) chip
2015-10-22 18:19:52 +08:00
Marten Svanfeldt
4d879a33ee
Add support for STM32F429N (TFBGA) chip
...
Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
2015-10-21 10:30:57 +08:00
Lok Tep
5983019a45
merge from nuttx
2015-10-08 22:57:34 +02:00
Gregory Nutt
9caf33e13b
Standardize the width of all comment boxes in C header files
2015-10-03 07:28:30 -06:00
Gregory Nutt
cae0c9a2e3
Standardize the width of all comment boxes in header files
2015-10-02 17:47:23 -06:00
Gregory Nutt
36726b1bc4
Standardize the width of all comment boxes in header files
2015-10-02 17:42:29 -06:00
Gregory Nutt
3a07b09b9a
LPC43xx: Tweaks to pkolesnikov's LPC4370 changes to get a clean compilation
2015-10-01 10:00:25 -06:00
petekol
0eb1afcdef
usb reset right
2015-09-30 17:13:32 +02:00
petekol
585fdf70d8
CONFIG_ARCH_CHIP_LPC4370FET100
2015-09-29 17:23:17 +02:00
Gregory Nutt
cbdafb96d5
Remove unused function setipsr. Cortex-M IPSR register is not writable
2015-09-23 08:38:32 -06:00
Gregory Nutt
139a31b875
stm32f74xx75xx_irq.h: STM32_IRQ_SAI2 is not defined but STM32_IRQ_SAI1 is defined twice. Noted by Vlad Chiorean
2015-09-22 07:45:59 -06:00
Gregory Nutt
a27e673967
SAMA5D2: Finish implementtion of the PIO driver
2015-09-12 11:36:06 -06:00
Gregory Nutt
cfd41bdb30
STM32: Eliminate some warnings
2015-09-07 16:25:54 -06:00
Gregory Nutt
831272cd35
SAMA5D2: Add memory map file
2015-09-02 13:04:01 -06:00
Ilya Averyanov
675878b360
PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define
2015-09-01 08:06:34 -06:00
Gregory Nutt
c33efa0a60
SAMA5D2: Add chip definitions, PIDs, and IRQ definitions
2015-08-31 15:19:01 -06:00
Paul A. Patience
c800841632
Added definitions for STM32F303K6, STM32F303K8, STM32F303C6,
...
STM32F303C8, STM32F303RD, and STM32F303RE devices.
2015-08-17 14:00:49 -04:00
Gregory Nutt
348060f5d2
SAMV7: Add QSPI Register Definition Header File
2015-08-14 18:11:01 -06:00
Anton D. Kachalov
f10b7ff09a
Merge branch 'master' of https://bitbucket.org/nuttx/arch
2015-08-10 18:14:49 +03:00
Anton D. Kachalov
46444388fa
Add Shared IRQ support for UART w/multi port.
...
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
2015-08-10 18:13:35 +03:00
Gregory Nutt
f986d08515
SAMV71: Fix error in GPIO interrupt numbering
2015-08-05 08:57:05 -06:00
Gregory Nutt
23ed19c514
Clean-up from last commit to make sure that all files have BSD licensed header with the correct authors and that the code conforms to the NuttX coding style
2015-07-29 13:52:23 -06:00
Anton D. Kachalov
75762f1519
Add support for MoxaRT
2015-07-29 19:13:47 +03:00
David Sidrane
778c630c6b
Add support for the STM32446. From David Sidrane
2015-07-22 07:26:53 -06:00
David Sidrane
e36ca25c5c
STM32: Fix incorrect naming of inclusion guard in IRQ header files
2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b
STM32: Fix incorrect naming of inclusion guard in IRQ header files
2015-07-21 11:30:45 -06:00
Gregory Nutt
9c284bb05f
Syscall fixes: Add support for Cortex-M7; mount syscall has to be suppressed if there are no mountable file systems
2015-07-21 11:20:46 -06:00
Gregory Nutt
5f9b0b3a2f
STM32 F7: Add USART/UART register definition
2015-07-18 15:58:59 -06:00
Gregory Nutt
12f04f8500
STM32 F7: Add heap initializatino logic; Clone the STM32 CCM allocator as the F7 DTCM allocator
2015-07-18 12:52:24 -06:00
David Sidrane
5e1a50c93e
STM32: Oops. Some STM32 F7 edits accidentally went into STM32 files ;(. Fixed by David Sidrane
2015-07-18 11:05:44 -06:00
Gregory Nutt
4f307ba36a
STM32F7: Clone GPIO support from the STM32 F4
2015-07-18 08:34:07 -06:00
Gregory Nutt
7eb5e7f9ec
STM32F746G-DISCO: Getting closer to a build
2015-07-17 11:47:16 -06:00
Gregory Nutt
a7a7ec8850
STM32 F7: Misc naming fixes
2015-07-16 19:49:20 -06:00
Gregory Nutt
3583f8c1dc
STM32 F7: Add more configuration selections
2015-07-16 18:30:40 -06:00
Gregory Nutt
d8915e9dc6
Add include/chip.h definitions and configuration support for the STM32 F7
2015-07-16 08:47:25 -06:00
Gregory Nutt
be16a06857
Create a src directory for the STM32F7 (not much in it yet)
2015-07-15 14:32:28 -06:00
Gregory Nutt
1ed5f5a3ed
STM32: Move STM32F42xxx IRQ definitions out of stm32f40xxx_irq.h into their own stm32f42xxx_irq.h header file
2015-07-15 13:52:20 -06:00
Gregory Nutt
3efe60bb6d
STM32 F7: Add interrupt vector definitions
2015-07-15 10:54:03 -06:00
Gregory Nutt
4a38276ff9
SAMD21: Extend SAMD USART support to include SAMD21 differences
2015-06-21 09:17:01 -06:00
Gregory Nutt
28ae44eb02
SAMD21: Add memory map header file
2015-06-20 15:02:25 -06:00
Gregory Nutt
66a960dacd
SAMD21: Add interrupt vectors definitions
2015-06-20 14:40:47 -06:00
Gregory Nutt
15c8e2e00a
SAMD21: Add interrupt vectors definitions
2015-06-20 14:40:36 -06:00
Gregory Nutt
d00ed2d780
Add configuration support for SAMD21
2015-06-20 14:31:53 -06:00
Gregory Nutt
75077f4728
SAML21: Add DMA descriptor management logic
2015-06-14 08:48:25 -06:00
Gregory Nutt
8c8b2d926b
SAMD21: Add build framework for DMA support. Nothing there yet except for skeletal logic taken from SAM3/4.
2015-06-13 15:06:37 -06:00
Gregory Nutt
29136e51cc
Clean up and review of header files for conformance to standards
2015-06-12 19:26:01 -06:00
Gregory Nutt
d6ce8220fd
Clean up and review of header files for conformance to standards
2015-06-12 18:07:47 -06:00
Gregory Nutt
0742ee3c3e
Add support for MK20DN--VLH5 and MK20DX---VLH5. Needed for backward compatible support for Teensy-3.0
2015-06-10 11:45:17 -06:00
Gregory Nutt
f01c04f1a7
Add support for other members of the Kinetis MK20DX---VLH7 family; undate a README
2015-06-09 18:01:32 -06:00
Gregory Nutt
0c59dd2888
Fix a missing # in the previous commit
2015-05-31 13:26:13 -06:00
Gregory Nutt
4e811aa54d
Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous).
2015-05-31 13:06:26 -06:00
Gregory Nutt
318345fb1d
Basic support for the Kinetis K20 architecture. Taken from PX4. This is the work of Jakob Odersky.
2015-05-26 15:03:35 -06:00
Gregory Nutt
9140a0fcc4
Initial support for the NXP LPC11 family and the LPC1115 MCU in particular. Contributed by Alan Carvalho de Assis.
2015-05-22 14:14:09 -06:00
Gregory Nutt
4458a34787
SAML21: Add interrupt header file + fix a few initial compile issues. Still a long way to go
2015-05-18 17:41:28 -06:00
Gregory Nutt
5ba5b5e24b
SAML21: Add configuration logic and placeholders for memory man and pin configruation header files
2015-05-14 14:02:50 -06:00
Gregory Nutt
3ec627b02d
Rename SAMD directories and configuration variables to SAMDL so that the same build environment can support the SAML
2015-05-14 12:25:09 -06:00
Gregory Nutt
10bfcaf939
Fix typo in arch/arm/include/kl/chip.h header file. From Michael Hope
2015-05-12 07:05:29 -06:00
Gregory Nutt
aaaa8f2e9d
Adds support for STM32F302K8 and STM32F302K6. From Ben Dyer via PX4/David Sidrane.
2015-05-08 14:10:55 -06:00
Gregory Nutt
8062555384
Add support for the KL25Z64. The KL25Z64 is a lower memory variant of the KL25Z128 and is used on the Teensy LC. From Michael as SourceForge patch 50.
2015-05-07 06:47:17 -06:00
Gregory Nutt
d77a19f0a2
Two r's and only two r's in the word interrupt
2015-04-23 14:04:43 -06:00
Gregory Nutt
7a6a5b7bd0
Defines a second interface for the dma2d controller. Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer).
...
The main features are:
1. DMA2D interface
Supports the nuttx pixel formats:
- FB_FMT_RGB8
- FB_FMT_RGB24
- FB_FMT_RGB16_565
Dynamic layer allocation during runtime for the supported formats
- The number of allocatable layer can be configured.
Supported dma2d operation:
- blit (Copy content from source to destination layer) also works with
selectable area.
- blend (Blend two layer and copy the result to a destination layer wich can
be a third layer or one of the source layer) also works with selectable
area.
- fillarea (Fill a defined area of the whole layer with a specific color)
As a result of that the dma2d controller can't transfer data from the core coupled memory, CCM is disabled but usable by the ccm allocator. Currently the ccm allocator is used for allocating the layer structurei only. For the dma memory (layers frame buffer) memory is allocated from heap 2 and 3.
2. LTDC interface
I have changed the api for the currently non implemented operations:
- blit (Copy content from a dma2d layer to an ltdc layer) also works with
selectable area.
- blend (Blend two dma2d layer and copy the result to a destination ltdc
layer) also works with selectable area.
Note! ltdc layer is a layer referenced by the ltdc interface. dma2d layer
is a layer referenced by the dma2d interface.
One of the most important questions for me was, How can i flexible use an
ltdc layer with the dma2d interface, e.g. as source layer for dma2d
operations?
Get the layer id of the related dma2d layer by a special flag when using
getlid() function of the ltdc interface and use the layer id to reference
the specific dma2d layer by the dma2d interface.
The ltdc coupled dma2d layers are predefined and can't be dynamically
allocated of freed. They use the same frame buffer memory and the same
color lookup table.
Changes:
- layer internal format of the clut table
- interrupt handling for register reload (vertical vblank) instead using
waiting loop
- small fixes and refactoring
From Marco Krahl.
2015-04-16 09:11:52 -06:00
Gregory Nutt
ae15c6963c
Make some file section headers more consistent with standard
2015-04-08 08:04:12 -06:00
Gregory Nutt
cf8f8b8c4a
SAMV6 USB updates
2015-03-26 09:49:01 -06:00
Gregory Nutt
a590bdc737
SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling
2015-03-16 13:51:37 -06:00
Gregory Nutt
8f59fc8f64
SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7
2015-03-12 18:03:41 -06:00
Gregory Nutt
0d79e315fd
SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out.
2015-03-12 16:00:38 -06:00
Gregory Nutt
9b6c7661a4
SAMV7: Add TWI/I2C driver (untested)
2015-03-12 10:58:11 -06:00
Gregory Nutt
f72079cc63
Update COPYING file with special license requirements for PPPD
2015-03-11 09:14:15 -06:00
Gregory Nutt
f696530485
SAMV7: Add GPIO interrupt support
2015-03-08 19:32:05 -06:00
Gregory Nutt
2571d6202d
SAMV71-XULT: Add heap allocation logic
2015-03-07 11:46:54 -06:00
Gregory Nutt
7113de4d18
SAMV71: Add PMC register definition header files
2015-03-06 14:58:13 -06:00
Gregory Nutt
fdac423979
Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71.
2015-03-06 10:53:57 -06:00
Gregory Nutt
9bcdf974a0
Add new common lazy FPU state saving option for ARMv7-M. Not yet verified
2015-03-06 08:26:43 -06:00
Gregory Nutt
89fd098a20
SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions
2015-03-05 16:34:22 -06:00
Gregory Nutt
67c21e6817
SAMV7 Kconfig: Add peripheral selections
2015-03-05 13:51:39 -06:00
Gregory Nutt
02e613b277
Add basic build directories and configuration logic for the SAMV7 family
2015-03-05 10:00:24 -06:00
Gregory Nutt
33ac85adcb
Adds architecture support for the STM32F372 and F373 (no board support yet). Only tested on STM32F373CC, but should work on the rest. Contributed by Marten Svanfeldt.
2015-03-02 10:33:42 -06:00
Gregory Nutt
2d91128111
Tiva GPIO clean-up by Calvin Maguranis
2015-02-20 13:40:25 -06:00
Gregory Nutt
a0a553f3e9
Tiva: Move GPIIO prototypes out of arch/arm/include/tiva/irq.h to arch/arm/tiva/tiva_gpio.h where they belong
2015-02-20 13:31:43 -06:00
Gregory Nutt
d1fa95ffc3
Merge commit 'd000b0ac237cb6b17e3d355b55250c3ca7e9f2d6'
2015-02-11 18:07:03 -06:00
sauttefk
7384d3bd79
Add TI EK-TM4C1294XL launchpad support
2015-02-12 00:30:38 +01:00
Gregory Nutt
24e51794f9
Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg
2015-02-11 07:15:45 -06:00
Gregory Nutt
d8561fbcae
Remove execute privileges from some header files
2015-02-01 06:24:18 -06:00
Gregory Nutt
4510be6c7d
Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well
2015-01-12 10:14:48 -06:00
Gregory Nutt
9e546ff37a
Tiva interrupts: Fix chip-specific interrupt un-definitions
2015-01-12 10:00:42 -06:00
Gregory Nutt
28a52cbd23
TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions
2015-01-07 08:57:48 -06:00
Gregory Nutt
16a302e732
STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review
2014-12-19 14:52:17 -06:00
Gregory Nutt
aabd4c59a3
Tiva: Change negative logic CONFIG_TIVA_DISABLE_GPIOx_IRQS to positive logic CONFIG_TIVA_GPIOx_IRQS
2014-12-18 15:19:16 -06:00
Gregory Nutt
83c56151ab
Tiva: Add GPIO interrupt support for the TMS4C129X
2014-12-18 11:52:06 -06:00
Gregory Nutt
a719e75851
DK-TM4C129X: Fixes to get clean build. Logic is still not complete, however
2014-12-18 08:24:24 -06:00
Gregory Nutt
aa724ea75b
Add interrupt definitions for the TM4C129X
2014-12-17 08:19:23 -06:00
Gregory Nutt
1410a650e0
Tiva: Better distinguish features of the TM4C1294xx and the TM4C129Xxx
2014-12-16 18:02:59 -06:00
Gregory Nutt
29d23ae626
Remove packaging indications for TM4C129 configuration variables
2014-12-16 16:22:52 -06:00
Gregory Nutt
188e092398
Add TM4C129XNCZAD and TM4C1294NCPDT to the Tiva configuration system
2014-12-16 16:02:21 -06:00
Gregory Nutt
0ad88d9664
Enable support for STM32F102. https://github.com/PX4/NuttX/pull/28.diff
2014-11-27 06:12:35 -06:00
Gregory Nutt
f4be851b0e
Remove the definition of INT_FAST32_MIN which is already defined in stdint.h (the correct location). From Lorenz Meier.
2014-11-12 07:47:37 -06:00
Gregory Nutt
c65372b80c
Support for the STM32F103RG. From Murilo Ponte
2014-11-10 07:48:46 -06:00
Gregory Nutt
9051ffd638
STM32GG Starter Kit: Add basic NSH configuration
2014-11-03 16:58:22 -06:00
Gregory Nutt
de5c451a30
Add empty file for event EFM32 clock configuration logic
2014-10-18 15:22:11 -06:00