Commit Graph

9 Commits

Author SHA1 Message Date
Gregory Nutt
2eb4fe5ffb Make sure sections are aligned to 32-bits in all LD linker scripts. This fixes and issues noted specifically for the SAMD21 by Bernd Walter, but should be applicable to all other LD scripts as well.
Squashed commit of the following:

    configs/:  Add . = ALIGN(4); before every .data section
    configs/:  Add . = ALIGN(4); before every ARM.extab section
    configs/:  Add . = ALIGN(4); before every definition of __exidx_start
    configs/:  Add . = ALIGN(4); before every .init_section.
    configs/:  Convert TABs to spaces in all ld linker scripts.  This just makes things easier to modify with scripts because the files are more consistent.
2019-05-30 16:51:38 -06:00
Gregory Nutt
b49be4bb20 Squashed commit of the following:
arch/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    sched/ audio/ crypto/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    Documentation/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    fs/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    graphics/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    net/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    drivers/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    include/, syscall/, wireless/:  Removed all references to CONFIG_DISABLE_POLL.  The standard POSIX poll() can not longer be disabled.
    configs/:  Remove all references to CONFIG_DISABLE_POLL.  Standard POSIX poll can no longer be disabled.
2019-05-21 18:57:54 -06:00
raiden00pl
8ce1f1a67b Merged in raiden00/nuttx_lora/lora (pull request #869)
Port STM32F7 I2C to STM32F3 and STM32F0L0

arch/arm/src/stm32: port I2C IPv2 driver from F7 (only F3 chips)

arch/arm/src/stm32f0l0: port I2C IPv2 driver from F7

configs/b-l072z-lrwan1: nxlines_oled example (ssd1306)

configs/b-l072z-lrwan1: support for the I2C tool

configs/nucleo-f303ze: nxlines_oled example (ssd1306)

arch/arm/src/stm32h7/chip.h: cosmetics

arch/arm/src/stm32/chip/stm32_tim.h: cosmetics

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-15 08:20:28 +00:00
Alan Carvalho de Assis
7133f89cc2 tools/Makefile.unix, .win, and all defconfig files: Modify tools/Makefiles to add warning on defconfig files 2019-03-03 08:31:03 -06:00
Gregory Nutt
a76e137ce2 Squashed commit of the following:
sched/init/nx_start.c:  Add support for CONFIG_BOARD_DRIVER_INITIALIZE.  If this option is selected then nx_start() will call a board-provided function board_driver_initialize() immediately after calling up_initialize().

    Rename CONFIG_BOARD_INITIALIZE to CONFIG_BOARD_LATE_INITIALIZE.

    Raname board_initialize() to board_late_initialize()
2019-02-18 15:32:00 -06:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Mateusz Szafoni
becb667f56 Merged in raiden00/nuttx_pe (pull request #758)
stm32/stm32_adc: major refator

stm32/stm32_adc: use STM32 ADC IP core version and ADC available functions instead of chip family names in conditional compilation

stm32/chip: replace family specific ADC headers with STM32 ADC IP core version headers

stm32/stm32_adc: configurable sample time supported for all chips, not only L1

stm32/stm32_adc: enable/disable interrupts supported for all chips, not only L1

stm32/stm32_adc: resolution configuration

stm32/stm32f33xxx_adc: remove wrong assertion

configs/nucleo-f303ze: support for ADC and ADC example

configs/stm32f429i-disco: support for ADC and ADC example

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-12 15:45:55 +00:00
Mateusz Szafoni
2a4ed884b5 Merged in raiden00/nuttx_pe (pull request #743)
arch/arm/stm32: add support for STM32F303xD/E; configs: add basic support for nucleo-f303ze

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-28 16:39:56 +00:00