7 Commits

Author	SHA1	Message	Date
Nonpawit Ekburanawat	7a9418c82c	Enable SMPS for STM32H745I-DISCO by default	2024-07-27 22:57:46 +08:00
Alan Carvalho de Assis	82946d0d5f	net: Enable ICMP by default if IPv4 is enabled ... Signed-off-by: Alan C. Assis <acassis@gmail.com>	2024-07-09 17:08:27 +08:00
Tiago Medicci Serrano	96f83bb03a	net: Enable CONFIG_NET_ARP_SEND by default ... Enable logic to send ARP requests if the target IP address mapping does not appear in the ARP table. Please check the comment in https://github.com/apache/nuttx/issues/12446#issuecomment-2145856778	2024-06-06 02:40:16 +08:00
Alan Carvalho de Assis	c27c33e9a9	Run refresh.sh to update all board configs	2023-09-02 14:45:44 +08:00
raiden00pl	5407dfccc3	boards: disable CM4 for stm32h745i-disco and stm32h747i-disco	2023-08-26 03:35:32 +08:00
Alexander Lunev	73867b9759	boards/arm/stm32h7/stm32h745i-disco: supported external SDRAM ... Supported external SDRAM (MT48LC4M32B2B5-6AIT:L) on STM32H745I-DISCO dev board. Though MT48LC4M32B2B5-6AIT:L SDRAM itself provides 32-bit data bus, STM32H745I-DISCO board routes only DQ[15:0] bits. Thus only half of the memory can be accessed: the accessible memory configuration is only 1 Meg x 16 x 4 banks instead of 1 Meg x 32 x 4 banks. Thus the accessible memory size is 8 MBytes. Testing: nsh> ramtest -a 0xD0000000 -s 8388608 RAMTest: Marching ones: d0000000 8388608 RAMTest: Marching zeroes: d0000000 8388608 RAMTest: Pattern test: d0000000 8388608 55555555 aaaaaaaa RAMTest: Pattern test: d0000000 8388608 66666666 99999999 RAMTest: Pattern test: d0000000 8388608 33333333 cccccccc RAMTest: Address-in-address test: d0000000 8388608 nsh>	2023-08-12 18:18:23 +08:00
raiden00pl	f43c7e99be	boards/stm32h7: Add stm32h745i-disco board	2023-07-12 11:30:57 -03:00