Abdelatif Guettouche
2793e6f82d
xtensa_releasepending.c: Remove commented out code.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-19 02:20:36 +08:00
Abdelatif Guettouche
5085f854d0
esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a
...
disabled state and if OpenOCD is used this will clear OpenOCD configuration.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-17 14:33:32 -03:00
Abdelatif Guettouche
b98676f8be
esp32(s3)_cpustart.c: Don't reset app CPU if it was already configured by
...
OpenOCD.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-17 14:33:32 -03:00
Gustavo Henrique Nihei
39e9a17e60
xtensa/esp32s3: Apply style fixes throughout serial driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
0dc2930403
xtensa/esp32s3: Remove code for not yet supported USB-Serial Driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
57273ad994
xtensa/esp32s3: Fix IRQ setup hardcoded to CPU 0
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-16 19:06:39 -03:00
Petro Karashchenko
b04447d066
timer_lowerhalf: minor improvements
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-15 10:30:48 +08:00
Xiang Xiao
b6bc460b2c
arch: Make the comment and definition of CONFIG_SYS_RESERVED correctly
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-14 22:51:00 +02:00
Abdelatif Guettouche
d21d02c65d
xtensa_panic.S: Save exception cause and vaddr into the user frame.
...
This area is what's passed later to assert and be used to dump the
state.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
a9e3b5ae37
xtensa_panic.S: A2 is already saved by the caller, no need to save it
...
here again.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
cff3d9df7b
arch/xtensa: Fix some indentations.
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
6fa4a42e34
xtensa/: Save A3 as part of the regular context saving.
...
It was separate because the syscal handler was using it before calling
_xtensa_context_save. The order of operations has now changed and we
can save A3 with the rest of the context.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4d1bb20f8c
xtensa_user_handler.S: In syscall handler store context before
...
continuing the rest of the syscall handling.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5305f76b1d
xtensa_context.S: Use Zephyr's version of spilling the window register
...
file.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2445de173d
xtensa_dumpstate.c: Don't dump temporary registers.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4786963ee2
xtensa_context.S: No need to save A2 before calling
...
_xtensa_save_context. It uses CALL0, in this case A1 is callee saved
and we can it directly.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2dcbf28f15
xtensa_context.S: A1 should be restored by the caller not
...
xtensa_context_resotred. Here it was being restored twice.
Remove the one in xtensa_context_restore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5bd2e97a27
xtensa_context.S: Fix the type of _xtensa_context_restore.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
e9018b29bf
xtensa_context.S: Remove the CALL0 ABI version of xtensa_context_switch
...
as it's the same as the Window ABI now.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-14 11:12:35 +08:00
Xiang Xiao
c96c96a399
drivers: Merge the common driver initialization into one place
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-13 11:24:48 -03:00
Gustavo Henrique Nihei
7ede285cfe
xtensa/esp32s3: Add support for RT-Timer based on Systimer peripheral
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
86b18bd6e9
xtensa/esp32s3: Move code documentation to the correct place
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 11:53:14 +08:00
Gustavo Henrique Nihei
a4db4031c9
xtensa/esp32s3: Stall Systimer when core 1 is temporarily stalled
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 11:53:14 +08:00
Xiang Xiao
39fb09738d
arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-11 23:08:07 +02:00
Xiang Xiao
17d1a48fc9
arch: Remove up_puts prototype from up_inernal.h
...
since it's defined in include/nuttx/arch.h now
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-11 23:08:07 +02:00
Gustavo Henrique Nihei
c8796c1bc2
xtensa/esp32s3: Move SPI RAM configuration out of Peripheral menu
...
Menu for configuration of SPI RAM was wrongly placed inside the menu
for peripheral selection.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-11 11:05:24 +08:00
Abdelatif Guettouche
f0a5777a26
xtensa_swint.c: Restore the coprocessor state at the end for consistency.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
7c57739d1d
xtensa_exit.c: Co-processor state is restored as part of the
...
SYS_Restore_context call, no need to call it separately.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
71ba4a6b76
arch/xtensa: Use the software interrupt when saving context too.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
329db99e51
arch/xtensa: Use rsync
around manipulating interrupt registers and
...
replace `isync` by `rsync` in other places.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Alan C. Assis
dc1b6776b9
xtensa/esp32s3: Add SPI RAM/PSRAM Support
2022-03-09 19:22:56 +02:00
Gustavo Henrique Nihei
4a29fa903b
xtensa/esp32s3: Enable SMP support
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-09 10:42:50 +08:00
Gustavo Henrique Nihei
140dc248db
xtensa/esp32s2: Add support for Main System Watchdog Timers
...
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 22:24:07 -03:00
Gustavo Henrique Nihei
bd7ee0d675
xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 11:36:32 -03:00
zhuyanlin
634d337394
riscv/xtensa: corrent dumpstate xcp size
...
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-08 10:14:04 +02:00
zhuyanlin
981282696f
xtensa:backtrace: fix backtrace last buffer error in some scene
...
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-07 10:21:37 +01:00
Abdelatif Guettouche
fa0e5da18e
xtensa/xtensa_user_handler.S: Store EXCCAUSE and EXCVADDR into the user
...
frame. The user frame is passed them to xtensa_user that actually uses
EXCVADDR.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-04 11:19:06 +02:00
Abdelatif Guettouche
c820085a23
arch/xtensa/esp32s3: Add encrypted support for SPI FLASH.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-03 19:57:59 +08:00
Abdelatif Guettouche
9d5b13cd0e
xtensa/esp32s3: Add SPI-Flash support.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-03 19:57:59 +08:00
Gustavo Henrique Nihei
16030f713e
xtensa/esp32s3: Add support for Free-running Timer
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-03 10:58:53 +08:00
Gustavo Henrique Nihei
3b7a6ae311
xtensa/esp32s3: Add support for Tickless kernel using Systimer
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-02 18:08:44 +01:00
Xiang Xiao
4a16cf71f9
Fix -Werror=nonnull-compare and -Werror=format-truncation=
...
Error: module/mod_insmod.c:203:3: error: 'strncpy' specified bound 16 equals destination size [-Werror=stringop-truncation]
203 | strncpy(modp->modname, modname, MODLIB_NAMEMAX);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
wqueue/kwork_thread.c: In function 'work_start_lowpri':
Error: wqueue/kwork_thread.c:212:22: error: '%lx' directive output may be truncated writing between 1 and 16 bytes into a region of size 14 [-Werror=format-truncation=]
212 | snprintf(args, 16, "0x%" PRIxPTR, (uintptr_t)wqueue);
local/local_sockif.c: In function 'local_getsockname':
Error: local/local_sockif.c:392:11: error: 'strncpy' specified bound depends on the length of the source argument [-Werror=stringop-overflow=]
392 | strncpy(unaddr->sun_path, conn->lc_path, namelen);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
chip/esp32_wifi_utils.c: In function 'esp_wifi_scan_event_parse':
Error: chip/esp32_wifi_utils.c:373:37: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Werror=sizeof-pointer-memaccess]
memset(ap_list_buffer, 0x0, sizeof(ap_list_buffer));
^
stdio/lib_fputs.c: In function 'fputs':
Error: stdio/lib_fputs.c:99:9: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
if (s == NULL || stream == NULL)
^
Error: stdio/lib_fputs.c:99:27: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
if (s == NULL || stream == NULL)
^
stdio/lib_vfprintf.c: In function 'vfprintf':
Error: stdio/lib_vfprintf.c:40:6: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
if (stream)
^
string/lib_strdup.c: In function 'strdup':
Error: string/lib_strdup.c:39:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
if (s)
^
string/lib_strndup.c: In function 'strndup':
Error: string/lib_strndup.c:56:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
if (s)
^
string/lib_strpbrk.c: In function 'strpbrk':
Error: string/lib_strpbrk.c:39:7: error: nonnull argument 'str' compared to NULL [-Werror=nonnull-compare]
if (!str || !charset)
^~~~
Error: string/lib_strpbrk.c:39:15: error: nonnull argument 'charset' compared to NULL [-Werror=nonnull-compare]
if (!str || !charset)
^~~~~~~~
string/lib_strrchr.c: In function 'strrchr':
Error: string/lib_strrchr.c:40:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
if (s)
^
Error: time/lib_asctimer.c:73:50: error: '%d' directive output may be truncated writing between 1 and 11 bytes into a region of size between 0 and 12 [-Werror=format-truncation=]
snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
^~
time/lib_asctimer.c:73:21: note: directive argument in the range [-2147481748, 2147483647]
snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
time/lib_asctimer.c:73:3: note: 'snprintf' output between 17 and 68 bytes into a destination of size 26
snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
g_wday_name[tp->tm_wday], g_mon_name[tp->tm_mon],
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
tp->tm_mday, tp->tm_hour, tp->tm_min, tp->tm_sec,
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1900 + tp->tm_year);
~~~~~~~~~~~~~~~~~~~
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-02 15:55:38 +08:00
zhuyanlin
a4e93be0fb
arch:xtensa: fix sp duplicate reduce in handler enter
...
In xtensa/include/irq.h the XCPTCONTEXT_SIZE is
`#define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + 0x20)`
XCPTCONTEXT_SIZE is already byte size of xcpcontext
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-01 13:46:31 +01:00
Xiang Xiao
3bf416e8b8
arch: Move STACK_ALIGNMENT definition to up_internal.h
...
to avoid the same macro duplicate to many place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 15:05:41 +08:00
Xiang Xiao
44bd3212d4
arch: Remove SYS_RESERVED from Kconfg
...
let's arch define the correct value instead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
087b9e5ff3
arch: Move the content from svcall.h to syscall.h
...
and remove svcall.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
8b77801b1c
arch/xtensa: Remove the unused SYS_pthread_exit
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Gustavo Henrique Nihei
6a12befcd5
xtensa/esp32s2: Fix Scheduler CPU Load feature using Oneshot Timer
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
Gustavo Henrique Nihei
d2ada5f030
xtensa/esp32: Fix Scheduler CPU Load feature using Oneshot Timer
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
zhuyanlin
fbc1da98b7
xtensa: use swint to swith context
...
Reason for use sw-interrupt as syscall interrupt:
The xtensa `syscall` instruction can cause SYSCALL interrupt.
But SYSCALL interrupt is same interrupt level with level-one
interrupt.
Nuttx swint can enter `enter_critical_section` and gerenate
interrupt.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-25 20:43:03 +08:00
zhuyanlin
f5d180bbdf
xtensa: spit up_irq_disable and up_irq_save INTLEVEL MARCO
...
For up_irq_disable, use XCHAL_EXCM_LEVEL
For up_irq_save, use XCHAL_IRQ_LEVEL.
Then we can use svcall in enter_crritical_section.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-25 20:43:03 +08:00
Gustavo Henrique Nihei
ea1b49119a
xtensa/esp32s3: Apply minor fixes to documentation and code style
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 10:51:25 +08:00
Gustavo Henrique Nihei
add99fead3
xtensa/esp32s3: Add support for Oneshot timer
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 10:51:25 +08:00
Abdelatif Guettouche
dc130b4830
arch/xtensa/esp32s2_irq.c: Correctly enable the software interrupt.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-25 08:55:41 +09:00
Gustavo Henrique Nihei
b49ee3d4ed
xtensa/esp32s3: Add support for Main System Watchdog Timers
...
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 02:13:00 +08:00
Gustavo Henrique Nihei
3400b42a33
xtensa/esp32: Fix a minor typo in documentation
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
a5024a707d
xtensa/esp32s3: Use the running CPU ID for enabling internal interrupts
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
83f3ba6d22
xtensa/esp32s3: Add support for Timer Groups 0 and 1
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 00:13:34 +08:00
zhuyanlin
7d350204f0
xtensa: fix XTHAL_REL_LE
not find
...
fix `XTHAL_REL_LE` not find build break
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 22:13:46 +08:00
Xiang Xiao
6fa5885d2d
arch/esp32: Update esp-wireless-drivers-3rdparty to verion 45701c0
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 09:05:40 +01:00
zhuyanlin
fc9791c269
xtensa:esp32s3: setup software interrupt as swi interrupt.
...
Enable and setup software interrupt.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
zhuyanlin
bf40d70df9
xtensa:esp32s2: setup software interrupt as swi interrupt
...
Enable and setup software interrupt for esp32s2
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
zhuyanlin
7b32ce190e
xtensa:esp32: setup software interrupt. (bit 29)
...
Enable and setup software interrupt.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
Xiang Xiao
43f57240e0
Replece clock_gettime(CLOCK_MONOTONIC) with clock_systime_timespec
...
it's better to call the kernrel api insteaad user space api in kernel
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 01:06:36 +08:00
Xiang Xiao
f1ed349dd9
sched/clock: Remove CLOCK_MONOTONIC option from Kconfig
...
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 01:21:26 +08:00
zhuyanlin
7b00c8bdb8
arch:xtensa: modify svcall to swint
...
Reason: xtensa svcall only have level-1 interrupt level.
Sush do not generate interrupt when up_irq_save.
Software int can generate interrupt when up_irq_save.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-22 14:06:24 -03:00
Xiang Xiao
163fe4ff0b
boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3
Remove the double blank line from source files
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Abdelatif Guettouche
ab18b7b3d3
esp32xx_irq.c: Fix CPU interrupt documentation to remove the MAC
...
interrupt from the internal interrupt table.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
ee88235d81
esp32_irq.c: Don't reserve BT and Wifi CPU interrupts for APP CPU as
...
they are attached to the PRO CPU.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
17e43b0b4a
esp32_irq.c: For internal interrupts use the current CPU to enable them.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
3d2771c49a
esp32_irq.c: Move interrupt initialisation for special drivers to
...
`up_irqinitialize`. `esp32_cpuint_initialize` is not a good place as
it's also called from CPU1.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Alan Rosenthal
8defb843aa
Remove duplicate linker script definitions
...
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.
This PR cleans up the logic so they're only listed once.
## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!
## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Petro Karashchenko
41c95da594
register_driver: fix driver modes accross the code
...
State of problem:
- Some drivers that do not support write operations (does not
have write handler or ioctl do not perform any write actions)
are registered with write permissions
- Some drivers that do not support read operation (does not
have read handler or ioctl do not perform any read actions)
are registered with read permissions
- Some drivers are registered with execute permissions
Solution:
- Iterate code where register_driver() is used and change 'mode'
parameter to reflect the actual read/write operations executed
by a driver
- Remove execute permissions from 'mode' parameter
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-16 16:15:29 +08:00
zhuyanlin
c833048484
xtensa:kconfig: move ARCH_HAVE_TESTSET config to chip
...
Some xtensa arch have not implentment testset instructions
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-10 14:22:58 +08:00
Abdelatif Guettouche
f826e053ae
arch/xtensa/esp32: Remove the QEMU special case when initializing the
...
heap.
QEMU had a different ROM image that used the regions of PRO CPU for both
CPUs. This was causing crashes when running SMP mode as the heap was
being corrupted when the APP CPU starts.
QEMU is now loading the same image as the hardware chip and thus this
special case doesn't exist anymore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-03 16:18:09 -03:00
chao.an
3ab557e748
arch/xtensa: correct the netlock handling
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-03 11:09:18 -03:00
Xiang Xiao
4c167b0729
Correct the code alignment
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-01 21:22:21 -03:00
Xiang Xiao
2c3020ddaf
arch/Toolchain.defs: Replace --print-file-name=libgcc.a with --print-libgcc-file-name
...
to more compatable with clang: https://reviews.llvm.org/D25338
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-31 09:46:04 +01:00
Xiang Xiao
e0b62bf677
arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately
...
since board's Make.defs may overwrite ARCHCPUFLAGS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-30 11:04:35 +09:00
Xiang Xiao
1c2c0e4707
arch/Toolchain.defs: Simplify the builtin library addition for EXTRA_LIBS
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-28 12:02:38 +01:00
Gustavo Henrique Nihei
b0d24f53c4
xtensa: Add initial support for ESP32-S3
...
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-27 13:46:50 -03:00
zhuyanlin
1b08f607be
arm/xtensa:cache: flush/clean dcache all if size large than cache size
...
For performance, if size large than cache size, use xxx_all instead
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 15:15:28 +08:00
Petro Karashchenko
6c27f3c19d
toolchain: add libm to EXTRA_LIBS only if it is provided by the compiler
...
Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-22 15:36:29 +08:00
Xiang Xiao
2935751bfd
Fix error: implicit declaration of function 'up_cpu_index'
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Xiang Xiao
aa2cdcd848
xtensa/esp32: Change "cpu <= CONFIG_SMP_NCPUS" to "cpu < CONFIG_SMP_NCPUS"
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Xiang Xiao
77792a1598
sched: Define CONFIG_SMP_NCPUS to 1 in no SMP case
...
to simplify the SMP related code logic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Petro Karashchenko
08043fb5bc
net: unify FAR keyword usage for all net buffer memory mapped buffers
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:42:56 +08:00
zhuyanlin
793ec6c909
arch:xtensa:vectors:fix bugs in a0 save
...
Use right EXCSAVE_X
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-19 16:28:03 +01:00
zhuyanlin
a1a9ce3d1e
arch:xtensa_panic: use right interrupt pointer in xtensa_panic
...
When enable interrupt stack, use a12 instead of sp
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-19 16:28:03 +01:00
zhuyanlin
88f5a209ce
xtensa: move a3 save in handler instead of _xtensa_context_save
...
As in _xtensa_syscall_handler, a3 was save and reused before
_xtensa_context_save, a3 save in _xtensa_context_save will generate
error.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-19 16:28:03 +01:00
zhuyanlin
561fa88ed1
xtensa: add svcall handler
...
svcall.c for xtensa
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-19 16:28:03 +01:00
zhuyanlin
662f071d9a
xtensa: fix svccall enter error
...
1. error in A3 push stack
2. when interrupt stack enable, push a12 is xtensa_irq_dispatch
parameter 1, instead of sp. As sp is interrupt stack address set by
`setintstack`, not the interruptee stack address
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-19 16:28:03 +01:00
Petro Karashchenko
9551de7115
net: use HTONS, NTOHS, HTONL, NTOHL macro in kernel code
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-18 10:59:47 +01:00
Gustavo Henrique Nihei
04723a89f2
xtensa: Fix core voltage level when SPI Flash runs at 80Mhz
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-18 02:21:46 +08:00
Petro Karashchenko
8d3bf05fd2
include: fix double include pre-processor guards
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
chao.an
c27839f98e
arm/xtensa: save the running registers to xcp context
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-15 02:20:01 +08:00
Gustavo Henrique Nihei
c372e1e295
xtensa: Fix typo in xchal_cpX_store macros' invocation
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-13 21:07:04 +01:00
Alan C. Assis
7b32849b84
esp32s2: Fix data cache option in menuconfig
2022-01-12 21:45:04 +01:00
Gustavo Henrique Nihei
80436dd7be
xtensa/esp32s2: Fix some wrong definitions related to IRQ management
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-12 21:28:40 +01:00
Gustavo Henrique Nihei
efca63e9e3
xtensa/esp32s2: Fix missing parenthesis on macro expression
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-11 23:21:13 +08:00
ligd
3cfc6761ff
xtensa: fix lack of float register save & resotre
...
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-01-11 12:17:09 +01:00
Alan C. Assis
2079cc0f6e
esp32: Add support to RS485
2022-01-10 10:49:16 +08:00
Alan C. Assis
4ca38c6c50
esp32: Add PWM support using the LEDC peripheral
...
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-08 14:46:51 +01:00
Gustavo Henrique Nihei
73ea0c1627
xtensa: Improve Kconfig description of ESP32-S2 arch family
...
Also fix the wrong "dual-core" statement, since all ESP32-S2 chips are
composed of a single Xtensa LX7 core.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-07 22:25:05 +01:00
Zeng Zhaoxiu
fb43fd73ed
signal: signal handler may cause task's state error
...
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
2022-01-05 21:36:44 +09:00
Abdelatif Guettouche
4edc5fb701
xtensa: Rename up_stack_color to xtensa_stack_color since it's an
...
internal function.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-01-04 02:45:45 +08:00
Gustavo Henrique Nihei
78362b0949
xtensa/esp32: Use ROM implementations of libc functions
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-03 10:37:04 -03:00
Petro Karashchenko
d23ad9b9b0
userspace: fix typos in comments
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-02 20:50:30 +01:00
Gustavo Henrique Nihei
c1fac720ec
xtensa/esp32: Add missing param documentation for SPI Flash function
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
9e5e60ba48
esp32s2/esp32c3: Build MCUboot bootloader with Flash Encryption support
2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
f130d8b91e
xtensa/esp32s2: Remove unavailable support for ROM Basic Console
...
This feature is only available for ESP32 chips.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-31 00:56:08 +08:00
chao.an
736add0fe8
arch/backtrace: correct the skip counter
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-30 16:57:40 +08:00
Gustavo Henrique Nihei
80da9abd6a
xtensa/esp32: Move assertions after logging to improve debugging
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
b6addaa4c7
xtensa/esp32: Enable the creation of encrypted Flash partitions
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
340e0c8a8f
xtensa/esp32: Build MCUboot bootloader with Flash Encryption support
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-30 12:35:41 +08:00
ChenWen
6ce335fa84
xtensa/esp32: Fix some Wi-Fi issues
...
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
2. Update Wi-Fi driver code to fix issue of failure to send pkt.
3. Replace software random with hardware random
2021-12-28 23:48:25 -06:00
chao.an
7ed0b97414
make/allsyms: skip the unnecessary link operation
...
For incremental compilation, skip the stage 1 dummy link
operation if nuttx elf has been generated
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 23:47:10 -06:00
Xiang Xiao
dd942f0b04
sched/backtrace: Dump the complete stack regardless the depth
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-29 12:09:54 +08:00
chao.an
a42aa8415d
compile/flags: add FRAME_POINTER into Toolchain.defs
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
Petro Karashchenko
3ccb657dc2
nuttx: remove space befone newline in logs
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-27 21:01:19 -06:00
Alan C. Assis
01e4e249cc
Add WiFi/BLE Coexistence support
...
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-23 20:42:23 -06:00
chao.an
fe2830ec94
xtensa: enhance the task dump
...
add irq stack information
add cpu loading
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-22 11:46:02 -03:00
Gustavo Henrique Nihei
f542ab4564
xtensa/esp32s2: Add Secure Boot support on top of MCUboot
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-21 07:02:40 -06:00
Gustavo Henrique Nihei
d22a2aa7a0
xtensa/esp32: Refactor makefiles for compliance to Function Call Syntax
...
According to Make documentation:
- "Commas and unmatched parentheses or braces cannot appear in the text
of an argument as written";
- "Leading spaces cannot appear in the text of the first argument as
written".
Although in the current state it was not resulting in parsing issues, it
is better to fix it.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-21 07:02:40 -06:00
Gustavo Henrique Nihei
6c3223289f
xtensa/esp32: Add Secure Boot support on top of MCUboot
...
This adds the capabitlity of building signed images on NuttX.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-12-21 07:02:40 -06:00
Petro Karashchenko
3e76c3266e
assert: unify stack and register dump across platforms
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-20 00:02:12 -03:00
Petro Karashchenko
67d8a82393
Kconfig: fix non-string default values uniformity
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-20 00:10:57 +01:00
chao.an
b11833cbba
arch/assert: flush the syslog before stack dump
...
flush the syslog before stack dump to avoid buffer overwrite
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-15 12:00:35 -06:00
chao.an
56ef1419dd
arch/xtensa: set the current reg before print syslog
...
ensure the semantics of the up_interrupt_context() works as expected
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-14 21:40:03 -06:00
chao.an
2fe06ac083
arch: xtensa: save current SP before overwrting
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-14 21:40:03 -06:00
chao.an
93b133fe66
arch/xtensa: correct the interrupt stack on irq handler
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-14 21:40:03 -06:00
Petro Karashchenko
51a2db6ffc
Kconfig: improve uniformity
...
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-14 07:32:48 -06:00
chao.an
c2fd66bfab
arch/arm/risc-v/xtensa: add support of all symbols for debugging
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 08:31:13 -06:00
Abdelatif Guettouche
d31a0d8aca
arch/xtensa/esp32: Show CPU activity on IDLE task and on interrupts.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Abdelatif Guettouche
6262f7e99a
esp32_idle.c: Change private function's name to start with esp32_
...
instead of up_.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Xiang Xiao
6357523892
arch: Add _wchar_t typedef like other basic types
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-09 16:57:23 +09:00
Xiang Xiao
a0990ee416
arch: Remove the duplicated up_tls_info implementation
...
Define up_tls_info in arch/arch.h directly if the general one isn't suitable
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-05 20:59:53 -06:00
Xiang Xiao
19e5ee6ce0
arch: Remove FILE dump code from _up_dumponexit
...
since the kernel build can't access the userspace memory
inside other process directly
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-06 11:23:58 +09:00
Abdelatif Guettouche
50d217a9e8
esp32_cpustart.c: Improve comments around the usage of the inter-cpu
...
startup handshake.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-02 11:21:49 -06:00
Abdelatif Guettouche
b34951e3a0
esp32_cpustart.c: Remove the CONFIG_SMP condition on some part of code
...
because the whole file is only built if CONFIG_SMP is enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-02 11:21:49 -06:00
Xiang Xiao
b65c7c26cf
arch: Dump task name through tcb_s::name instead of argv[0]
...
since argv is defined in task_tcb_s not tcb_s
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-01 16:04:15 +01:00
Abdelatif Guettouche
251b8a3445
esp32xx_rtc: Include "clock/clock.h" to have a declaration of
...
g_basetime.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-26 15:23:47 -03:00
Abdelatif Guettouche
af11cf6cd1
esp32xx_rtc.c: Fix a duplicated assignment.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-26 15:23:47 -03:00
Xiang Xiao
e30a5f3790
arch/sim: Add new option to enable arch specific hostfs
...
we have many different hostfs implementation now, so it's better
to select the implementation explicitly, just like what we have
done for arm(FS_HOSTFS vs. ARM_SEMIHOSTING_HOSTFS).
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-25 14:42:23 +01:00
zhuyanlin
1b3005accf
arch:cache_invalidate: fix unalign cacheline invalidate
...
Only invalidate may corrupt data in unalign start and end.
Use writeback and invalidate instead.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-24 22:48:13 -06:00
zhuyanlin
4db5016d83
arch:hostfs: add cache coherence config for semihosting option
...
N/A
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-24 22:48:13 -06:00
Abdelatif Guettouche
65db787eff
esp32_irq.c: Fix retrieving IRQ number and peripheral ID when it comes
...
to GPIOs in SMP mode.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-22 11:41:10 -06:00
zhuyanlin
ffb543d061
xtensa: add setjmp.h include file
...
N/A
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-17 02:23:45 -06:00
zhuyanlin
0e002af323
xtensa_backtrace: fix typ error
...
N/A
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-17 01:47:26 -06:00
Xiang Xiao
2262ddfa6d
arch: Remove fflush(stdout) from driver code
...
it's wrong to call stdio function inside driver
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-15 00:04:12 +01:00
Abdelatif Guettouche
6cbcbd5481
arch/risc-v&xtensa/Kconfig: Don't select LIBC_ARCH_MEMCCMP. The Kconfig
...
option doens't exist and we are not providing any external
implementation.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-13 11:54:42 -03:00
zhuyanlin
c6c534f27b
xtensa:mpu:use WRITEBACK attribute for intsram & extsram
...
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-13 05:59:10 -06:00
Dong Heng
fed7808d80
esp32 & esp32c3: Partition supports BIO cmd
2021-11-13 05:58:30 -06:00
Dong Heng
a59aae6927
esp32/esp32c3: Fix MMU pages number calculation error
2021-11-07 21:59:54 -06:00
zhuyanlin
580d17cc02
arch:xtensa: make xtensa_abi.h global include and usage
...
N/A
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-06 07:39:27 -05:00
Abdelatif Guettouche
73f15ed544
esp32/Kconfig: Make ESP32_BT_RESERVE_DRAM default to 0 again if
...
Bluetooth is not enabled. When Bluetooth is enbaled then it defaults to
64KB. This will not wast those 64KB of memory when Bluetooth is not enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-01 10:01:38 -05:00
Gustavo Henrique Nihei
de0e4d4aac
xtensa/esp32s2: Rename MTD-related configs to become more intuitive
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
fb00ab3242
xtensa/esp32: Rename MTD-related configs to become more intuitive
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
eb889b0884
xtensa/esp32s2: Enable Partition Table allocation at custom offset
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
9d7b9821b3
xtensa/esp32: Enable Partition Table allocation at custom offset
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
b555b3f89e
xtensa/esp32: Refactor and reorganize Partition Table related configs
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
793266d39e
espressif: Fix spacing style in Kconfig files
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
4ff754827c
espressif: Fix prompt string of Wi-Fi FS mount point configs
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
a1af605973
espressif: Fix references to Wi-Fi according to Wi-Fi Alliance
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Alan C. Assis
7e8003cba1
Move chip specific file compilation to CHIP_CSRCS
2021-10-23 04:03:12 -05:00
Alan C. Assis
03738622a1
esp32s2: Add RNG driver support and board profile example
2021-10-23 04:03:12 -05:00
zhuyanlin
cf1a04d0a2
xtensa:cache: add lock & unlock feature
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Since some xtensa cores cache support lock & unlock feature.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
Abdelatif Guettouche
8288a04a0b
arch/xtensa/esp32: Remove the AES test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
zhuyanlin
b5134565fa
arch:xtens:mpu: modify acc and memtype to uint32_t
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The uint8_t and uint16_t will overflow in MPU_ENTRY_AR marco.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-19 00:24:31 -05:00
Xiang Xiao
91398e73eb
arch/xtensa/Kconfig: add quotes in source to clean warnings from setconfig
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-19 00:33:51 +02:00
Abdelatif Guettouche
7b43d11435
esp32_spiflash.c: Allocate only one variable to hold the cache state in
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single CPU mode.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f54a929001
esp32_spiflash.c: Keep the index of the other CPU between SPI Flash
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operations.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
eeb68bda3d
xtensa_testset.c: Simplify the test-set function and remove some old
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comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
dfe1637864
esp32_spiflash.c: Pause the other CPU during flash operation.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f2c2323642
esp32_intercpu_interrupt.c: Force the functions to internal SRAM.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
d2bc011719
arch/xtensa/xtensa_cpupause.c: Allow a spin before taking the g_cpu_wait
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spinlock.
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 09:46:23 -07:00
Abdelatif Guettouche
591c1563b8
esp32_oneshot_lowerhalf.c: Use the same alignment as the rest of the
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code base.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
9e1d2ca95e
esp32_rt_timer.c: Group static variables into a struct and fix naming
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standard
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0dff3f2762
esp32_wifi_adapter.c: Use the specified spin lock when
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enabling/disabling interrupts.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
a50d673df7
esp32_wifi_adapter.c: Don't hold another spinlock when calling
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enter_critical_section, we already hold the global IRQ spinlock.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
11216257cf
esp32_rt_timer.c: Don't nest calls to spin_lock_irqsave with a device
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specific spinlock, this will lead to deadlocks.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
e847c61801
esp32_wifi_adapter.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
32f7471f9e
esp32_wlan.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
4ae1285124
esp32_emac.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
e64390d5e9
esp32_rt_timer.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
c61009c2cf
esp32/esp32_spi_slave.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
2273684cb1
esp32/esp32_spi.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0123243f9a
esp32/esp32_i2c.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0af9a49d9c
esp32/esp32_oneshot_lowerhalf.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
698af43d78
esp32/esp32_freerun.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
04bd27400a
xtensa/esp32_wdt_lowerhalf.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
19a096cdfe
arch/xtensa/esp32_tim_lowerhalf.c: Use device specific locks.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-16 00:01:23 -07:00
Gustavo Henrique Nihei
ff705586bb
xtensa/esp32s2: Provide SPI Flash parameters to MCUboot build
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Also unify bootloader config creation to reduce duplication.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-15 23:55:10 -07:00
Gustavo Henrique Nihei
4d5e0f8fe1
xtensa/esp32: Provide SPI Flash parameters to MCUboot build
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Also unify bootloader config creation to reduce duplication.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-15 23:55:10 -07:00
Abdelatif Guettouche
a7d8d9dd98
esp32s2/tie.h: Run the file though detab.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
6d246eb18f
esp32s2/tie.h: The old tie.h file was from ESP32 which doesn't apply to
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ESP32-S2. This commit gets the correct S2 tie.h file
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
217fd97fd3
xtensa_coproc.S: Correctly save/restore coprocessor0 state.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 07:39:54 -03:00
Abdelatif Guettouche
7420f245bc
xtensa_context.S: Save and restore SCOMPARE1 when necessary.
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SCOMPARE1 is used by some atomic instructions and need to be preserved
during a context switch.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-14 06:32:17 -03:00
Alan C. Assis
867c6d0636
esp32: Add initial support to Bluetooth Low Energy
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Co-authored-by: saramonteiro <saramonteirosouza44@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavonihei@gmail.com>
2021-10-04 15:10:37 -03:00